PI3LVD1012BE

PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Features
Description
• Designed specifically to switch Dual-LVDS signals
• VDD = 3.3V +/-10%
• ESD tolerance on video I/O pins is up to 12kV HBM
• -3dB BW of 1.0GHz (typ)
• Low Xtalk, (-55dB typ)
• Low and Flat ON-STATE resistance (Ron = 3ohm, Ron(Flat)
= 0.5ohm, typ)
• Low input/output capacitance (Con = 6.2pF, typ)
• Packaging (Pb-free and Green):
– 80-pin BQSOP (BE)
Pericom’s PI3LVD1012 is a 10-differential channel LVDS
mux/demux used to switch between multiple LVDS sources or
end points. With new notebook architecture allowing users the
ability to upgrade their graphics power, notebook designers need
an effective way to switch between the upgraded graphics path.
Pericom's LVDS switch allows users to switch between two
graphics processors in a single notebook, driving the internal
panel. PI3VLVD1012 can support 18bit or 24bit panels.
With the high bandwidth of ~1.2GHz, the signal integrity will
remain strong even through the long FR4 trace through the
notebook. In addition to high signal performance, the video signals
are also protected against high ESD with integrated diodes to VDD
and GND that will support up to 12kV of ESD HBM protection.
Applications
• Routes physical layer signals for high bandwidth
Truth Table
SELx
Ay
L
Y B1
H
Y B2
Note:
1. If x=1, then y=0─9; if x=2, then y=10─19
08-0246
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PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Block Diagram
A0
0B1
A1
1B1
0B2
1B2
2B1
A2
3B1
A3
2B2
3B2
4B1
A4
A5
5B1
4B2
5B2
A6
6B1
A7
7B1
6B2
7B2
A8
8B1
A9
9B1
8B2
9B2
SEL1
LOGIC
CONTROL
A10
10B1
A11
11B1
10B2
11B2
12B1
A12
13B1
A13
12B2
13B2
14B1
A14
A15
15B1
14B2
15B2
A16
16B1
A17
17B1
16B2
17B2
A18
18B1
A19
19B1
18B2
19B2
SEL2
08-0246
LOGIC
CONTROL
2
PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Pin Description
80-Pin BQSOP
1B1
0B1
GND
VDD
A0
A1
OE1
A2
A3
VDD
A4
A5
GND
A6
A7
SEL1
A8
A9
VDD
GND
GND
VDD
A10
A11
OE2
A12
A13
VDD
A14
A15
GND
A16
A17
SEL2
A18
A19
VDD
GND
19B2
18B2
08-0246
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
44
42
41
43
41
0B2
1B2
2B1
3B1
2B2
3B2
GND
4B1
5B1
4B2
5B2
VDD
6B1
7B1
6B2
7B2
8B1
9B1
8B2
9B2
10B1
11B1
10B2
11B2
12B1
13B1
12B2
13B2
GND
14B1
15B1
14B2
15B2
VDD
16B1
17B1
16B2
17B2
18B1
19B1
3
PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Maximum Ratings
(Above which useful life may be impaired. For user guidelines,
not tested.)
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
Storage Temperature....................................–65°C to +150°C
Supply Voltage to Ground Potential...............–0.5V to +5.0V
DC Input Voltage............................................–0.5V to +5.5V
DC Output Current......................................................120mA
Power Dissipation...........................................................0.5W
DC Electrical Characteristics for Video Switching over Operating Range
(TA = –40°C to +85°C, VDD = 3.3V ±10%)
Paramenter
Test Conditions(1)
Description
Min.
Typ.(2)
Max.
VIH
Input HIGH Voltage
Guaranteed HIGH level
2
-
-
VIL
Input LOW Voltage
Guaranteed LOW level
–0.5
-
0.8
VIK
Clamp Diode Voltage
VDD = Max., ISELx = –18mA
-
–0.7
–1.2
IIH
Input HIGH Current
VDD = Max., VSELx = VDD
-
-
±5
IIL
Input LOW Current
VDD = Max., VSELx = GND
-
-
±5
IOFF
Power Down Leakage Current
VDD = 0V, VB = 0V, VA ≤ 3.6
-
-
±1
RON
Switch On-Resistance(3)
VDD = Min., 0.9V ≤ Vinput ≤ 1.6V,
Iinput = –40mA
-
3
-
RFLAT(ON)
On-Resistance Flatness(4)
VDD = Min., Vinput @ 0V and 1.5V,
Iinput = –40mA
-
0.1
-
∆RON
On-Resistance match from center
ports to any other port(4)
VDD = Min., 0.9V ≤ Vinput ≤ 1.6V,
Iinput = –40mA
-
0.2
-
Units
V
μA
Ω
Capacitance (TA = 25°C, f = 1MHz)
Parameters(4)
Test Conditions(1)
Description
CIN
Input Capacitance
COFF
Switch I Capacitance, Switch OFF
CON
Switch Capacitance, Switch ON
Typ.(2)
Units
2.5
VSELx = 0V
2.2
pF
6.2
Notes:
1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading.
3. Measured by the voltage drop between input and output pins at indicated current through the switch.
4. This parameter is determined by device characterization but is not production tested.
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PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Power Supply Characteristics
Parameters
IDD
Test Conditions(1)
Min.
Typ.(2)
Max.
Units
VDD = Max., VSELx = GND or VDD
-
0.7
1.5
mA
Description
Quiescent Power Supply Current
Notes:
1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading.
Dynamic Electrical Characteristics Over the Operating Range (TA=-40º to +85ºC, VDD=3.3V±10%, GND=0V)
Parameter
Description
Test Conditions
Min.
Typ.(2)
Max.
XTALK
Crosstalk
f = 250MHz, See Fig. 2
-
-55
-
OIRR
OFF Isolation
f = 250MHz, See Fig. 3
-
-42
-
BW
Bandwidth –3dB
See Fig. 1
-
1
-
Units
dB
GHz
Switching Characteristics
Paramenter
Description
Min.
Typ.(2)
-
0.25
Max.
tPD
Propagation Delay(2,3)
tPZH, tPZL
Line Enable Time - SEL to Input, Output
0.5
-
15
tPHZ, tPLZ
Line Disable Time - SEL to Input, Output
0.5
-
9
tSK(p)
Skew between opposite transitions of the same output
(tPHL - tPLH) (2)
-
0.1
0.2
Units
ns
Notes:
1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Guaranteed by design.
3. The switch contributes no propagational delay other than the RC delay of the On-Resistance of the switch and the load capacitance. The time
constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical
driving signals, it adds very little propagational delay to the system. Propagational delay of the LVDS switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.
08-0246
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PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Test Circuit for Electrical Characteristics(1)
6.0V
VDD
200-ohm
VOUT
VIN
Pulse
Generator
D.U.T
10pF
CL
RT
200-ohm
Notes:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
3. All input impulses are supplied by generators having the following characteristics: f = 10 MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
Switch Positions
Test
Switch
tPLZ, tPZL
6.0V
tPHZ, tPZH
GND
Prop Delay
Open
Test Circuit for Dynamic Electrical Characteristics
HP4396B
R
S
T
HP11667A
50-ohm
PI3LVD1012
50-ohm
50-ohm
Figure 1. Bandwidth -3dB Testing
08-0246
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PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
HP4396B
R
S
T
HP11667A
PI3LVD1012
50
100
50
50
100
Figure 2. Crosstalk Test Setup
HP4396B
R
S
T
HP11667A
50
PI3LVD1012
50
50
100
Figure 3. Off Isolation Test Setup
08-0246
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PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Switching Waveforms
2.5V
SEL
3.5V
2.5V
Input
0V
2.5V
1.5V
tPLH
Output
tPZL
tPHL
2.5V
tPLZ
VDD/2
VOH
Output
1.25V
1.25V
VOL
VOL +0.3V
tPHZ
tPZH
2.5V
VOH
VDD/2
VOH –0.3V
VOH
VOL
Output
Voltage Waveforms Propagation Delay Times
VOL
Voltage Waveforms Enable and Disable Times
3.5V
2.5V
Data In
1.5V
tPLHX
3.5V
tPHLX
2.5V
VOH
Input
2.5V
Data Out
at Channel X
1.5V
tPLH
VOL
I
tPHL
VOH
tSK(o)
VOH
2.5V
Output
2.5V
Data Out
at Channel Y
VOL
VOL
tPLHy
tSK(p) = I tPHL – tPLH I
tPHLy
tSK(o) = I tPLHy – tPLHx I or I tPHLy – tPHLx I
Output Skew - tSK(o)
Pulse Skew - tSK(p)
Applications Information
Logic Inputs
The logic control inputs can be driven up to +3.6V regardless of the supply voltage. For example, given a +3.3V supply, the output
enables or select pins may be driven low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power consumption.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd
08-0246
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PS8927C
09/26/08
PI3LVD1012
3.3V, 10-differential channel Dual-LVDS
switch targeted for 24bit displays
Packaging Mechanical: 80-pin BQSOP (B)
80
DOCUMENT CONTROL NO.
PD - 1211
41
REVISION: D
DATE: 03/09/05
.150
.157
3.80
4.00
.228
.244
5.80
6.20
.008 NOM
0.203
Gauge Plane
5˚
1
0.803
0.811
20.40
20.60
0.50
.019
REF
.010
.016
.063
1.60
Nom
.0197
BSC
0.50
X.XX
X.XX
.010
0.254 BSC
.019 0.50
.029 0.75
40
0.254 x 45˚
0.406
.078
2.0
Max
5˚
.007
.010
0.17
0.27
.002
.009
0.05
0.25
DENOTES DIMENSIONS
IN MILLIMETERS
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Controlling dimensions in millimeters.
3. Package Outline Exclusive of Mold Flash and Metal Burr
3. Ref: JEDEC MO-154C/BC
DESCRIPTION: 80-Pin, 150-Mil Wide BQSOP
PACKAGE CODE: B
Ordering Information
Ordering Code
PI3LVD1012BE
Package Code
Package Description
BE
Pb-free & Green, 80-pin BQSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/.
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
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PS8927C
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