PI3LVD812

PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Features
Description
• Designed specifically to switch Dual-LVDS signals
• Full switch for 6-differential LVDS data signals and 2
differential LVDS clock signals
• VDD = 3.3V ±10%
• ESD tolerance on video I/O pins is up to 12kV HBM
• -3dB BW of 1.0GHz (typ)
• Low Xtalk, (-55dB typ)
• Low and Flat ON-STATE resistance (Ron = 3ohm, Ron(Flat) =
0.5ohm, typ)
• Low input/output capacitance (Con = 6.2pF, typ)
• Packaging (Pb-free and Green):
– 80-pin Dual Row TQFN
Pericom’s PI3LVD812 is an 8-differential channel LVDS mux/
demux used to switch between multiple LVDS sources or end
points. With new notebook architecture allowing users the ability
to upgrade their graphics power, notebook designers need an
effective way to switch between the upgraded graphics path.
Pericom's LVDS switch allows users to switch between two
graphics processors in a single notebook, driving the internal
panel. PI3LVD812 can support 18-bit panels.
With the high bandwidth of ~1.0GHz, the signal integrity will
remain strong even through the long FR4 trace through the
notebook. In addition to high signal performance, the video signals
are also protected against high ESD with integrated diodes to VDD
and GND that will support up to 12kV of ESD HBM protection.
Applications
• Routes physical layer signals for high bandwidth
Truth Table
SELx
Ay
L
Y B1
H
Y B2
Note:
1. If x=1, then y=0─9; if x=2, then y=10─15
09-0024
1
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Block Diagram
A0
0B1
A1
1B1
0B2
1B2
2B1
A2
3B1
A3
2B2
3B2
4B1
A4
A5
5B1
4B2
5B2
A6
6B1
A7
7B1
6B2
7B2
A8
8B1
A9
9B1
8B2
9B2
SEL1
LOGIC
CONTROL
A10
10B1
A11
11B1
10B2
11B2
12B1
A12
13B1
A13
12B2
13B2
14B1
A14
A15
15B1
14B2
15B2
SEL2
09-0024
LOGIC
CONTROL
2
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Pin Description
NC
A8
A9
VDD
A10
A11
A12
A13
SEL2
A14
09-0024
2B1
GND
GND
1B2
0B2
1B1
0B1
62
9
61
10
60
11
59
12
58
13
57
14
56
GND
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27
43
28
29
42
30
GND
GND
VDD
8
31
32
33
34
35
3
36
37
38
39
40 41
GND
3B1
2B2
3B2
4B1
5B1
4B2
5B2
VDD
6B1
7B1
6B2
7B2
GND
8B1
9B1
8B2
9B2
10B1
11B1
10B2
11B2
VDD
12B1
13B1
12B2
13B2
GND
GND
GND
GND
63
14B1
VDD
VDD
7
GND
GND
70 69
64
15B1
VDD
71
6
14B2
GND
72
65
15B2
GND
73
66
VDD
SEL1
74
67
GND
A7
75
68
VDD
A6
76
5
A5
GND
77
4
VDD
A4
78
3
A2
A3
79
2
A1
NC
80
1
A15
GND
A0
GND
Dual Row TQFN
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Maximum Ratings
(Above which useful life may be impaired. For user guidelines,
not tested.)
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
Storage Temperature....................................–65°C to +150°C
Supply Voltage to Ground Potential...............–0.5V to +5.0V
DC Input Voltage............................................–0.5V to +5.5V
DC Output Current......................................................120mA
Power Dissipation...........................................................0.5W
DC Electrical Characteristics for Video Switching over Operating Range
(TA = –40°C to +85°C, VDD = 3.3V ±10%)
Parameter
Test Conditions(1)
Description
Min.
Typ.(2)
Max.
VIH
Input HIGH Voltage
Guaranteed HIGH level
2
-
-
VIL
Input LOW Voltage
Guaranteed LOW level
–0.5
-
0.8
VIK
Clamp Diode Voltage
VDD = Max., ISELx = –18mA
-
–0.7
–1.2
IIH
Input HIGH Current
VDD = Max., VSELx = VDD
-
-
±5
IIL
Input LOW Current
VDD = Max., VSELx = GND
-
-
±5
IOFF
Power Down Leakage Current
VDD = 0V, VB = 0V, VA ≤ 3.6
-
-
±1
RON
Switch On-Resistance(3)
VDD = Min., 0.9V ≤ Vinput ≤ 1.6V,
Iinput = –40mA
-
3
-
RFLAT(ON)
On-Resistance Flatness(4)
VDD = Min., Vinput @ 0V and 1.5V,
Iinput = –40mA
-
0.1
-
∆RON
On-Resistance match from center
ports to any other port(4)
VDD = Min., 0.9V ≤ Vinput ≤ 1.6V,
Iinput = –40mA
-
0.2
-
Units
V
μA
Ohm
Capacitance (TA = 25°C, f = 1MHz)
Parameters(4)
Test Conditions(1)
Description
CIN
Input Capacitance
COFF
Switch I Capacitance, Switch OFF
CON
Switch Capacitance, Switch ON
Typ.(2)
Units
2.5
VSELx = 0V
2.2
pF
6.2
Notes:
1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading.
3. Measured by the voltage drop between input and output pins at indicated current through the switch.
4. This parameter is determined by device characterization but is not production tested.
09-0024
4
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Power Supply Characteristics
Parameters
IDD
Test Conditions(1)
Min.
Typ.(2)
Max.
Units
VDD = Max., VSELx = GND or VDD
-
0.7
1.5
mA
Description
Quiescent Power Supply Current
Notes:
1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading.
Dynamic Electrical Characteristics Over the Operating Range (TA=-40º to +85ºC, VDD=3.3V±10%, GND=0V)
Parameter
Description
Test Conditions
Min.
Typ.(2)
Max.
XTALK
Crosstalk
f = 250MHz, See Fig. 2
-
-55
-
OIRR
OFF Isolation
f = 250MHz, See Fig. 3
-
-42
-
BW
Bandwidth –3dB
See Fig. 1
-
1
-
Units
dB
GHz
Switching Characteristics
Parameter
Description
Min.
Typ.(2)
-
0.25
Max.
tPD
Propagation Delay(2,3)
tPZH, tPZL
Line Enable Time - SEL to Input, Output
0.5
-
15
tPHZ, tPLZ
Line Disable Time - SEL to Input, Output
0.5
-
9
tSK(p)
Skew between opposite transitions of the same output
(tPHL - tPLH) (2)
-
0.1
0.2
Units
ns
Notes:
1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Guaranteed by design.
3. The switch contributes no propagational delay other than the RC delay of the On-Resistance of the switch and the load capacitance. The time
constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical
driving signals, it adds very little propagational delay to the system. Propagational delay of the LVDS switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.
09-0024
5
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Test Circuit for Electrical Characteristics(1)
6.0V
VDD
200-Ohm
VIN
Pulse
Generator
VOUT
D.U.T
10pF
CL
RT
200-Ohm
Notes:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
3. All input impulses are supplied by generators having the following characteristics: f = 10 MHz, ZO = 50-Ohm, tR ≤ 2.5ns, tF ≤ 2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
Switch Positions
Test
Switch
tPLZ, tPZL
6.0V
tPHZ, tPZH
GND
Prop Delay
Open
Test Circuit for Dynamic Electrical Characteristics
HP4396B
R
S
T
HP11667A
50-ohm
PI3LVD812
50-ohm
50-ohm
Figure 1. Bandwidth -3dB Testing
09-0024
6
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
HP4396B
R
S
T
HP11667A
PI3LVD812
50-Ohm
100Ohm
50-Ohm
50-Ohm
100Ohm
Figure 2. Crosstalk Test Setup
HP4396B
R
S
T
HP11667A
50-Ohm
50-Ohm
PI3LVD812
50-Ohm
100Ohm
Figure 3. Off Isolation Test Setup
09-0024
7
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Switching Waveforms
2.5V
SEL
3.5V
2.5V
Input
0V
2.5V
1.5V
tPLH
Output
tPZL
tPHL
2.5V
tPLZ
VDD/2
VOH
Output
1.25V
1.25V
VOL
VOL +0.3V
tPHZ
tPZH
2.5V
VOH
VDD/2
VOH –0.3V
VOH
VOL
Output
Voltage Waveforms Propagation Delay Times
VOL
Voltage Waveforms Enable and Disable Times
3.5V
2.5V
Data In
1.5V
tPLHX
3.5V
tPHLX
2.5V
VOH
Input
2.5V
Data Out
at Channel X
1.5V
tPLH
VOL
I
tPHL
VOH
tSK(o)
VOH
2.5V
Output
2.5V
Data Out
at Channel Y
VOL
VOL
tPLHy
tSK(p) = I tPHL – tPLH I
tPHLy
tSK(o) = I tPLHy – tPLHx I or I tPHLy – tPHLx I
Output Skew - tSK(o)
Pulse Skew - tSK(p)
Applications Information
Logic Inputs
The logic control inputs can be driven up to +3.6V regardless of the supply voltage. For example, given a +3.3V supply, the output
enables or select pins may be driven low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power consumption.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd
09-0024
8
PS9034A
07/13/09
PI3LVD812
3.3V, 8-differential Channel Dual-LVDS
Switch Targeted for 18-bit Displays
Packaging Mechanical: 80-Pin TQFN (ZP)
1
DATE: 11/05/08
DESCRIPTION: 5X11mm Dual Row TQFN
PACKAGE CODE: ZP80
REVISION: --
DOCUMENT CONTROL #: PD-2085
08-0529
Ordering Information
Ordering Code
PI3LVD812ZPE
Package Code
Package Description
ZP
Pb-free & Green, 80-pin Dual Row TQFN
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/.
2. E = Pb-Free & Green
3. X-Suffix = Tape & Reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
09-0024
9
PS9034A
07/13/09