PI5PD2068/2069 ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 70mΩ Current-Limited, Power-Distribution Switches Features 70mΩ High-Side MOSFET 2.1A Continuous Current Thermal and Short-Circuit Protection Accurate Current Limit (2.85A typ.) Operating Range: 2.7V to 5.5V 0.6ms Typical Rise Time Under-Voltage Lockout Deglitched Fault Report (/OC) No /OC Glitch During Power Up 1μA Maximum Standby Supply Current Reverse Current Blocking Built-in Soft-Start PT7M2061/PT7M2065 UL Recognized, File Number E341484 D AND DGN PACKAGE Pin Configuration (TOP VIEW) o GND 1 8 OUT IN 2 7 OUT IN 3 6 OUT 4 5 /OC PT7M2061/PT7M2065 D AND DGN PACKAGE PI5PD2068 View) (TOP (Top VIEW) PT7M2601/PT7M2065 o DBV PACKAGE GND 1 8 OUT (TOP VIEW) /EN IN OUT IN 2 1 3 GND EN 42 6 OUT IN OUT 5 /OC 7 5 Description The PI5PD2068/69 is an integrated 70mΩ N-channel MOSFET power switches for self-powered and buspowered Universal Series Bus (USB) applications. The devices are equipped with charge pump circuitry to drive the internal MOSFET switch. The switch’s low RDS(on), 70mΩ meets USB voltage drop requirements. This power-distribution switch is designed to set current limit at 2.85A typically. When the output load exceeds the current-limit threshold or a short-circuit situation is present, the devices limit the output current by switching into a constant-current mode, pulling the over-current (/OC) logic output low. When continuous heavy overloads and short-circuits PT7M2062(-1)/PT7M2066(-1) PT7M2065-1 increase the power dissipation in the switch, causing the D AND DGN PACKAGE DGN PACKAGE junction temperature to rise, a thermal protection (TOP VIEW) (TOP VIEW) circuit turns off the switch to prevent damage. Recovery from a o thermal shutdown is automatic oonce the device has GND 1 cooled sufficiently. 8 /OC1 Internal GND circuitry 1 8 that OUTthe ensures off until valid 2 switch remains IN INinput2 voltage is present. 7 OUT1 7 OUT 6 OUT */EN2 4 Applications 5 /OC2 EN 4 5 PT7M2062(-1)/PT7M2066(-1) PT7M2065-1 Laptop, Motherboard PC D AND DGNUSB PACKAGE Bus/Self Powered Hubs DGN PACKAGE (TOP (TOP VIEW) VIEW) TV and Set-top BOX Power switch o USB Peripherals o Battery-Powered Equipment GND 1 8 /OC1 GND 1 8 Hot-Plug Power Supplies 2 2 IN IN 7 OUT1 7 /OC */EN1 3 - IN /EN(PI5PD2068) OUT 1 EN(PI5PD2069) /OC 2 GND OUT Power /OC PAD(TM)3 OUT2 IN 3 OUT OUT */EN1 3 6 OUT2 IN 3 6 OUT */EN2 4 5 /OC2 EN 4 5 /OC /OC PI5PD2069 3 (Top4View)/EN Pin DescriptionPT7M2601/PT7M2065 DBV PACKAGE Pin No. Pin Name Type 1 GND (TOP VIEW) - Ground. 2, 3 4 4 5 6, 7, 8 6 Description I Power input voltage. I 5EnableIN input, logic low turns on power switch. I Enable input, logic high turns on power switch. O Over-current, open-drain output, active-low. O Power output voltage. Internally connected to GND; used to heat-sink the part to the circuit board traces. Should be - 4 /EN to GND pin connected 2013-07-0009 PT0332-4 1 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Function block diagram See Note A IN CS OUT Current Limit /OC Charge Pump /EN (See Note B) Driver UVLO Deglitch Thermal Sense GND Note A: Current sense Note B: Active low(/EN)for PI5PD2068; Active high(EN) for PI5PD2069 Maximum Ratings Storage Temperature ............................................................................. -65oC to +150oC Operating virtual junction temperature range, TJ EP-MSOP package ................................................................................ -40oC to +105oC SOIC package..............................................................................................0oC to +105oC Input Voltage range ( VI(IN)(2)) ....................................................................... -0.3V to +6V Output Voltage range ( VO(OUT)(2)) ............................................................... -0.3V to +6V Input Voltage range (VI(/EN), VI(EN))............................................................... -0.3V to +6V Voltage range (VI(/OC), VI(OC)) ....................................................................... -0.3V to +6V Continuous output current ( IO(OUT))........................................................... Internally limit Continuous total power dissipation....................................................... SOIC-8/600mW .......................................................................................................... EP-MSOP-8/1200mW Electrostatic discharge (ESD) protection.......... 4kV/Human body MIL-STD-883C Electrostatic discharge (ESD) protection............500V/Charge device model(CDM) Note: (1)Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. (2)All voltages are with respect to GND. Recommended Operating Conditions Symbol Description Min Type Max Unit VI(IN) Input Voltage 2.7 - 5.5 V VI(/EN), VI(EN),VI(/EN), VI(EN) Input Voltage 0 - 5.5 V Continuous Output Current Operating Virtual EP-MSOP Package Junction Temperature SOIC Package Range 0 - 2.1 A -40 - 105 0 - 105 IO(OUT), IO(OUTx) TJ 2013-07-0009 PT0332-4 2 ºC 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Electrical Characteristics Unless otherwise specified, -40°C≤TJ≤105°C for EP-MSOP Package, 0°C≤TJ≤105°C for SOIC Package, VI(IN) = 5.5V, IO = 2.1A, VI(/EN) =0V, or VI(EN) = 5.5V. Sym Power Switch Static drain-source on-state resistance, 5V operation and 3.3V operation RDS(on) Static drain-source on-state resistance, 2.7V operation(2) tr(2) tf (2) Test Conditions(1) Description Rise time, output Fall time, output Min Typ Max Unit VI(IN) = 5V or 3.3V, IO = 1.5A, - 70 115 mΩ VI(IN) = 2.7V, IO = 1.5A, - 75 125 mΩ VI(IN) = 5.5V - 0.6 1.5 - 0.4 1 0.05 - 0.5 0.05 - 0.5 2 - - - 0.8 VI(IN) = 2.7V VI(IN) = 5.5V CL=1F, RL=5Ω, TJ=25°C VI(IN) = 2.7V ms Enable Input /EN or EN VIH High-level input voltage 2.7 V ≤ VI(IN) ≤ 5.5 V VIL Low-level input voltage 2.7 V ≤ VI(IN) ≤ 5.5 V II Input current VI(EN) = 0 V or 5.5 V -0.5 - 0.5 ton Turn on time CL = 100F, RL = 5Ω - - 3 toff Turn off time CL = 100F, RL = 5Ω - - 10 1.6 2.1 2.6 A 2.3 2.85 3.4 A No load on OUT, TJ =25°C VI(/EN)=5.5V, or Over TJ range VI(EN)=0V No load on OUT, TJ=25°C VI(/EN) = 0V, or Over TJ range VI(EN)=5.5V OUT connected to ground, VI(/EN)=5.5V, or VI(EN)=0V VI(OUT)=5.5V, TJ =25°C IN=ground - 0.1 - - 0.2 - - 43 - - 43 - - 1 - - 0.1 - Low-level input voltage, IN - 2 - 2.5 V Hysteresis, IN TJ=25°C - 75 - mV Output low voltage IO(/OC)=5mA - - 0.4 V Off-state current VO(/OC)=5V or 3.3V - - 1 A /OC deglitch /OC assertion or deassertion 4 12 15 ms V A ms Current Limit IOS Short-circuit output current IOC-TRIP Overcurrent trip threshold VI(IN)=5V, OUT connected to GND, device enabled into short-circuit VI(IN)=5V, current ramp (≤100A/s) on OUT Supply Current ISTB Input supply current at output disable ISS Input supply current at output enable Leakage current Reverse leakage current A Under-Voltage Lockout Over-Current /OC VOL(/OC) Thermal Shutdown(3) 2013-07-0009 PT0332-4 3 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Thermal shutdown threshold - 135 - - °C Recovery from thermal shutdown - 125 - - °C Hysteresis - - 10 - °C Note: (1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately. (2) Not tested in production, specified by design. (3) The thermal shutdown only reacts under over current conditions. Typical Performance and Characteristics 1. Turn On Delay and Rise Time RL=5Ω, CL=1µF, TA=25℃ RL=5Ω, CL=1µF, TA=25℃ VI(/EN) 5V/Div VI(/EN) 5V/Div VO(OUT) 2V/Div VO(OUT) 2V/Div Time (200µs/Div) Time (200µs/Div) RL=5Ω, CL=100µF, TA=25℃ RL=5Ω, CL=100µF, TA=25℃ VI(/EN) 5V/Div VI(/EN) 5V/Div VO(OUT) 2V/Div VO(OUT) 2V/Div Time (200µs/Div) Time (400µs/Div) PT0332-4 2013-07-0009 4 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2. Over-Current /OC Response 3. TA=25℃, RL=0.5Ω, CL=0.1µF Output Short to Ground Then Enable TA=25℃ VO(/OC) 2V/Div VI(/EN) 2V/Div IO(OUT) 2A/Div IO(OUT) 1A/Div Time (2ms/Div) Time (200µs/Div) I 4. Inrush Current TA=25℃, VI(IN)=5V, RL=3Ω VI(/EN) 5V/Div IO(OUT) 1A/Div Time (1ms/Div) I 2013-07-0009 PT0332-4 5 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Turn On/Off Time vs. Input Voltage Turn On Time RL=5Ω, CL=100µF, TA=25℃ Turn Off Time RL=5Ω, CL=100µF, TA=25℃ 800 800 700 600 Turn Off Time (µs) Turn On Time (µs) 5. 600 500 400 200 0 2 3 4 Input Voltage (V) 5 6 2 Rise and Fall Time vs. Input Voltage Rise Time RL=5Ω, CL=1µF, TA=25℃ 800 400 600 300 400 100 0 0 3 4 Input Voltage (V) 4 Input Voltage (V) 5 6 5 6 200 200 2 3 Fall Time RL=5Ω, CL=1µF, TA=25℃ Fall Time (µs) Rise Time (µs) 6. 400 5 2 6 2013-07-0009 3 4 Input Voltage (V) PT0332-4 6 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Input Supply Current vs. Ambient Temperature Output Enable, TA=25℃ Output Disable, TA=25℃ 60 OUT Disable Supply Current (nA) OUT Enable Supply Current (µA) 7. Vin=5.5V Vin=5V Vin=3.3V Vin=2.7V 40 20 0 160 Vin=5.5V Vin=5V Vin=3.3V Vin=2.7V 120 80 40 0 -50 0 50 100 Ambient T emperature(℃) 150 -50 0 50 100 Ambient T emperature (℃) 150 Static Drain-Source on Resistance vs. Ambient Temperature 100 On Resistance (mΩ) 8. 200 80 60 40 Vin=5V Vin=3.3V Vin=2.7V 20 0 -50 0 50 100 Ambient T emperature(℃) 150 2013-07-0009 PT0332-4 7 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 9. Current Limit vs. Ambient Temperature Short-circuit Output Current vs. Ambient Temperature Threshold Trip Current vs. Input Voltage 3 Short Circuit Current (A) Threshold Trip Current (A) 4 3 2 1 0 Vin=5.5V Vin=5V Vin=3.3V Vin=2.7V 2.5 2 1.5 1 2 3 4 Input Voltage (V) 5 -50 6 0 50 100 Ambient T emperature (℃) 150 Application Information The power switch is an N-channel MOSFET with a low RDS(on) 70mΩ resistance. Configured as a high-side switch, the power switch prevents leakage current flow from output to input when chip disabled. The power switch supplies a maximum continuous current up to 2.1A. Power-Supply Considerations PI5PD2068 POWER SUPPLY 2.7V to 5.5V 0.1µF IN OUT IN OUT LOAD 0.1µF 22µF OUT /OC /EN GND Figure 1 Typical Application A 0.01μF to 1μF ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy. This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the output with a 0.01μF to 1μF ceramic capacitor improves the immunity of the device to short-circuit transients. Enable (/EN or EN) The enable pin is logic enable & disables the power switch, which is compatible with CMOS and TTL logic levels. The supply current is reduced to less than 1μA when a logic high is present on /EN, or when a logic low is present on EN. A logic zero input on /EN, or a logic high input on EN restores the bias to the driver and control circuits and turns the switch on 2013-07-0009 PT0332-4 8 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| /OC Output The /OC open-drain output is asserted (active low) when an over current or over temperature condition is asserted. The output remains asserted until the over current or over temperature condition is removed. The /OC pin requires a pull-up resistor, this resistor should be larger to reduce energy drain. A 100KΩ pull-up resistor works well for most applications. In the case of an over-current or short-circuit conditions, /OC will be asserted only after response delay time, Td, 14ms have elapsed. If an over temperature shutdown occurs, the /OC is asserted instantaneously. V+ PI5PD2068 IN /OC IN OUT GND OUT /EN OUT Rpullup Figure 2 Typical Circuit for the /OC Pin Under-Voltage Lockout (UVLO) A voltage sense circuit monitors the input voltage, an under voltage lockout ensures that the power switch is in the off state at power up. When the input voltage is below approximately 2V, a control signal turns off the power switch. Power Dissipation Calculation The low RDS(on) resistance on the N-channel MOSFET allows the small surface-mount packages to pass large currents. The thermal resistances of these packages are high compared to those of power packages. Begin by determining the RDS(on) of the N-channel MOSFET relative to the input voltage and operating temperature. Using this value, the power dissipation per switch can be calculated by: • PD = RDS(on)× I 2 Multiply this number by the number of switches being used. This step renders the total power dissipation from the N-channel MOSFET. Finally, calculate the junction temperature: • TJ = PD x RθJA + TA Where: • TA= Ambient temperature °C • RθJA = Thermal resistance • PD = Total power dissipation based on number of switches being used. Thermal Protection Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The PI5PD2068/69 implements a thermal protection circuitry to monitor the operating junction temperature of the power distribution switch. In an over current or short-circuit condition cause to the junction temperature rises, when the die temperature rises to approximately 135°C due to over current conditions, the internal thermal protection circuitry turns off the switch, thus preventing the device from damage. Hysteresis is built into the thermal protection circuitry, and after the device has cooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is removed. The opendrain false reporting output (/OC) is asserted (active low) when an over temperature shutdown or over current occurs. 2013-07-0009 PT0332-4 9 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Universal Serial Bus (USB) Application The universal serial bus (USB) interface is a 480Mb/s or 12Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB interface is conceived for dynamic attachdetach (hot plug-unplug) of peripherals. Two lines are provided for differential data, and two lines are provided for 5V power distribution. USB data is a 3.3V level signal, but power is distributed at 5V to allow for voltage drops in cases where power is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3V from the 5V input or its own internal power supply. The USB specification defines the following five classes of devices, each differentiated by power-consumption requirements: • Hosts/self-powered hubs (SPH) • Bus-powered hubs (BPH) • Low-power, bus-powered functions • High-power, bus-powered functions • Self-powered functions SPHs and BPHs distribute data and power to downstream functions. The PI5PD2061/65 has higher current capability than required by one USB port; so, it can be used on the host side and supplies power to multiple downstream ports or functions. Host/Self-Powered and Bus-Powered Hubs Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (see Figure 3). This power supply must provide from 5.25V to 4.75V to the board side of the downstream connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection and must report over current conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs. POWER SUPPLY 3.3V 5V Downstream USB Ports PI5PD2068 D+ 2, 3 Vbus OUT IN 0.1µF USB Controller 5 D- 6, 7, 8 0.1µF 120µF GND /OC 4 /EN GND 1 Figure 3 Typical Four-Port USB Host/Self-Powered Hub BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required to power up with less than one unit load. The BPH usually has one embedded function, and power is always available to the controller of the hub. If the embedded function and hub require more than 100mA on power up, the power to the embedded function may need to be kept off until enumeration is completed. This can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching the embedded function is not necessary if the aggregate power draw for the function and controller is less than one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the embedded function, and the downstream ports, and it is limited to 500mA from an upstream port. 2013-07-0009 PT0332-4 10 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| Mechanical Information WE (Lead free and Green SOIC-8) Unit: mm 2013-07-0009 PT0332-4 11 07/31/13 PI5PD2068/2069 70mΩ Current-Limited, Power-Distribution Switches |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| UEE (Lead free and Green EP-MSOP-8) Ordering Information Part Number Package Code Package PI5PD2068WE W Lead free and Green 8-Pin SOIC PI5PD2068UEE UE Lead free and Green 8-Pin EP-MSOP PI5PD2069WE W Lead free and Green 8-Pin SOIC PI5PD2069UEE UE Lead free and Green 8-Pin EP-MSOP Notes: E = Pb-free and Green Adding X Suffix= Tape/Reel Function comparison table Part Number Enable Recommended maximum continuous load current Typical short-circuit current limit at 25ºC Number of switches PI5PD2068 PI5PD2069 Active Low Active High 2.1A 2.1A Single Single Pericom Semiconductor Corporation 1-800-435-2336 www.pericom.com Pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom. 2013-07-0009 PT0332-4 12 07/31/13