SS246

SS246
CMOS High Sensitivity Micropower Hall Latch
Features and Benefits
Application Examples
– Micropower consumption for battery powered applications
– Latching output
– Operation down to 2.5V
– High sensitivity for direct reed switch replacement applications
– Chopper stabilized amplifier stage
– Solid state switch
– Handheld Wireless Handset Awake Switch
– Lid close sensor for battery powered devices
3 pin SOT23 (suffix SO)
3 pin SIP (suffix UA)
Functional Block Diagram
VDD
Sleep/Awake
L
i
OUT
Chopper
Hall
GND
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V3.10 Nov 1, 2013
SS246
CMOS High Sensitivity Micropower Hall Latch
General Description
against the predefined thresholds. This device requires the presence of both south and north polarity
magnetic fields for operation. In the presence of a
south polarity field of sufficient strength, the device
output latches on, and only switches off when a north
polarity field of sufficient strength is present.
The SS246 latching Hall effect sensor IC is fabricated
from mixed signal CMOS technology. It incorporates
advanced chopper-stabilization techniques to provide
accurate and stable magnetic switch points.
The circuit design provides an internally controlled
clocking mechanism to cycle power to the Hall element and analog signal processing circuits. This
serves to place the high current-consuming portions
of the circuit into a “Sleep” mode. Periodically the
device is “Awakened” by this internal logic and the
magnetic flux from the Hall element is evaluated
While in the “Sleep” cycle the output transistor is
latched in its previous state. The design has been optimized for service in applications requiring extended
operating lifetime in battery powered systems.
Glossary of Terms
MilliTesla (mT), Gauss
Units of magnetic flux density: 1mT = 10 Gauss
RoHS
Restriction of Hazardous Substances
Operating Point (BOP)
Magnetic flux density applied on the branded side of the package
which turns the output driver ON (VOUT = VDSon)
Release Point (BRP)
Magnetic flux density applied on the branded side of the package
which turns the output driver OFF (VOUT = high)
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SS246
CMOS High Sensitivity Micropower Hall Latch
Pin Definitions and Descriptions
SOT Pin № SIP Pin №
Name
Type
Function
1
1
VDD
Supply
Supply Voltage Pin
2
3
OUT
Output
Open Drain Output Pin
3
2
GND
Ground
Ground Pin
Internal Timing Circuit
Current
Period
Iaw
Sample & Output Latched
Iavg
Isp
Awake Taw:120μs
Sleep Tsl:70ms
0
Time
Absolute Maximum Ratings
Parameter
Symbol
Supply Voltage
VDD
6
V
Supply Current
IDD
50
mA
Output Voltage
VOUT
28
V
Output Current
IOUT
50
mA
Operating Temperature Range
TA
-40 to 150
°C
Storage Temperature Range
TS
-50 to 160
°C
4000
V
ESD Sensitivity
Value
3
Units
V3.10 Nov 1, 2013
SS246
CMOS High Sensitivity Micropower Hall Latch
Symbol
Value
Units
Temperature Suffix “E”
TA
-40 to 85
°C
Temperature Suffix “K”
TA
-40 to 125
°C
Temperature Suffix “L”
TA
-40 to 150
°C
Operating Temperature Range
Exceeding the absolute maximum ratings may cause permanent damage. Exposure to absolute-maximum- rated conditions for extended periods may affect device reliability.
General Electrical Specifications
DC Operating Parameters TA = 25°C, VDD= 2.75V
Parameter
Symbol
Test Conditions
Supply Voltage
VDD
Operating
Supply Current
IDD
Average
Output Current
IOUT
Saturation Voltage
VSAT
IOUT=1mA
Awake mode time
TAW
Operating
Sleep mode time
TSL
Operating
Min
Typ
Max
Units
2.5
3
5.5
V
μA
5
1.0
mA
0.4
V
μS
175
70
mS
Magnetic Specifications
DC Operating Parameters VDD = 2.5 to 5.5V (unless otherwise specified)
Package
Parameter
Symbol
Operating Point
BOP
Test Conditions
Min
Typ
Max
Units
10
30
50
G
-50
-30
-10
G
Ta=25°C
UA
Release Point
BRP
Hysteresis
BHYST
Operating Point
BOP
Vdd=2.75V DC
60
G
-50
-30
-10
G
10
30
50
G
Ta=25°C
SO
Release Point
Hysteresis
BRP
Vdd=2.75V DC
BHYST
60
4
G
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SS246
CMOS High Sensitivity Micropower Hall Latch
Output Behavior versus Magnetic Pole
DC Operating Parameters TA = -40°C to 150°C, VDD = 2.5 to 5.5V (unless otherwise specified)
Test Conditions (UA)
Test Conditions (SO)
OUT
B < BRP
B > BRP
High
B > BOP
B < BOP
Low
The SOT-23 device is reversed from the UA package. The SOT-23 output transistor will be turned on(drops low) in the presence of a
sufficiently strong North pole magnetic field applied to the marked face and turned off(hoists high) in the presence of a sufficiently
strong South pole magnetic field.
Unique Features
CMOS Hall IC Technology
The chopper stabilized amplifier uses switched capacitor techniques to eliminate the amplifier offset voltage,
which, in bipolar devices, is a major source of temperature sensitive drift. CMOS makes this advanced technique
possible. The CMOS chip is also much smaller than a bipolar chip, allowing very sophisticated circuitry to be
placed in less space. The small chip size also contributes to lower physical stress and less power consumption.
ESD Protection
Human Body Model (HBM) tests according to: Mil. Std. 883F method 3015.7
Limit Values
Parameter
Symbol
Unit
Min
ESD Voltage
VESD
Notes
Max
±4
kV
ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD). Always observe Electro Static
Discharge control procedures whenever handling semiconductor products.
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SS246
CMOS High Sensitivity Micropower Hall Latch
Package Information
2.13
1.87
0.75 ± 0.05
1.52 ± 0.1
Package TO92 3-Pin SIP:
3° ± 1°
1.00
1.20
45° ± 1°
4.0 ± 0.01
1
2
3
3.0 ± 0.01
Sensor Location
Active Area Depth:
0.84(Nom)
3° ± 1°
6° ± 1°
3° ± 1°
6° ± 1°
1
2
0.05 ± 0.05
3
1.6.± 0.1
0.44± 0.01
0.38 ± 0.01
14 .5 ± 1
0.39± 0.01
Notes:
1). Controlling dimension : mm ;
2). Leads must be free of flash and plating voids ;
3). Do not bend leads within 1 mm of lead to package
interface ;
4). PINOUT: Pin 1 VDD
Pin 2 GND
Pin 3 Output
1.27
2.54
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SS246
CMOS High Sensitivity Micropower Hall Latch
Package 3-Pin SOT-23：
Notes:
1.
PINOUT:
Top View
3
1.50 2.60
1.80 3.00
1
2.
Pin 1 VDD
Pin 2 Output
Pin 3 GND
All dimensions are in millimeters ;
2
1.70
2.10
Side View
End View
2.70
3.10
0.10
0.25
1.00
1.30
0.70
0.90
0.20
MIN
0.00
0.10
0.35
0.50
SOT-23 Package Hall Location:
Bottom View of SOT-23 Package
3
Chip
0.56
0.66
0.95
2
1
1.50
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SS246
CMOS High Sensitivity Micropower Hall Latch
Package 3-Pin TSOT-23：
Notes
1). PINOUT:
Top
3
2.65
1.60 2.95
1.70
1
Pin 1 VDD
Pin 2 Output
Pin 3 GND
2). All dimensions are in millimeters;
2
1.70
2.10
Side Vie
End
2.82
3.02
0.08
0.20
0.70
0.90
0.70
0.80
0.20
Min
0.00
0.10
0.35
0.50
TSOT-23 Package Hall Location:
Bottom View of TSOT-23 Package
3
Chip
0.36
0.46
0.95
2
1
1.50
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SS246
CMOS High Sensitivity Micropower Hall Latch
Ordering Information
Part No.
Pb-free
Temperature Code
Package Code
Packing
SS246ESOT
YES
-40°C to 85°C
SOT-23
7-in. reel, 3000 pieces/ reel
SS246ESTT
YES
-40°C to 85°C
TSOT-23
7-in. reel, 3000 pieces/ reel
SS246EUA
YES
-40°C to 85°C
TO-92
Bulk, 1000 pieces/ bag
SS246KSOT
YES
-40°C to 125°C
SOT-23
7-in. reel, 3000 pieces/ reel
SS246KSTT
YES
-40°C to 125°C
TSOT-23
7-in. reel, 3000 pieces/ reel
SS246KUA
YES
-40°C to 125°C
TO-92
Bulk, 1000 pieces/ bag
SS246LSOT
YES
-40°C to 150°C
SOT-23
7-in. reel, 3000 pieces/ reel
SS246LSTT
YES
-40°C to 150°C
TSOT-23
7-in. reel, 3000 pieces/ reel
SS246LUA
YES
-40°C to 150°C
TO-92
Bulk, 1000 pieces/ bag
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