ADS-939A

ADS-939A
16-Bit, 10MHz Sampling A/D Converters
PRELIMINARY DATA
FEATURES
■
16-bit resolution
■
10MHz sampling rate
■
Functionally complete
■
No missing codes over full military temperature range
■
Edge-triggered
■
±5V, ±12V or ±15V supplies, 1.5 Watts
■
Small, 40-pin, ceramic TDIP
■
82dB SNR, –86dB THD
■
Ideal for both time and frequency-domain applications
INPUT/OUTPUT CONNECTIONS
GENERAL DESCRIPTION
The ADS-939A is a 16-bit, 10MHz sampling A/D converter. This device
accurately samples full-scale input signals up to Nyquist frequencies with
no missing codes. The dynamic performance of the ADS-939A has been
optimized to achieve a signal-to-noise ratio (SNR) of 82dB and a total
harmonic distortion (THD) of –86dB.
Packaged in a 40-pin TDIP, the functionally complete ADS-939A contains a
fast-settling sample-hold amplifier, a subranging (two-pass) A/D converter,
an internal reference, timing/control logic, and error-correction circuitry.
Digital input and output levels are TTL. The ADS-939A only requires the
rising edge of the start convert pulse to operate.
Requiring ±5V supplies and either ±12v or ±15V supplies the ADS-939A
dissipates 3.0 Watts. The device is offered with a bipolar (±2.75V) or a
unipolar (0 to –5.5V) analog input range. Models are available for use
in either commercial (0 to +70°C) or military (–55 to +125°C) operating
temperature ranges. A proprietary, auto-calibrating, error-correcting circuit
enables the device to achieve specified performance over the full military
temperature range. Typical applications include medical imaging, radar,
sonar, communications and instrumentation.
PIN
FUNCTION
PIN
FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+3.2V REF. OUT
UNIPOLAR
ANALOG INPUT
ANALOG GROUND
OFFSET ADJUST
GAIN ADJUST
DIGITAL GROUND
NC
NC
NC
NC
START CONVERT
BIT 16 (LSB)
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
+12V/+15V
–12V/–15V
+5V ANALOG SUPPLY
–5V SUPPLY
ANALOG GROUND
COMP. BITS
OUTPUT ENABLE
OVERFLOW
EOC
+5V DIGITAL SUPPLY
DIGITAL GROUND
BIT 1 (MSB)
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
10 FSTAT1
11 FSTAT2
GAIN ADJUST 6
GAIN
ADJUST
CKT.
8 FIFO/DIR
9 FIFO/READ
29 BIT 1 (MSB)
POWER AND GROUNDING
28 BIT 1 (MSB)
31
–5V SUPPLY
37
ANALOG GROUND
4, 36
DIGITAL GROUND
7, 30
OFFSET ADJUST 5
OFFSET
ADJUST
CKT.
–12 / –15V ANALOG SUPPLY 39
+12 / +15V ANALOG SUPPLY 40
UNIPOLAR 2
ANALOG INPUT 3
S/H
26 BIT 3
25 BIT 4
3-STATE
OUTPUT REGISTER
+5V DIGITAL SUPPLY
27 BIT 2
CUSTOM GATE ARRAY
38
PRECISION
+3.2V REFERENCE
2-PASS ANALOG-TO-DIGITAL CONVERTER
+5V ANALOG SUPPLY
+3.2V REF. OUT 1
24 BIT 5
23 BIT 6
22 BIT 7
21 BIT 8
20 BIT 9
19 BIT 10
18 BIT 11
17 BIT 12
16 BIT 13
15 BIT 14
14 BIT 15
13 BIT 16 (LSB)
START CONVERT 12
EOC 32
34 OUTPUT ENABLE
TIMING AND
CONTROL LOGIC
33 OVERFLOW
COMP. BITS 35
Figure 1. ADS-939A Functional Block Diagram
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
• Tel: (508) 339-3000
•
www.datel.com
•
e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 1 of 7
ADS-939A
16-Bit, 10MHz Sampling A/D Converters
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+5V Supply (Pins 31, 38)
–5V Supply (Pin 37)
+12V/+15V Supply (pin 40)
–12V/–15V Supply (pin 39)
Digital Inputs (Pins 8, 9, 12, 34, 35)
Analog Input (Pin 3)
Lead Temperature (10 seconds)
PHYSICAL/ENVIRONMENTAL
LIMITS
UNITS
0 to +6
0 to –6
0 to +16V
0 to +16V
–0.3 to +VDD +0.3
±5
+300
Volts
Volts
Volts
Volts
Volts
Volts
°C
PARAMETERS
MIN.
TYP.
MAX.
UNITS
0
–55
—
—
+70
+125
°C
°C
Operating Temp. Range, Case
ADS-939AMC
ADS-939AMM
Thermal Impedance
θjc
θca
Storage Temperature Range
Package Type
Weight
—
—
–65
4
—
°C/Watt
18
—
°C/Watt
—
+150
°C
40-pin, metal-sealed, ceramic TDIP
0.56 ounces (16 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±VCC = ±12/15V, +VDD = ±5V, 10MHz sampling rate, and a minimum 3 minute warm-up ➀ unless otherwise specified.)
+25°C
ANALOG INPUT
Input Voltage Range
Unipolar
Bipolar
Input Resistance (Pin 3)
(Pin 2)
Input Capacitance
MIN.
TYP.
0 to +70°C
MAX.
MIN.
TYP.
–55 to +125°C
MAX.
MIN.
TYP.
MAX.
UNITS
—
—
—
—
—
0 to –5.5V
±2.75
400
480
10
—
—
—
—
15
—
—
—
—
—
0 to –5.5V
±2.75
400
480
10
—
—
—
—
15
—
—
—
—
—
0 to –5.5V
±2.75
400
480
10
—
—
—
—
15
Volts
Volts
Ω
Ω
pF
+2.0
—
—
—
20
—
—
—
—
50
—
+0.8
+20
–20
—
+2.0
—
—
—
20
—
—
—
—
50
—
+0.8
+20
–20
—
+2.0
—
—
—
20
—
—
—
—
50
—
+0.8
+20
–20
—
Volts
Volts
μA
μA
ns
—
—
–0.95
—
—
—
—
16
16
±1
±0.5
±0.15
±0.1
±0.1
±0.15
—
—
—
+1.0
±0.3
±0.2
±0.2
±0.3
—
—
—
–0.95
—
—
—
—
16
16
±1.5
±0.5
±0.3
±0.2
±0.2
±0.3
—
—
—
+1.0
±0.5
±0.4
±0.4
±0.5
—
—
—
–0.95
—
—
—
—
16
16
±2
±0.5
±0.5
±0.4
±0.4
±0.5
—
—
—
+1.5
±0.8
±0.6
±0.6
±0.8
—
Bits
LSB
LSB
%FSR
%FSR
%FSR
%
Bits
—
—
–87
–82
TBD
TBD
—
—
–87
–82
TBD
TBD
—
—
–82
–78
TBD
TBD
dB
dB
—
—
–86
–81
TBD
TBD
—
—
–86
–81
TBD
TBD
—
—
–81
–77
TBD
TBD
dB
dB
TBD
TBD
86
85
—
—
TBD
TBD
86
85
—
—
TBD
TBD
80
80
—
—
dB
dB
TBD
TBD
—
82
81
80
—
—
—
TBD
TBD
—
82
81
80
—
—
—
TBD
TBD
—
78
75
80
—
—
—
dB
dB
μVrms
—
—
–87
400
–85
—
–87
400
–85
—
–87
400
–82
dB
MHz
—
—
—
—
90
±1200
4
0.2
—
—
—
—
—
—
—
—
90
±1200
4
0.2
—
—
—
—
—
—
—
—
90
±1200
4
0.2
—
—
—
—
dB
V/μs
ns
ps rms
—
—
10
40
100
—
—
—
—
—
—
10
40
100
—
—
—
—
—
—
10
45
100
—
—
—
—
ns
ns
MHz
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0" ➁
Start Convert Positive Pulse Width ➂
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
Differential Nonlinearity (fin = 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error (Tech Note 2)
Bipolar Offset Error (Tech Note 2)
Gain Error (Tech Note 2)
No Missing Codes (fin = 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics (–3dB)
dc to 500kHz
500kHz to 5MHz
Total Harmonic Distortion (–3dB)
dc to 500kHz
500kHz to 5MHz
Signal-to-Noise Ratio
(w/o distortion, –3dB)
dc to 500kHz
500kHz to 5MHz
Signal-to-Noise Ratio ➃
(& distortion, –3dB)
dc to 500kHz
500kHz to 5MHz
Noise
Two-Tone Intermodulation
Distortion (fin = 200kHz,
240kHz, fs = 10MHz, –3dB)
Input Bandwidth (–3dB)
Feedthrough Rejection
(fin = 1MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
S/H Acquisition Time
( to ±0.001%FSR, 5.5V step)
Overvoltage Recovery Time ➄
A/D Conversion Rate
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
• Tel: (508) 339-3000
•
www.datel.com
•
e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 2 of 7
ADS-939A
16-Bit, 10MHz Sampling A/D Converters
DYNAMIC PERFORMANCE (Cont.)
MIN.
+25°C
TYP.
MAX.
MIN.
0 TO +70°C
TYP.
MAX.
—
—
—
+3.2
±30
5
—
—
—
—
—
—
+3.2
±30
5
—
—
—
–55 TO +125°C
MIN.
TYP.
MAX.
UNITS
—
—
—
Volts
ppm/°C
mA
ANALOG OUTPUT
Internal Reference
Voltage
Drift
External Current
+3.2
±30
5
—
—
—
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding ➅
+2.4
—
—
+2.4
—
—
+2.4
—
—
—
—
+0.4
—
—
+0.4
—
—
+0.4
—
—
–4
—
—
–4
—
—
–4
—
—
+4
—
—
+4
—
—
+4
(Offset) Binary / Complementary (Offset) Binary / Two's Complement / Complementary Two's Complement
Volts
Volts
mA
mA
Power Supply Ranges ➆
+5V Supply
–5V Supply
+12V Supply ➇
–12V Supply ➇
+15V Supply ➇
–15V Supply ➇
+4.75
–4.75
+11.5
–11.5
+14.5
–14.5
+5.0
–5.0
+12.0
–12.0
+15.0
–15.0
+5.25
–5.25
+12.5
–12.5
+15.5
–15.5
+4.75
–4.75
+11.5
–11.5
+14.5
–14.5
+5.0
–5.0
+12.0
–12.0
+15.0
–15.0
+5.25
–5.25
+12.5
–12.5
+15.5
–15.5
+4.9
–4.9
+11.5
–11.5
+14.5
–14.5
+5.0
–5.0
+12.0
–12.0
+15.0
–15.0
+5.25
–5.25
+12.5
–12.5
+15.5
–15.5
Volts
Volts
Volts
Volts
Volts
Volts
Power Supply Currents
+5V Supply
–5V Supply
–12/15V Supply ➇
+12/15V Supply ➇
Power Dissipation
Power Supply Rejection
—
—
—
—
—
—
+50
–36
–25
+70
1.5
—
—
—
—
—
TBD
±0.07
—
—
—
—
—
—
TBD
TBD
TBD
TBD
TBD
—
—
—
—
—
TBD
±0.07
—
—
—
—
—
—
TBD
TBD
TBD
TBD
TBD
—
—
—
—
—
TBD
±0.07
mA
mA
mA
mA
Watts
%FSR/%V
POWER REQUIREMENTS
Footnotes:
➄ This is the time required before the A/D output data is valid once the analog
input is back within the specified range.
➀ All power supplies must be on before applying a start convert pulse. All
supplies and the clock (START CONVERT) must be present during warm-up
periods. The device must be continuously converting during this time.
➅ See table 2a, Setting Output Coding Selection.
➁ When COMP. BITS (pin 35) is low, logic loading "0" will be –350μA.
➂ A 10MHz clock with a 50nsec positive pulse width is used for all production
testing. See Timing Diagram for more details.
➆ The minimum supply voltages of +4.9V and –4.9V for ±VDD are required for
–55°C operation only. The minimum limits are +4.75V and –4.75V when
operating at +125°C.
➃ Effective bits is equal to:
➇ ±12V only or ±15V only required.
(SNR + Distortion) – 1.76 +
20 log
Full Scale Amplitude
Actual Input Amplitude
6.02
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-939A requires
careful attention to pc-card layout and power supply decoupling. The
device's analog and digital ground systems are connected to each
other internally. For optimal performance, tie all ground pins (4, 7, 30
and 36) directly to a large analog ground plane beneath the package.
For the best performance it is recommended to use a single power
source for both the +5V analog and +5V digital supplies. Bypass all
power supplies and the +3.2V reference output to ground with 4.7μF
tantalum capacitors in parallel with 0.1μF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-939A achieves its specified accuracies without the need
for external calibration. If required, the device's small initial offset
and gain errors can be reduced to zero using the adjustment circuitry
shown in Figure 2. When using this circuitry, or any similar offset and
gain calibration hardware, make adjustments following warm-up. To
avoid interaction, always adjust offset before gain. Tie pins 5 and 6 to
ANALOG GROUND (pin 4) if not using offset and gain adjust circuits.
3. Pin 35 (COMP. BITS) is used to select the digital output coding format
of the ADS-939A. See Tables 2a and 2b. When this pin has a TTL
logic "0" applied, it complements all of the ADS-939A’s digital outputs.
When pin 35 has a logic "1" applied, the output coding is compleDATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
4.
5.
6.
7.
mentary (offset) binary. Applying a logic "0" to pin 35 changes the
coding to (offset) binary. Using the MSB output (pin 29) instead of
the MSB output (pin 28) changes the respective output codings to
complementary two's
complement and two's complement.
Pin 35 is TTL compatible and can be directly driven with digital logic
in applications requiring dynamic control over its function. There
is an internal pull-up resistor on pin 35 allowing it to be either connected to +5V or left open when a logic "1" is required.
To enable the three-state outputs, connect OUTPUT
ENABLE (pin 34) to a logic "0" (low). To disable, connect pin 34 to a
logic "1" (high).
Applying a start convert pulse while a conversion is in progress
(EOC = logic "1") will initiate a new and probably inaccurate conversion cycle. Data from both the interrupted and subsequent conversions will be invalid.
Do not enable/disable or complement the output bits or read from
the FIFO during the conversion process (from the rising edge of
EOC to the falling edge of EOC).
The OVERFLOW bit (pin 33) switches from 0 to 1 when the input
voltage exceeds that which produces an output of all 1’s or when
the input equals or exceeds the voltage that produces all 0’s. When
COMP BITS is activated, the above conditions are reversed.
• Tel: (508) 339-3000
•
www.datel.com
•
e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 3 of 7
ADS-939A
16-Bit, 10MHz Sampling A/D Converters
CALIBRATION PROCEDURE
Connect the converter per Figure 2. Any offset/gain
calibration procedures should not be implemented until the
device is fully warmed up. To avoid interaction, adjust offset
before gain. The ranges of adjustment for the circuits in
Figure 2 are guaranteed to compensate for the ADS-939A’s
initial accuracy errors and may not be able to compensate for
additional system errors.
A/D converters are calibrated by positioning their digital
outputs exactly on the transition point between two adjacent
digital output codes. This is accomplished by connecting
+5V
–5V
5
OFFSET
AD UST
6
GAIN
AD UST
+12/+15V
–12/–15V
39
0.1μF
40
+
0.1μF
Note: Connect pin 5 to ANALOG GROUND (pin 4) for
operation without zero/offset adjustment. Connect pin 6 to
pin 4 for operation without gain adjustment.
–5V
+5V
+
4.7μF
33 OVERFLOW
4.7μF
32 EOC
+5V
31
+
28 BIT 1 (MSB)
7, 30 DIGITAL GROUND
26 BIT 3
25 BIT 4
24 BIT 5
+5V
+
4.7μF
23 BIT 6
22 BIT 7
0.1μF
4, 36
+
4.7μF
+5V ANALOG
38
37
–5V
21 BIT 8
ANALOG GROUND
0.1μF
–5V
34
ENABLE
8
FIFO/DIR
10
FSTAT1
11
FSTAT2
1
+3.2V REF. OUT
20 BIT 9
19 BIT 10
18 BIT 11
ADS-935
17 BIT 12
16 BIT 13
15 BIT 14
14 BIT 15
13 BIT 16 (LSB)
ANALOG INPUT 3
+5V
FIFO READ 9
+
0.1μF
COMP. BITS 35
Connect for
Unipolar Model
(0 to –5.5V)
1. Apply a train of pulses to the START CONVERT input (pin
12) so that the converter is continuously converting.
2. For zero/offset adjust, apply –42μV to the ANALOG INPUT
(pin 3).
3. For bipolar operation - Adjust the offset potentiometer until
the code flickers between 1000 0000 0000 0000 and 0111
1111 1111 1111 with pin 35 tied high (complementary offset
binary) or between 0111 1111 1111 1111 and 1000 0000 0000
0000 with pin 35 tied low (offset binary).
For unipolar operation - Adjust the offset potentiometer until
all outputs are 1's and the LSB flickers between 0 and 1 with
pin 35 tied high (complementary binary) or until all outputs
are 0's and the LSB flickers between 0 and 1 with pin 35 tied
low (binary).
4. For bipolar, Two's complement coding requires using
BIT 1 (MSB) (pin 29). With pin 35 tied low, adjust the trimpot
until the output code flickers between all 0’s and all 1’s.
START CONVERT 12
4.7μF
2
Zero/Offset Adjust Procedure
29 BIT 1 (MSB)
+5V DIGITAL
27 BIT2
0.1μF
4.7μF
For the ADS-939A, offset adjusting is normally accomplished
when the analog input is 0 minus ½ LSB (–42μV). See Table
2b for the proper bipolar output coding.
Gain adjusting is accomplished when the analog input
is at nominal full scale minus 1½ LSB's (+2.749874V or
–5.499874V).
20k Ω
20k Ω
LED's to the digital outputs and performing adjustments until
certain LED's "flicker" equally between on and off. Other
approaches employ digital comparators or microcontrollers to
detect when the outputs change from one code to the next.
UNIPOLAR
For Bipolar
Gain Adjust Procedure
Figure 2. Connection Diagram
Table 2a. Setting Output Coding Selection (Pin 35)
OUTPUT FORMAT
PIN 35 LOGIC LEVEL
Complementary (Offset) Binary
1
(Offset) Binary
0
Complementary Two’s Complement
(Using MSB, pin 29)
1
Two’s Complement
(Using MSB, pin 29)
0
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
1. For gain adjust, for bipolar apply +2.749874V and for unipolar mode 5.499874V to the ANALOG INPUT (pin 3).
2. Adjust the gain potentiometer until all output bits are 0’s and
the LSB flickers between a 1 and 0 with pin 35 tied high
(complementary (offset) binary) or until all output bits are 1’s
and the LSB flickers between a 1 and 0 with pin 35 tied low
((offset) binary).
3. For bipolar, Two's complement coding requires using
BIT 1 (MSB) (pin 29). With pin 35 tied low, adjust the gain
trimpot until the output code flickers equally between 0111
1111 1111 1111 and 0111 1111 1111 1110.
4. To confirm proper operation of the device, vary the applied
input voltage to obtain the output coding listed in Table 2b.
• Tel: (508) 339-3000
•
www.datel.com
•
e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 4 of 7
ADS-939A
16-Bit, 10MHz Sampling A/D Converters
Table 2b. Output Coding
COMP. BINARY
BINARY
COMP. TWO'S COMP.
INPUT
RANGE
UNIPOLAR
MSB
LSB MSB
LSB
0 to –5.5V
SCALE
0 –1 LSB
–0.000084 1111 1111 1111 1111 0000 0000 0000 0000
LSB "1" to "0"
LSB "0" to "1"
0 –1 1/2 LSB
–0.000126
0 – 1/8 FS
–0.687500 1110 0000 0000 0000 0001 1111 1111 1111
0 – 1/4 FS
–1.375000 1100 0000 0000 0000 0011 1111 1111 1111
–1/2 FS – 1/2LSB –2.749958 1000 0000 0000 0000 0111 1111 1111 1111
–1/2 LSB
–2.750000 0111 1111 1111 1111 1000 000 000 0000
–3/4 FS
–4.125000 0100 0000 0000 0000 1011 1111 1111 1111
–7/8 FS
–4.812500 0010 0000 0000 0000 1101 1111 1111 1111
–FS +1 LSB
–5.499916 0000 0000 0000 0001 1111 1111 1111 1110
LSB "0" to "1"
LSB "1" to "0"
–FS + 1/2 LSB
–5.499958
–FS
–5.500000 0000 0000 0000 0000 1111 1111 1111 1111
OFFSET BINARY
COMP. OFF. BIN.
MSB
LSB
0111 1111 1111 1111
LSB "1" to "0"
0110 0000 0000 0000
0100 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
1100 0000 0000 0000
1010 0000 0000 0000
1000 0000 0000 0001
LSB "0" to "1"
1000 0000 0000 0000
TWO'S COMP.
TWO'S COMP.
INPUT
RANGE
BIPOLAR
±2.75V
SCALE
+2.749916
+FS –1 LSB
+2.749874 +FS –1 1/2 LSB
+2.062500
+3/4 FS
+1.375000
+1/2 FS
0.000000
0
–0.000084
–1 LSB
–1.375000
–1/2 FS
–2.062500
–3/4 FS
–2.749916
–FS +1 LSB
–2.749958 –FS + 1/2 LSB
–2.750000
–FS
MSB
LSB
1000 0000 0000 0000
LSB "0" to "1"
1001 1111 1111 1111
1011 1111 1111 1111
1111 1111 1111 1111
0000 0000 0000 0000
0011 1111 1111 1111
0101 1111 1111 1111
0111 1111 1111 1110
LSB "1" to "0"
0111 1111 1111 1111
COMP. TWO'S COMP.
THERMAL REQUIREMENTS
underneath the package. Devices should be soldered to
boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and –55 to +125°C. All room-temperature (TA = +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat
sinks. See Ordering Information for the assigned part
number. See page 1-183 of the DATEL Data Acquisition
Components Catalog for more information on the HS Series.
Request DATEL Application Note AN-8, "Heat Sinks for DIP
Data Converters," or contact DATEL directly, for additional
information.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible
to help conduct heat away from the package. Electrically
insulating, thermally-conductive "pads" may be installed
Scale is approximately 25ns per division. fs = 10MHz
START
CONVERT
N+2
N+1
N
N+4
N+3
N+5
N+7
N+6
N+8
50ns
5ns typ.
35ns
INTERNAL S/H
65ns
60ns
10ns typ.
EOC
40ns
20ns typ.
OUTPUT
DATA
N-8
N-7
N-6
N-5
N-4
N-3
N-2
N-1
N
20ns typ.
Figure 3. ADS-939A Timing Diagram
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
• Tel: (508) 339-3000
•
www.datel.com
•
e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 5 of 7
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
• Tel: (508) 339-3000
•
www.datel.com
•
7
X1
14
B1
SG4
SG3
SG2
SG1
26
24
22
20
18
16
14
12
10
8
6
4
2
50
R6
P2
3
2
0.1μF
3
2
J1
4
7
2
6
5
AGND
C13
2.2μF
AGND
C11
2.2μF
L1
1
SG5
20mH
L4
20mH
L3
20mH
L2
+5VA
–5VA
+5VD
+5VF
AGND
2
AGND
OFFSET
ADJUST
AGND
C2
2.2μF
C1
2.2μF
20mH
3.3k
R3
C9
2.2μF
DGND
2.2μF
C7
DGND
C10
1 33pF
2
1
74HCT74
U1
4
+5VF
6
R2
+15V DGND
+5VA
–15V
–5VA
+5VD
3 2 1
DGND
DGND
C6
2.2μF
+5VF
25
23
21
19
17
15
13
11
9
7
5
3
1
AR1
C5
DGND
START CONVERT
7 10MHZ 8
1
13
8
9
14
74HCT74
U1
10
DGND
11
12
AGND
DGND
2
AGND
+5VF
B2
ANALOG INPUT
AMPLIFIER
OPTION
AGND
R1
3
1
–5VA
R4
20k
+5VA
DGND
SG9
RD
FIF
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
B9
B10
B11
B12
B13
B14
B15
LSB
START
FSTAT2
FSTAT1
READ
UUT
U6
2
3
1
–5VA
R5
20k
+5VA
GAIN ADJUST
+5VF
DGND
38
39
40
12
13
3
EOC
AB8
AB7
AB6
AB5
AB4
AB3
AB2
AB1
+5VD
COMP
3
FST1
7 74HC86
U5
14
74HC86
8
U5
FST2
U5
DGND
+5VF
9
10
2
1
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
–5VA
+5VA
DGND
C15
0.1μF
74HC86
B8
B7
B6
B5
B4
B3
B2
MSB
MSB
DGND
+5VD
EOC
OF
ENABLE
COMP
AGND
-5VA 37
+5VA
–12/–15V
+12/+15V
C4
2.2μF
ADS-939
FIFO/DIR
DGND
GAIN
OFFSET
AGND
ANA IN
AGND
+3.2VREF
AGND
C3
0.1μF
74HC86
4
U5 6 START
CONVERT
5
AB9
AB10
AB11
AB12
AB13
AB14
AB15
AB16
–15V
–5VA
+15V
+5VA
SG6
SG8
SG7
AB2
AB1
C16
0.1μF
AB8
AB9
AB10
AB11
AB12
AB13
AB14
AB15
AB16
DGND
C8
0.1μF
+5VF
DGND
C17
0.1μF
+5VF
AB7
AB6
AB5
AB4
DGND AB3
+5VF
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
U2
10
U3
10
1
U4
10
1
11
1
74HCT573
20
11
74HCT573
20
11
74HCT573
20
DGND
19
18
17
16
15
14
13
12
19
18
17
16
15
14
13
12
B9
B10
B11
B12
B13
B14
B15
+5VD
FIF
RD
DGND
COMP
START
B16 (LSB)
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1(MSB)
AGND
DGND
1
3
5
7
9
1 2 3
1 2 3
1 2 3
J5
J4
J3
FIFO/DIR
READ
COMPLIM
ENABLE
FST2
FST1
FIF/DIR
N.C.
READ
COMPLIM
ENABLE
DGND
DGND
DGND
DGND
DGND
DGND
DGND
EOC
OVRFLW
1 2 3 J2
2
4
6
8
10
12 11
14 13
16 15
18 17
P1
20 19
22 21
24 23
26 25
28 27
30 29
32 31
B1B MSB
DGND
AGND
C21
2.2μF
+5VA
C12
2.2μF
–5VA
AGND
C14
2.2μF
+5VD
34 33
C20
0.1μF
+5VA
C19
0.1μF
–5VA
AGND
DGND
0.1μF
0.1μF
C18
0.1μF
+5VD
B16 (LSB)
DGND
B8
B7
B6
B5
B4
B3
B2
B1 (MSB)
DGND
19 B1B MSB
18 OVRFLW
17
16
15
14
13
12
ADS-939A
16-Bit, 10MHz Sampling A/D Converters
Preliminary Evaluation Board - Modified ADS-B933 to include ±12V or ±15V Supplies to U6
Figure 4. ADS-939A Evaluation Board Schematic.
e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 6 of 7
ADS-939A
16-Bit, 10MHz Sampling A/D Converters
MECHANICAL DIMENSIONS INCHES (mm)
2.12/2.07
(53.85/52.58)
40
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
21
Lead Material: Kovar alloy
1.11/1.08
(28.20/27.43)
1
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
20
0.100 TYP.
(2.540)
1.900 ±0.008
(48.260)
0.245 MAX.
(6.223)
PIN 1 INDEX
( ON TOP)
0.200/0.175
(5.080/4.445)
0.015/0.009
(0.381/0.229)
0.210 MAX.
(5.334)
0.018 ±0.002
(0.457)
0.045/0.035
(1.143/0.889)
0.110/0.090
(2.794/2.286)
0.900 ±0.010
(22.86)
0.110/0.090
(2.794/2.286
SEATING
PLANE
0.035/0.015
(0.889/0.381)
ORDERING INFORMATION
MODEL
ADS-939AMC
ADS-939AMM
OPERATING
TEMP. RANGE
0 to +70°C
–55 to +125°C
ACCESSORIES
ADS-B939
HS-40
Evaluation Board (without ADS-939A)
Heat Sink for all ADS-939A models
Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead
Socket), 40 required. For MIL-STD-883 product, or surface mount packaging, contact DATEL.
DATEL is a registered trademark of DATEL, Inc.
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
DATEL, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information
contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of
licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice.
ITAR and ISO 9001/14001 REGISTERED
© 2015 DATEL, Inc.
www.datel.com • e-mail: [email protected]
17 Aug 2015 ADS-939A.B01 Page 7 of 7