ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications PRODUCT OVERVIEW The functionally complete, easy-to-use ADSCCD1202 is a 12-bit, 2MHz Sampling A/D Converter whose performance and production testing have been optimized for use in CCD applications. This device delivers the lowest noise (600μVrms) and the best differential linearity error (±0.45LSB maximum) of any commercially available 12-bit A/D in its speed class. It can respond to full scale input steps (from empty to full well) with less than a single count of error, and its input is immune to overvoltages that may occur due to blooming. Packaged in an industry-standard, 24-pin, ceramic DDIP, the ADS-CCD1202 requires ±15V (or FEATURES Unipolar input range (0 to +10V) 2MHz sampling rate PIN 1 2 3 4 5 6 7 8 9 10 11 12 4096-to-1 dynamic range (72.2dB) Low noise, 600μVrms (1/4 of an LSB) Outstanding differential nonlinearity error (±0.45 LSB max.) Small, 24-pin ceramic DDIP Low power, 1.75 Watts Operates from ±12V or ±15V supplies Edge-triggered, no pipeline delay Low cost ±12V) and +5V supplies and typically consumes 1.75 (1.45) Watts. The device is 100% production tested for all critical performance parameters and is fully specified over both the 0 to +70°C and –55 to +125°C operating temperature ranges. For those applications using correlated double sampling, the ADS-CCD1202 can be supplied without its internal sample-hold amplifier and achieve conversion rates up to 2.5MHz. DATEL will also entertain discussions about including the CDS circuit internal to the ADS-CCD1202. Please contact us for more details. INPUT/OUTPUT CONNECTIONS FUNCTION PIN FUNCTION BIT 12 (LSB) 24 –12V/–15V SUPPLY BIT 11 23 GROUND BIT 10 22 +12V/+15V SUPPLY BIT 9 21 +10V REFERENCE OUT BIT 8 20 ANALOG INPUT BIT7 19 GROUND BIT 6 18 NO CONNECT BIT 5 17 NO CONNECT BIT 4 16 START CONVERT BIT 3 15 EOC BIT 2 14 GROUND BIT 1 (MSB) 13 +5V SUPPLY BLOCK DIAGRAM – ANALOG INPUT 20 S/H DAC + S1 S2 12 BIT 1 (MSB) 11 BIT 2 +10V REFERENCE 21 10 BIT 3 REF DIGITAL CORRECTION LOGIC REGISTER FLASH ADC BUFFER REGISTER START CONVERT 16 9 BIT 4 8 BIT 5 7 BIT 6 6 BIT 7 5 BIT 8 4 BIT 9 3 BIT 10 2 BIT 11 1 BIT 12 (LSB) TIMING AND CONTROL LOGIC EOC 15 13 +5V SUPPLY 17, 18 NO CONNECT 22 +12V/+15V SUPPLY 14, 19, 23 GROUND 24 –12V/–15V SUPPLY Figure 1. ADS-CCD1202 Functional Block Diagram DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 1 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications PARAMETERS +12V/+15V Supply (Pin 22) –12V/–15V Supply (Pin 24) +5V Supply (Pin 13) Digital Input (Pin 16) Analog Input (Pin 20) Lead Temp. (10 seconds) ABSOLUTE MAXIMUM RATINGS LIMITS 0 to +16 0 to –16 0 to +6 –0.3 to +VDD +0.3 –5 to +14 +300 UNITS Volts Volts Volts Volts Volts °C PARAMETERS Operating Temp. Range, Case ADS-CCD1202MC ADS-CCD1202MM Thermal Impedance θjc θca Storage Temperature Range Package Type Weight PHYSICAL/ENVIRONMENTAL MIN. TYP. 0 –55 — — MAX. UNITS +70 +125 °C °C — 5 — °C/Watt — 24 — °C/Watt –65 — +150 °C 24-pin, metal-sealed ceramic DDIP 0.42 ounces (12 grams) FUNCTIONAL SPECIFICATIONS (TA = +25°C, ±Vcc = ±15V (or ±12V), +VDD = +5V, 2MHz sampling rate, and a minimum 1 minute warmup ➀ unless otherwise specified.) ANALOG INPUT Input Voltage Range d Input Resistance Input Capacitance DIGITAL INPUT Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width ➂ STATIC PERFORMANCE Resolution Integral Nonlinearity (fin = 10kHz) Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) DYNAMIC PERFORMANCE Peak Harmonics (–0.5dB) dc to 500kHz 500kHz to 1MHz Total Harmonic Distortion (–0.5dB) dc to 500kHz 500kHz to 1MHz Signal-to-Noise Ratio (w/o distortion, –0.5dB) dc to 500kHz 500kHz to 1MHz Signal-to-Noise Ratio f (& distortion, –0.5dB) dc to 500kHz 500kHz to 1MHz Two-Tone Intermodulation Distortion (fin = 200kHz, 500kHz, fs = 2MHz, –0.5dB) Noise Input Bandwidth (–3dB) Small Signal (–20dB input) Large Signal(–0.5dB input) Feedthrough Rejection (fin = 1MHz) Slew Rate Aperture Delay Time Aperture Uncertainty S/H Acquisition Time (to ±0.01%FSR, 10V step) Overvoltage Recovery Time ➄ A/D Conversion Rate ANALOG OUTPUT Internal Reference Voltage Drift External Current MIN. — 0.99 — +25°C TYP. 0 to +10 1 7 MAX. — 1.01 15 MIN. — 0.99 — 0 TO +70°C TYP. 0 to +10 1 7 MAX. — 1.01 15 MIN. — 0.99 — –55 TO +125°C TYP. 0 to +10 1 7 MAX. — 1.01 15 UNITS Volts kΩ pF +2.0 — — — — — — — — 200 — +0.8 +20 –20 — +2.0 — — — — — — — — 200 — +0.8 +20 –20 — +2.0 — — — — — — — — 200 — +0.8 +20 –20 — Volts Volts μA μA ns — — — — — — 12 12 ±0.5 +0.25 +0.1 ±0.15 ±0.1 — — — ±0.45 ±0.3 ±0.3 ±0.4 — — — — — — — 12 12 ±0.5 ±0.25 ±0.2 ±0.2 ±0.4 — — — ±0.45 ±0.5 ±0.5 ±0.8 — — — — — — — 12 12 ±1 ±0.35 ±0.3 ±0.5 ±0.5 — — — ±0.75 ±0.8 ±1.2 ±1.4 — Bits LSB LSB %FSR %FSR % Bits — — –80 –77 –75 –71 — — –80 –77 –75 –71 — — –76 –73 –72 –66 dB dB — — –76 –75 –73 –70 — — –76 –75 –73 –70 — — –74 –71 –70 –65 dB dB 71 71 72 72 — — 71 71 72 72 — — 71 70 72 72 — — dB dB 70 68 71 71 — — 70 68 71 71 — — 68 65 70 69 — — dB dB — — –83 600 — — — — –82 600 — — — — –81 600 — — dB μVrms — — — — — — 150 — 2 9 8 82 ±200 ±20 5 190 400 — — — — — — — 230 500 — — — — — — — 150 — 2 9 8 82 ±200 ±20 5 190 400 — — — — — — — 230 500 — — — — — — — 150 — 2 9 8 82 ±200 ±20 5 190 400 — — — — — — — 230 500 — MHz MHz dB V/μs ns ps rms ns ns MHz +9.95 — — +10.0 ±5 — +10.05 — 1.5 +9.95 — — +10.0 ±5 — +10.05 — 1.5 +9.95 — — +10.0 ±5 — +10.05 — 1.5 Volts ppm/ºC mA DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 2 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Delay, Falling Edge of EOC to Output Data Valid Output Coding POWER REQUIREMENTS, ±15V Power Supply Range +15V Supply –15V Supply +5V Supply Power Supply Current +15V Supply –15V Supply +5V Supply Power Dissipation Power Supply Rejection POWER REQUIREMENTS, ±12V Power Supply Range Power Supply Range +12V Supply –12V Supply +5V Supply Power Supply Current +12V Supply –12V Supply +5V Supply Power Dissipation ±12V Supplies Power Dissipation ±15V Supplies Power Supply Rejection MIN. +25°C TYP. MAX. MIN. +2.4 — — — — — — — — — — +0.4 –4 +4 35 +2.4 — — — — +14.5 –14.5 +4.75 +15.0 –15.0 +5.0 +15.5 –15.5 +5.25 +14.5 –14.5 +4.75 +15.0 –15.0 +5.0 — — — — — +43 –48 +82 1.75 — +65 –60 +95 2.00 ±0.02 — — — — — +11.5 –11.5 +4.75 +12.0 –12.0 +5.0 +12.5 –12.5 +5.25 — — — — — — +43 –48 +82 1.45 1.75 — +61 –60 +95 1.7 2.0 ±0.02 Footnotes: ➀ All power supplies must be on before applying a start convert pulse. All supplies and the clock (START CONVERT) must be present during warmup periods. ➁ Contact DATEL for availability of other input voltage ranges. ➂ A 200ns wide start convert pulse is used for all production testing. 0 TO +70°C TYP. MAX. MIN. –55 TO +125°C TYP. MAX. UNITS — — — +0.4 — –4 — +4 — 35 Straight Binary +2.4 — — — — — — — — — — +0.4 –4 +4 35 Volts Volts mA mA ns +15.5 –15.5 +5.25 +14.5 –14.5 +4.75 +15.0 –15.0 +5.0 +15.5 –15.5 +5.25 Volts Volts Volts +43 –48 +82 1.75 — +65 –60 +95 2.00 ±0.02 — — — — — +43 –48 +82 1.75 — +65 –60 +95 2.00 ±0.02 mA mA mA Watts %FSR/%V +11.5 –11.5 +4.75 +12.0 –12.0 +5.0 +12.5 –12.5 +5.25 +11.5 –11.5 +4.75 +12.0 –12.0 +5.0 +12.5 –12.5 +5.25 Volts Volts Volts — — — — — — +43 –48 +82 1.45 1.75 — +61 –60 +95 1.7 2.0 ±0.02 — — — — — — +43 –48 +82 1.45 1.75 — +61 –60 +95 1.7 2.0 ±0.02 mA mA mA Watts Watts %FSR/%V ➃ Effective bits is equal to: (SNR + Distortion) – 1.76 + 20 log Full Scale Amplitude Actual Input Amplitude 6.02 ➄ This is the time required before the A/D output data is valid after the analog input is back within the specified range. TECHNICAL NOTES curacy and drift specifications may not be met, and loading the circuit may cause accuracy errors within the converter. 1. Obtaining fully specified performance from the ADS-CCD1202 requires careful attention to pc-card layout and power supply decoupling. The device’s analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (14, 19, and 23) directly to a large analog ground plane beneath the package. 4. A passive bandpass filter is used at the input of the A/D for all production testing. 5. Applying a start pulse while a conversion is in progress (EOC = logic "1") initiates a new and inaccurate conversion cycle. Data for the interrupted and subsequent conversions will be invalid. Bypass all power supplies, as well as the REFERENCE OUTPUT (pin 21), to ground with 4.7μF tantalum capacitors in parallel with 0.1μF ceramic capacitors. Locate the bypass capacitors as close to the unit as possible. If the user-installed offset and gain adjusting circuit shown in Figure 2 is used, also locate it as close to the ADS-CCD1202 as possible. 2. ADS-CCD1202 achieves its specified accuracies without external calibration. If required, the device’s small initial offset and gain errors can be reduced to zero using the input circuit of Figure 2. When using this circuit, or any similar offset and gain-calibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. INPUT VOLTAGE RANGE ZERO ADJUST +½ LSB GAIN ADJUST +FS –1½ LSB 0 to +10V +1.2207mV +9.99634V Table 1. Zero and Gain Adjust 3. When operating the ADS-CCD1202 from ±12V supplies, do not drive external circuitry with the REFERENCE OUTPUT (pin 21). The reference’s acDATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 3 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications CALIBRATION PROCEDURE (Refer to Figures 2 and 3) change from one code to the next. For the ADS-CCD1202, offset adjusting is normally accomplished at the point where all output bits are 0’s and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when the applied analog input is +1/2LSB (+1.2207mV). Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuit of Figure 2 are guaranteed to compensate for the ADS-CCD1202’s initial accuracy errors and may not be able to compensate for additional system errors. Gain adjusting is accomplished when all bits are 1’s and the LSB just changes from a 1 to a 0. This transition ideally occurs when the analog input is at +full scale minus 1 1/2 LSB’s (+9.99634V). +15V 20k 7 ZERO/ OFFSET ADJUST 2k 7 200k 7 GAIN ADJUST –15V Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 16) so the converter is continuously converting. If using LED’s on the outputs, a 200kHz conversion rate will reduce flicker. +15V 1.98k 7 SIGNAL INPUT 2. Apply +1.2207mV to the ANALOG INPUT (pin 20). To Pin 20 of ADS-CCD1202 50 7 3. Adjust the offset potentiometer until the output bits are 0000 0000 0000 and the LSB flickers between 0 and 1. –15V Gain Adjust Procedure Figure 2. ADS-CCD1202 Calibration Circuit 1. Apply +9.99634V to the ANALOG INPUT (pin 20). All fixed resistors in Figure 2 should be metal-film types, and multi-turn potentiometers should have TCR’s of 100ppm/°C or less to minimize drift with temperature. In many applications, the CCD will require an offset-adjust (black balance) circuit near its output and also a gain stage, presumably with adjust capabilities, to match the output voltage of the CCD to the input range of the A/D. If one is performing a "system I/O calibration" (from light in to digital out), these circuits can be used to compensate for the relatively small initial offset and gain errors of the A/D. This would eliminate the need for the circuit shown in Figure 2. 2. Adjust the gain potentiometer until all output bits are 1’s and the LSB flickINPUT VOLTAGE (0 TO +10V) +9.9976 +7.5000 +5.0000 +2.5000 +0.0024 0 UNIPOLAR SCALE +FS – 1LSB +3/4 FS +1/2 FS +1/4 FS +1LSB 0 DIGITAL OUTPUT MSB LSB 1111 1111 1111 1100 0000 0000 1000 0000 0000 0100 0000 0000 0000 0000 0001 0000 0000 0000 Table 2. ADS-CCD1202 Output Coding +5V 4.7μF + 13 12 BIT 1 (MSB) 11 BIT 2 0.1μF 14 ers between 1 and 0. 10 BIT 3 9 BIT 4 4.7μF 4.7μF +12V/+15V + + 0.1μF 19, 23 0.1μF ADS-CCD1202 0.1μF 0 to +10V 4.7μF + THERMAL REQUIREMENTS 8 BIT 5 7 BIT 6 24 –12V/–15V 6 BIT 7 5 BIT 8 22 4 BIT 9 3 BIT 10 ANALOG 20 INPUT 2 BIT 11 1 BIT 12 (LSB) All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70°C and – 55 to +125°C. All room-temperature (TA = +25°C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. 21 +10V REF. OUT 17, 18 15 EOC NO CONNECT Figure 3. Typical ADS-CCD1202 Connection Diagram A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting LED’s to the digital outputs and adjusting until certain LED’s "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electrically insulating, thermally conductive "pads" may be installed underneath the package. Devices should be soldered to boards rather than "socketed," and of course, minimal air flow over the surface can greatly help reduce the package temperature. • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 4 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications N+1 N START CONVERT 200ns typ. 10ns typ. Acquisition Time 310ns typ. INTERNAL S/H 190ns typ. Hold 70ns ±10ns 30ns typ. EOC Conversion Time 360ns ±20ns 35ns max. 75ns max. DATA N VALID DATA (N-1) VALID OUTPUT DATA 425ns min. INVALID DATA Note: Scale is approximately 25ns per division. Figure 4. ADS-CCD1202 Timing Diagram TIMING throughput rate. It does not require multiple start convert pulses to bring valid digital data to its output pins. The ADS-CCD1202 is an edge triggered device. A conversion is initiated by the rising edge of the start convert pulse and no additional external timing signals are required. The device does not employ "pipeline" delays to increase its C2 15pF COG +15V OFFSET ADJ 20K R5 2K .1% R3 200K 5% R2 12 11 U4 13 C1 0.1MF +15V +5V 74LS86 74LS240 -15V C4 2.2MF + P4 50 0.1% GAIN ADJ 3 R6 2K 0.1% + R7 7 U6 4 P1 2 4 +5V 6 5 8 7 10 9 17 18 19 C9 2.2MF + -15V +15V 18 17 C13 0.1MF 22 21 2 C24 1 Y1 + 2.2MF 14 XTAL 7 DGND B4 EOC B5 ST. CONV B6 B2 B1 8 12 C18 0.1MF U4 1Y4 2A1 2Y1 AGND B9 INPUT B10 +10VREF B11 B12 B13 B14 2Y2 2A2 2Y3 2A3 2Y4 2A4 1G 2G SG2 18 B1 16 B2 14 B3 12 B4 9 B5 7 B6 5 B7 SG3 +5V 9 U3 8 74LS240 7 2 6 4 5 6 4 8 3 11 2 13 1 15 17 19 4 U4 31 26 27 24 25 22 23 20 21 3 19 1 P2 C17 0.1MF 20 1A1 1Y1 1A2 1Y2 1A3 1Y3 1A4 1Y4 2A1 2Y1 2A2 2Y2 2A3 2Y3 2A4 2Y4 2G 1G 18 B8 18 17 16 B9 16 15 14 B10 14 13 12 B11 12 11 9 B12 10 7 B13 8 9 7 5 B14 6 3 1 LSB 5 4 EOC 3 2 ST.CONV. 1 34 ENABLE 6 J3 9 74LS86 3 33 30 28 MSB 29 10 C15 0.1MF 32 10 10 B8 1Y3 1A4 11 B7 U1 5 1 J2 SEE NOTE 1 B3 19 14 J1 START CONVERT SG1 +5V C14 2.2MF P3 24 23 26 21 ADS-CCD1201/1202 22 +15V 23 AGND 24 -15V +5V 20 19 25 20 C12 0.1MF 14 13 16 15 15 C23 0.1MF +15V C11 2.2MF 12 11 14 0.1% C10 0.1MF -15V 13 16 C22 2.2 -15V MF 1 3 R8 10K 3 + 15 -15V 2 – 6 OP-77 C8 2.2MF 17 + + C20 0.1MF C7 0.1MF C5 0.1MF + C6 2.2MF 10K 0.1% C19 2.2MF 11 13 C21 0.1MF 1Y2 1A3 8 +5V AD845 4 1Y1 1A2 6 6 U5 20 1A1 4 + +15V – + J5 7 2 2 C3 0.1MF + R1 ANALOG INPUT R4 1.98K C16 0.1MF U2 U4 10 74LS86 J4 8 74LS86 7 NOTES: 1. FOR ADS-BCCD1201 Y1 IS 1.2MHZ FOR ADS-BCCD1202 Y1 IS 2MHZ +5V Figure 5. ADS-CCD1202 Evaluation Board Schematic DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 5 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications 0 –10 Amplitude Relative to Full Scale (dB) –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 0 100 200 300 400 500 600 700 800 900 1000 Frequency (kHz) Figure 6. ADS-CCD1202 FFT (fin = 975kHz, fs = 2MHz, Vin = –0.5dB, 4,096 points) DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 6 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications 4000 Number of Occurences 3500 3000 2500 2000 This histogram represents the typical peak-to-peak noise (including quantization noise) associated with the ADS-CCD1202. 4,096 conversions were processed with the input to the ADS-CCD1202 tied to analog ground. 1500 1000 500 0 Digital Output Code Figure 7. ADS-CCD1202 Grounded Input Histogram Number of Occurences DNL (LSB's) +0.16 0 –0.15 0 0 Digital Output Code 4096 4096 Digital Output Code Figure 8. ADS-CCD1202 Histogram and Differential Nonlinearity DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 7 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications MECHANICAL DIMENSIONS INCHES (mm) 1.31 MAX. (33.27) 24-PIN DDIP 24 Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) 13 0.80 MAX. (20.32) 1 Lead Material: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 12 0.100 TYP. (2.540) 1.100 (27.940) 0.235 MAX. (5.969) 0.200 MAX. (5.080) +0.002 0.010 –0.001 (0.254) 0.190 MAX. (4.826) 0.100 (2.540) 0.040 (1.016) 0.018 ±0.002 (0.457) 0.100 (2.540) 0.600 ±0.010 (15.240) SEATING PLANE 0.025 (0.635) 1.31 MAX. (33.02) 24-PIN SURFACE MOUNT Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) 13 24 0.80 MAX. (20.32) 1 0.190 MAX. (4.826) Lead Material: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 12 0.020 TYP. (0.508) 0.060 TYP. (1.524) PIN 1 INDEX 0.100 (2.540) 0.100 TYP. (2.540) 0.015 (0.381) MAX. radius for any pin 0.130 TYP. (3.302) 0.020 (0.508) 0.010 TYP. (0.254) 0.040 (1.016) ORDERING INFORMATION OPERATING TEMP. RANGE ANALOG INPUT ADS-CCD1202MC 0 to +70°C Unipolar (0 to +10V) ADS-BCCD1202 Evaluation Board (without ADS-CCD1202) ADS-CCD1202MM –55 to +125°C Unipolar (0 to +10V) HS-24 Heat Sink for all ADS-CCD1202 models MODEL NUMBER ACCESSORIES Receptacles for pc board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket), 24 required. Contact DATEL for availability of surface-mount packaging or high-reliability screening. DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 8 of 9 ADS-CCD1202 12-Bit, 2MHz, Sampling A/D’s for CCD Imaging Applications ORDERING INFORMATION MODEL NUMBER OPERATING TEMP. RANGE PACKAGE ROHS ACCESSORIES ADS-CCD1202MC 0 to +70°C TDIP NO ADS-BCCD1202 Evaluation Board (without ADS-CCD1202) ADS-CCD1202MM –55 to +125°C TDIP NO HS-24 Heat Sink for all ADS-CCD1202 models ADS-CCD1202MM-QL –55 to +125°C TDIP NO ADS-CCD1202MC-C 0 to +70°C TDIP YES ADS-CCD1202MM-C –55 to +125°C TDIP YES ADS-CCD1202MM-QL-C –55 to +125°C TDIP YES Receptacles for pc board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket), 24 required. Contact DATEL for availability of surface-mount packaging or high-reliability screening. DATEL is a registered trademark of DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA DATEL, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. ITAR and ISO 9001/14001 REGISTERED © 2015 DATEL, Inc. www.datel.com • e-mail: [email protected] 11 Sep 2015 MDA_ADS-CCD1202.B02 Page 9 of 9