Transient Voltage Suppressors for ESD Protection Low Capacitance ESD52DE005M05-A Description SOD-523 The ESD52DE005M05-A is designed to protect voltage sensitive components that require ultra−low capacitance from ESD and transient voltage events. Excellent clamping capability, low capacitance, low leakage, and fast response time, make these parts ideal for ESD protection on designs where board space is at a premium. Because of its low capacitance, it is suited for use in high frequency designs such as USB 2.0 high speed and antenna line applications. Feature Functional Diagram u Ultra Low Capacitance 0.5 pF u Low Clamping Voltage u Small Body Outline Dimensions: 0.063″x0.032″(1.60 mm x 0.80 mm) u Low Body Height: 0.028″ (0.7 mm) u Stand−off Voltage: 5 V u Low Leakage u Response Time is Typically < 1.0 ns u IEC61000−4−2 Level 4 ESD Protection u IEC61000-4-2 (ESD) ±15kV (air), ±10kV (contact) Mechanical Characteristics Applications u SOD-523 Package u Cellular phones u Molding Compound Flammability Rating : UL 94V-0 u Portable devices u Weight 2 Milligrams (Approximate) u Digital cameras u Quantity Per Reel : 3,000pcs u Power supplies u Reel Size : 7 inch u Lead Finish : Lead Free Mechanical Characteristics Symbol Parameter Value Units 200 mW PD Total Power Dissipation on FR−5 Board (Note 1) @ TA = 25°C TL Lead Soldering Temperature 260 (10sec) ºC TSTG Storage Temperature Range -55 to +150 ºC Maximum Junction Temperature -55 to +125 ºC TJ IEC61000-4-2 (ESD) Air Discharge ±15 Contact Discharge ±10 KV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the ecommended perating onditions is not implied. Extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. FR−5 = 1.0 x 0.75 x 0.62 in. SOCAY Electronics Co., Ltd. Revision March 7, 2014 www.socay.com 1/4 @ SOCAY Electronics Co., Ltd. 2014 Specifications are subject to change without notice. Please refer to www.socay.com for current information. Transient Voltage Suppressors for ESD Protection Low Capacitance ESD52DE005M05-A I-V Curve Characteristics Symbol Parameter Maximum Reverse Peak Pulse Current VC Clamping Voltage VRWM IF @ IPP Working Peak Reverse Voltage IR Maximum Reverse leakage Current IT Test Current VB Breakdown Voltage IF Forward Current VF Forward Voltage @IF PPK Peak Power Dissipation C I Uni-directional IPP @ VRWM VC V VB VRWM R IT @ IT IR VF IPP Max Capacitance @VR=0V & f=1MHz Electrical Characteristics (Ratings at 25°C ambient temperature unless otherwise specified) Part Number VRWM Device (V) Marking (Max.) ESD52DE005M05-A 5L 5.0 VB @IT (V) (Note 2) (Min.) IT (mA) 5.4 1.0 VC @ IPP＝1A (V) (Note 3) (Max.) IR @VRWM (μA) (Max.) Typ. Max. Per IEC61000−4−2 (Note 4) 9.8 1.0 0.5 0.9 Fig1 and 2 See Below C (pF) VC 2. VB is measured with a pulse test current IT at an ambient temperature of 25°C. 3. Surge current waveform per Figure 5. 4. For test procedure see Figures 3 and 4 Characteristic Curves Fig1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Fig2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 SOCAY Electronics Co., Ltd. Revision March 7, 2014 www.socay.com 2/4 @ SOCAY Electronics Co., Ltd. 2014 Specifications are subject to change without notice. Please refer to www.socay.com for current information. Transient Voltage Suppressors for ESD Protection Low Capacitance ESD52DE005M05-A Test Waveforms & Setup Fig3. ESD Pulse Waveform (according to IEC 61000-4-2) IEC 61000-4-2 Spec. Percent of Peak Pulse Current % 100% Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 90% 10% tr = 0.7~1ns Time (ns) 30ns 60ns Fig4. Diagram of ESD Test Setup ESD Voltage Clamping Fig5. 8×20μs Pulse Waveform For sensitive circuit elements it is important to limit the 120 IPP - Peak Pulse Current - % of IPP voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000-4-2 waveform. Since the IEC61000-4-2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. tr 100 Peak Value IPP 80 TEST WAVEFORM PARAMETERS tr=8μs td=20μs 60 40 td=t IPP/2 20 0 0 5 10 15 20 25 30 t - Time (μs) SOCAY Electronics Co., Ltd. Revision March 7, 2014 www.socay.com 3/4 @ SOCAY Electronics Co., Ltd. 2014 Specifications are subject to change without notice. Please refer to www.socay.com for current information. Transient Voltage Suppressors for ESD Protection Low Capacitance ESD52DE005M05-A SOD-523 Package Outline & Dimensions Millimeters Symbol Soldering Footprint Min. Nom. Max. Min. Nom. Max. A 1.10 1.20 1.30 0.043 0.047 0.051 B 0.70 0.80 0.90 0.028 0.032 0.035 C 0.50 0.60 0.70 0.020 0.024 0.028 D 0.25 0.30 0.35 0.010 0.012 0.014 J 0.07 0.14 0.20 0.0028 0.0055 0.0079 K 0.15 0.20 0.25 0.006 0.008 0.010 L 1.50 1.60 1.70 0.059 0.063 0.067 Symbol Millimeters Inches E 1.40 0.0547 F 0.40 0.0157 G 0.40 0.0157 SOCAY Electronics Co., Ltd. Revision March 7, 2014 Inches www.socay.com 4/4 @ SOCAY Electronics Co., Ltd. 2014 Specifications are subject to change without notice. Please refer to www.socay.com for current information.