SM59R WDT 功能使用方法 Application Note WDT 功能使用方法 1 适用产品:SM59R16A2 / SM59R08A2 2 WDT(Watchdog Timer)使用说明: 2.1 WDT 烧录时可在 information block 设定 WDT 禁能、致能及重置时间 2.2 WDT 禁能和致能:由 WDTENB 决定,当设定为”1”,WDT 致能,设定为”0”,WDT 禁能 2.3 WDT 重置时间:由 WDTM[3:0]决定,共有 16 组可供选择 2.4 WDT counter 清除可由外部重置,或由软件执行(写入 0x55 至 SFR WDTK 即可) 2.5 WDTK 须不断的执行清除,以确保 WDT counter 不会溢位 2.6 当 WDT counter 溢位时,WDTF 由硬件设定为”1”,并且重置 MCU,重置后 WDTF 由硬件 清除为”0” 2.7 以下为 WDT reset time 计算方式: WDTCLK = Fosc 12X 2 WDTM Watchdog reset time = 256 WDTCLK 2.8 下表为 OSC 使用 22.1184MHz,计算 WDT reset time: WDTENB Fosc WDTM WDTCLK WDT reset time 1 22.1184 0 1843200 0.000138889 1 22.1184 1 921600 0.000277778 22.1184 1 2 460800 0.000555556 22.1184 1 3 230400 0.001111111 22.1184 1 4 115200 0.002222222 22.1184 1 5 57600 0.004444444 22.1184 1 6 28800 0.008888889 1 22.1184 7 14400 0.017777778 22.1184 1 8 7200 0.035555556 22.1184 1 9 3600 0.071111111 22.1184 1 10 1800 0.142222222 22.1184 1 11 900 0.284444444 1 22.1184 12 450 0.568888889 22.1184 1 13 225 1.137777778 22.1184 1 14 112.5 2.275555556 22.1184 1 15 56.25 4.551111111 Specifications subject to change without notice, contact your sales representatives for the most recent information. IRFWX-A116 1 Ver. A 2009/02 SM59R WDT 功能使用方法 Application Note Fig. Watchdog timer block diagram 3 WDT 相关缓存器: Mnemonic WDTC WDTK Description Watchdog timer control register Watchdog timer refresh key Direct Bit 7 B6h WDTF Bit 6 Bit 5 Bit 4 Watchdog Timer - - Bit 2 Bit 1 Bit 0 RESET - - - - 00h - B7h Mnemonic: WDTC 7 6 WDTF - Bit 3 WDTK[7:0] 5 - 4 - 3 - 2 - 1 - 00h Address: B6h 0 Reset 00h WDTF: Watchdog timer reset flag. 当重置时,WDTF 由硬件设为”1” 须由软件(WDTK)设定,或由外部重置(Reset),将 WDTF 清除为”0” Mnemonic: WDTK 7 6 5 4 3 WDTK[7:0] 2 1 Address: B7h 0 Reset 00h WDTK: Watchdog timer refresh key. 当 WDTK 写入 0x55 时,WDTC 即可清除为”0” Specifications subject to change without notice, contact your sales representatives for the most recent information. IRFWX-A116 2 Ver. A 2009/02 SM59R WDT 功能使用方法 Application Note 4 WDT 应用的范例程序 Description Main program 1. 烧录时先设定 information block WDT 致能及重置时间 2. 当执行 user code 时,WDTK 须不断的执行清除 3. 量测 P2,若为 0x00 表示正确;若 P2 不断的 Hi-Low 变化,表示 WDT counter 溢位 //==================================================================== // // S Y N C M O S T E C H N O L O G Y // //==================================================================== #include "..\h\SM59R16A2.h" void WDT_Clear() { /*WDTK: Watchdog timer refresh key. A programmer must write 0x55 into WDTK register, then the watchdog timer will be cleared to zero.*/ WDTK = 0x55; } void main() { P2 = 0; while(1) { //if WDTK has clear, P2 always low //if WDTK no clear, P2 Hi-low switch(P2 default 0xFF) WDT_Clear(); } } Specifications subject to change without notice, contact your sales representatives for the most recent information. IRFWX-A116 3 Ver. A 2009/02