VS-509 Dual Frequency VCSO Features Industry Standard Package, 9.1 x 13.8 x 3.1 mm 5 Generation ASIC Technology for Ultra Low Jitter 125 fs-rms (fN = 622.08 MHz, 12 kHz to 20 MHz) 120 fs-rms (fN = 622.08 MHz, 50 kHz to 80 MHz) th Output Frequencies from 150 MHz to 1000 MHz Spurious Suppression, 90 dBc Typical 3.3V Supply Voltage LVPECL or LVDS Output Configurations Tri-State Frequency Select (F1, OD, F2) Compliant to EC RoHS6 Directive Pb Applications PLL circuits for Clock Smoothing and Frequency Translation Vcc COutput Output SAW 1 LVPECL LVDS SAW 2 1 X Vc FS X=1,2,4 Description Standard SONET / SDH GR-253-CORE OTN (Optical Transport Network) ITU-T G.709/Y.1331 10 GbE (Gigabit Ethernet) IEEE 802.3ae 10 GFC (Gigabit Fibre Channel) INCITS 364-2003 40 GbE & 100 GbE IEEE 802.3ba Synchronous Ethernet ITU-T G.8261 WiMax IEEE 802.16 Description The VS-509 is a Voltage Controlled SAW Oscillator that operates at the fundamental frequency from one of the two internal SAW filters. The SAW filters are high-Q Quartz devices that enable the circuit to achieve low phase jitter performance over a wide operating temperature range. A divider circuit is deployed for output frequencies less than 600 MHz. The selectable dual oscillator is housed in a hermetically sealed leadless surface mount package and offered on tape and reel. It has a tri-state Frequency Select function that provides one of three conditions: Frequency 1, Output Disable, or Frequency 2. Gnd Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 1 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Electrical Performance: 3.3V LV-PECL Parameter Symbol Minimum fN APR Lin KV fSTAB 150 50 VCC ICC ICC 2.97 Typical Maximum Units Notes 1000 MHz ppm % ppm/V ppm 1,2,3 1,2,3,9 2,4,9 2,9 1,7 3.3 73 60 3.63 V mA mA 2,3 3 3 VCC-1.3 750 1.5 VCC-1.1 mV mV-pp V-pp mA ps-pp ps-pp % dBc fs-rms fs-rms fs-rms 2,3 2,3 2,3 7 6,7 6,7 2,3 7 7,8 7,8 7,8 k k kHz 7 7 7 °C 1,3 Frequency Nominal Frequency Absolute Pull Range Linearity Gain Transfer (Low / Standard) Temperature Stability 7 +300 / +365 100 Supply Voltage (± 10%) Current (Typical 50Ω Load) Current (No Load) 75 Outputs VCC-1.5 Mid Level Single Ended Swing Differential Swing Current Rise Time Fall Time Symmetry Spurious Suppression Jitter (600 ≤ fN ≤ 1000) Jitter (300 ≤ fN ≤ 500) Jitter (150 ≤ fN ≤ 250) IOUT tR tF SYM 20 250 250 55 180 180 50 90 150 190 280 45 85 J J J Control Voltage ZC ZC BW TOP Input Impedance (F1 or F2 Enabled) Input Impedance (Output Disabled) Modulation Bandwidth Operating Temperature Package Size 167 472 200 -40 +85 9.1 x 13.8 x 3.1 mm 1. See Standard Frequencies and Ordering Information (Pg 8). 2. Parameters are tested with production test circuit (Pg 3). 3. Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature. 4. Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310. 5. The Vc Model is described below (Fig 1). 6. Parameters are described with waveform diagram below (Fig 2). 7. Not tested in production, guaranteed by design, verified at qualification. 8. For Frequencies > 600 MHz, Jitter is integrated across 50 kHz to 80 MHz. For Frequencies < 600 MHz, Jitter is integrated across 12 kHz to 20 MHz. (Both per GR-253-CORE Issue3). 9. Tested with Vc = 0.3V to 3.0V. SYM = 100 x tA / tB Vcc=+2V tF tR Vcc-1.1V 167kΩ Vc 80% 3pF + Vcc-1.3V 1.65V 20% Vcc-1.5V t A Figure 1. Vc Model – F1 or F2 Enabled Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 2 of 9 tB Figure 2. 10K LV-PECL Waveform Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Absolute Maximum Ratings Parameter Power Supply Input Current Output Current Voltage Control Range Frequency Select Storage Temperature Symbol VCC IIN IOUT VC FS TSTR Ratings 0 to 6 100 25 0 to VCC 0 to VCC -55 to 125 Unit V mA mA V V C Soldering Temperature / Duration TPEAK / t P 260 / 40 C / sec Stresses in excess of the absolute maximum ratings can permanently damage the device. Also, exposure to these absolute maximum ratings for extended periods may adversely affect device reliability. Functional operation is not implied at these or any other conditions in excess of those represented in the operational sections of this datasheet. Permanent damage is also possible if any device input (Vc or FS) draws >100 mA. Test Circuits & Output Load Configurations Vc (-3.00V to -0.30V) +3.3V 0.10 F FS 0.01 F Vc FS Gnd 1 6 2 5 3 4 + - Vcc COutput 0.01 F Output 0.01 F 240 + - Vc FS Vee 1 6 2 5 3 4 FS Gnd 6 2 5 3 4 Vcc 0.01 F COutput Output Or 0.01 F 10K V DMV Production Test: DC levels shown for Vee, OSelect, & Vc are for devices configured for 3.3V operation. Vee LV-PECL outputs are DC coupled to 50 test equipment. LVDS outputs are connected to a digital volt meter, then AC coupled to the test equipment. The digitial volt meter allows for Mid Level & Swing measurements. +3.3V 0.10 F 0.10 F 0.01 F 0.01 F Vcc Vc COutput Z = 50 Output Z = 50 240 0.01 F 10K +3.3V 1 0.10 F -1.3V 240 Functional Test: Allows use of standard power supply biasing configuration. Pull down resistors are used for LV-PECL outputs and are removed for with LVDS outputs. Since the LVDS outputs are AC coupled, the output DC levels cannot be measured. Vc +2.0V H (-0.55V to 0.00V) M (-1.90V to -1.40V) L (-3.30V to -2.75V) FS 100 Gnd 1 6 2 5 3 4 Vcc COutput Z = 50 Output Z = 50 100 240 LV-PECL to LV-PECL: For short transmission lengths, the pull down resistor values shown provide reasonable power consumption and waveform performance. LVDS to LVDS: The 100 resistor should be removed if this load is provided internally within the LVDS receiver. Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 3 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Typical Characteristics: Vc Pull, Vc Pull Linearity, & Vc Pull Slope 800 Vc Pull 700 600 500 400 Frequency (ppm) 300 F1 F2 Upr Guardband Lwr Guardband 200 100 0 -100 -200 -300 -400 F1 -500 Gain Transfer Total Pull Freq @1.65V -600 F2 364.4 1004 100 367.4 ppm/V (0.3V to 3.0V) 985 ppm (0.3V to 3.0V) 100 ppm -700 -800 0.00 0.30 0.60 0.90 1.20 1.50 1.80 2.10 2.40 2.70 3.00 3.30 Control Voltage (V) 10% Vc Pull Linearity F1 F2 Upr Limit Lwr Limit 8% 6% Frequency (%) 4% 2% 0% -2% -4% -6% F1 -10% 0.00 F2 Max 2.43% 1.22% (0.3V to 3.0V) Min -2.90% -3.12% (0.3V to 3.0V) -8% 0.30 0.60 0.90 1.20 1.50 1.80 2.10 2.40 2.70 3.00 3.30 Control Voltage (V) 800 Vc Pull Slope 750 F1 F2 700 650 600 Vc Slope (ppm/V) 550 500 450 400 350 300 250 200 150 Max Min Ratio 100 F1 F2 465.2 264.4 1.76 478.1 270.7 1.77 ppm/V (0.3V to 3.0V) ppm/V (0.3V to 3.0V) (0.3V to 3.0V) 50 0 0.00 0.30 0.60 0.90 1.20 1.50 1.80 2.10 2.40 2.70 3.00 3.30 Control Voltage (V) Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 4 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Typical Characteristics: Phase Noise & Jitter 0 F1 F2 12K - 20M 50K - 80M -10 -20 -30 Phase Noise -40 Offset F1 F2 (Hz) (dBc/Hz) (dBc/Hz) -50 10 100 1K 10K 100K 1M 10M 100M L(f) (dBc/Hz) -60 -70 -80 -90 -100 -33.9 -62.3 -87.8 -110.4 -131.2 -148.6 -149.9 -150.2 -110 -33.4 -62.3 -87.6 -109.9 -130.8 -147.7 -148.7 -148.6 Jitter -120 -130 -140 Interval (Hz) F1 (fs) F2 (fs) 12K-20M 50K-80M 118.4 110.7 117.9 118.0 -150 -160 10 100 1,000 10,000 100,000 1,000,000 10,000,000 100,000,000 Offset (Hz) Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 5 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Reliability VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR reflow simulation. The VS-509 family is capable of meeting the following qualification tests: Environmental Compliance Parameter Mechanical Shock Mechanical Vibration Solderability Gross and Fine Leak Resistance to Solvents Moisture Sensitivity Level Conditions MIL-STD-883, Method 2002 B MIL-STD-883, Method 2007 A MIL-STD-883, Method 2003 MIL-STD-883, Method 1014 MIL-STD-883, Method 2016 IPC/JEDEC J-STD-020, MSL1 Handling Precautions Although ESD protection circuitry has been designed into the VS-509 proper precautions should be taken when handling and mounting. VI employs a human body model (HBM) and a charged-device model (CDM) for ESD susceptibility testing and design protection evaluation. ESD Ratings Model Human Body Model Charged Device Model Machine Model Minimum 2000 V 1000 V 200 V Conditions MIL-STD 883, Method 3015 JEDEC, JESD22-C101 JEDEC, JESD22-A115-A Reflow Profile (IPC/JEDEC J-STD-020) Symbol tS R UP tL t AMB-P tP R DN The VS-509 is qualified to meet the JEDEC standard for Pb-Free assembly. The temperatures and time intervals listed are based on the Pb-Free small body requirements. The temperatures refer to the topside of the package, measured on the package body surface. The VS-509 should not be subjected to a wash process that will immerse it in solvents. NO CLELAN is the recommenced procedure. The VS-509 is designed for pick and place soldering. It should be reflowed once on topside position only. Terminal Plating: ENIG per IPC-4552 Electroless Ni = 3 - 6 µm Immersion Au = 0.05 µm Min Value 60 sec Min, 180 sec Max o 3 C/sec Max 60 sec Min, 150 sec Max 480 sec Max 20 sec Min, 40 sec Max o 6 C/sec Max tL 260 R UP Temperature (DegC) Parameter PreHeat Time Ramp Up o Time Above 217 C Time To Peak Temperature o Time At 260 C Ramp Down 217 200 tP R DN 150 tS t AMB-P 25 Time (sec) Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 6 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Outline & Marking Diagram 13.80±0.15 [.543±.006] 6 5 3.03±0.15 [.119±.006] 0.79 [.031] 7.62 [.300] 4 Suggested Pad Layout 1.27 [.050] VS509 YWW CCC-CCCC XX/XX 9.10±0.15 [.358±.006] 1 2 3 0.76 [.030] 12.70 [.500] 2.24 [.088] 1.55 [.061] 0.51 [R0.020] 8.80 [.346] 3.00 [.118] Y = Year WW = Week C = Option Codes XX = Frequency Codes (See Ordering Info) 6.00±0.15 [.236±.006] 1.02 [.040] 2.54 [.100] 5.08 [.200] mm [inch] mm [inch] 2.54 [.100] Pin Out Frequency Select (Tri-State LV-CMOS) Pin Symbol Function FS Voltage Range Result 1 2 3 4 5 6 VC FS GND Output COutput VCC Control Voltage Frequency Select Case and Electrical Ground Output Complementary Output Power Supply Voltage H M L (5VCC / 6) to VCC (VCC / 2) ± 15%(VCC / 2) Gnd to (VCC / 6) F2 OD F1 LV-CMOS Tri-State Control Floating FS Results in F2 (VS550 Compatibility) or in OD (VS709 Compatibility), See Order Options Tape and Reel (EIA-481-2-A) Pull Off Direction D Po Pin ID ØDo W2 F A C W N W1 P1 B Tape Dimensions (mm) Reel Dimensions (mm) Dimension W F Do Po P1 A B C D N W1 W2 Tolerance Typ Typ Typ Typ Typ Typ Min Typ Min Min Typ Max # Per Reel VS-509 24 11.5 1.5 4 12 330 1.5 13 20.2 100 24.4 30.4 200 Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 7 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Standard Frequencies (MHz) 155.520000 173.370748 622.080000 672.162712 718.863800 M2 ND P2 R5 V6 156.250000 184.320000 625.000000 690.569196 737.280000 M3 NH P3 R4 TL 161.132813 307.200000 644.531250 693.482991 905.499558 M4 RX P4 R6 V7 166.628572 311.040000 657.421875 696.421478 M5 P1 PB V1 167.331646 368.640000 666.514286 696.614900 N2 RY P5 V8 168.040678 614.400000 669.326582 707.352650 N3 RG R3 TC Other Frequencies Available Upon Request. Frequency F1 Must Be Lower Than Frequency F2. Frequencies F1 & F2 Must Be Selected Within One Frequency Range: (150 - 250),(300 - 500),(600 - 1000) Ordering Information VS - 509 - E C E - K A A N - P2 / P4 Product Family VS: VCSO Frequency 1 Frequency 2 See Above See Above Package Other (Future Use) 509: 9.1 x 13.8 x 3.1 mm N: N/A Supply Voltage Oscillator Gain E: 3.3V A: +365 ppm/V B: +300 ppm/V Output Type Control Logic / Float Condition C: LVPECL D: LVDS A: L = F1, M = OD, H = F2 / F2 B: L = F1, M = OD, H = F2 / OD Operating Temperature o Absolute Pull Range o E: -40 C to 85 C Example1: VS-509-ECE-KAAN-P2/R3 Example2: VS-509-ECE-SBAN-P4/PB K: ± 50 ppm S: ± 100 ppm Contact Information: EUROPE: Potsdamer Straße 18, D-14513 Teltow, Germany Tel: +49 (0) 3328 4784 17 Fax: +49 (0) 3328 4784 30 EUROPE: Landstrasse, D-74924, Neckarbischofsheim, Germany Tel: +49 (0) 7268 8010 Fax: +49 (0) 7268 801281 USA: Vectron International 267 Lowell Road, Suite 102, Hudson, NH 03051 Tel: 1.888.328.7661 Fax: 1.888.329.8328 ASIA: 68 Yin Cheng Road (C), 22 nd Floor, One LuJiaZui, Pudong, Shanghai, 200120 China Tel : +86.21.6194.6886 Fax : +86.21.6194.6699 Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 8 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014 VS-509 Dual Frequency VCSO Revision History Date Approved 11Mar2010 18Mar2010 04May2010 30Jul2010 16Aug2010 29Oct2010 30Mar2011 02Mar2014 JM, BW JM JM JM JM JM BW MK Description Preliminary Release Corrected Pin1 ID on Outline and Changed Floating FS to F2 Changed Pin1 ID on Cover and Increased Outline Height (24 Mil Pcb to 31 Mil Pcb) Added Typ Low Gain on pg2, Float Condition Text on pg7 and its Ordering Option on pg8 Changed Standard Gain to +365 ppm/V, Removed Vc Pull Plots Removed 2.5V option, Added Vc Pull & Phase Noise Plots Official Release Vectron Logo changed, Vectron Address Shanghai changed Vectron International, 267 Lowell Road, Suite 102, Hudson, NH 03051 Page 9 of 9 Tel: 1-88-VECTRON-1 Web: www.vectron.com Rev: 02Mar2014