UNISONIC TECHNOLOGIES CO., LTD UC3837

UNISONIC TECHNOLOGIES CO., LTD
UC3837
Preliminary
LINEAR INTEGRATED CIRCUIT
LOW COST POWER-SAVING
MODE PWM CONTROLLER
FOR FLYBACK CONVERTERS

6
DESCRIPTION
5
The UC3837 is a high performance current mode PWM
controller ideally suited for low standby power. Low VDD startup
current make the power reliable on startup design and a large
value resistor could be used in the startup circuit to minimize the
standby power. At no load condition, the IC operates in
power-saving mode for lower standby power, decreasing frequency
for Higher conversion efficiency at light load condition.
The internal slope compensation improves system stability at
high PWM duty cycle output. Leading-edge blanking on current
sense input removes the signal glitch, which offering minimal
external component count in the design. Excellent EMI
performance is achieved with UTC proprietary frequency hopping
technique (ZL201020615247.1) together with soft driver control.
Audio noise is eliminated due to switch frequency more than 20kHz
during operation.
The UC3837 has such applications as: battery charger, power
adaptor, set-top box power supplies, ink jet printers, open-frame
SMPS.

1
2
3
SOT-26
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI
performance.
* Power-saving mode for high light-load and standby efficiency
* Soft Start
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OTP,OLP,OVP and VDD clamp for higher security

4
* Programming BNO for higher security
* Fixed switch frequency 65kHz
* Gate output voltage clamped at 15V
* Low start-up current
* Cycle-by-cycle Current Limiting
* Under voltage lockout (UVLO)
* Few external components required
ORDERING INFORMATION
Ordering Number
UC3837G-AG6-R
Package
SOT-26
Packing
Tape Reel
UC3837G-AG6-R
(1)Packing Type
(1) R: Tape Reel
(2)Package Type
(2) AG6: SOT-26
(3)Green Package
(3) G: Halogen Free and Lead Freee
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UC3837
Preliminary

MARKING

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
1
PIN NAME
GND
2
FB
3
BNO
4
SENSE
5
6
VDD
GATE
LINEAR INTEGRATED CIRCUIT
PIN TYPE
DESCRIPTION
P
Ground.
Feedback input pin. The PWM duty cycle is determined by voltage level
I
into this pin and SENSE pin input.
Brownout Protection Pin. Connect a resistor divider between this pin
I
and bulk capacitor voltage to set the brownout level. If the voltage is
less than threshold voltage, the PWM output will be disabled.
Current sense input pin. Connected to MOSFET current sensing resistor
I
node.
P
Power supply.
O
The totem-pole output driver for driving the power MOSFET.
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UC3837

Preliminary
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
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UC3837

Preliminary
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS (TA=25°C, VDD =16V, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VDD
23
V
Input Voltage to FB Pin
VFB
-0.3 ~ 7
V
Input Voltage to CS Pin
VSENSE
-0.3 ~ 7
V
Junction Temperature
TJ
+150
C
Operating Temperature
TOPR
-40 ~ +125
°C
Storage Temperature
TSTG
-50 ~ +150
C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

OPERATING RANGE
PARAMETER
SYMBOL
VDD
Supply Voltage

RATINGS
10 ~ 22
UNIT
V
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=16V,unless otherwise specified)
PARAMETER
SUPPLY SECTION
Start Up Current
IC Operating current
VDD Zener Clamp Voltage
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
Hysteresis
CONTROL SECTION
VFB Open Loop Voltage Level
PWM Input Gain
Burst-Mode Out FB Voltage
Reduce-Frequency end FB Voltage
Burst-Mode Enter FB Voltage
Normal
Switch Frequency
Power-Saving
Duty Cycle
Frequency Hopping
Frequency VDD Stability
Frequency Temperature Stability
Feedback Resistor
PROTECTION SECTION
VCC Over Voltage Protection Threshold
FB PIN Over Load Protection Threshold
Over Load Protection Delay-Time
Soft start time
CURRENT LIMITING SECTION
Peak Current Threshold Voltage
Lead Edge Blanking Time
DRIVER OUTPUT SECTION
Output Voltage Low State
Output Voltage High State
Output Voltage Rise Time
Output Voltage Fall Time
BNO SECTION
Threshold voltage for BNO
SYMBOL
ISTR
IOP
VCLAMP
VDD = VDD(ON)-0.1V
VFB=3.5V
IDD=10mA
VTHD(ON)
VDD(MIN)
VDD(HY)
VFB-OPEN
AVCS
VFB(OUT)
VFB(END)
VFB(IN)
FSW
DMAX
FJ(SW)
FDV
FDT
RFB
∆VFB/∆VCS
VSENSE =0
VSENSE =0
VSENSE =0
VFB=3.5V, hopping Rang
Before enter burst mode
VFB=3.5V, VSENSE=0
TYP
MAX
UNIT
23
5
3.2
24.6
20
5
26
μA
mA
mA
14.5
8.5
5.4
15.5
9.5
V
V
V
55
20
5
3
1.1
1.8
0.9
65
22
75
-4
VDD=12V~20V
T=-20~100°C
VFB=4.2V
VCS
TLEB
VFB=3.5V, Duty=0%
VOL
VOH
tR
tF
VDD=16V,IO=-20mA
VDD=16V,IO= 20mA
CL=1.0nF
CL=1.0nF
VTH_BNO
MIN
13
7.5
VOVP
VOLP
TDelay
TSS
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TEST CONDITIONS
1.5
11
4.4
0.6
26
4.7
55
4
0.65
400
75
25
+4
5
5
5.0
V
ns
0.8
V
V
ns
ns
1.05
V
100
60
1.0
V
V
mS
mS
0.7
10
0.95
V
V/V
V
V
V
KHz
KHz
%
%
%
%
KΩ
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UC3837

Preliminary
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION
The UC3837 devices integrate many useful designs into one controller for low-power switch-mode power
supplies. The following descriptions highlight some of the features of the UC3837 series.
Start-up Current
The start-up current is only 5μA. Low start-up current allows a start-up resistor with a high resistance and a
low-wattage to supply the start-up power for the controller. For AC/DC adaptor with universal input range design, a
2.5~3MΩ, 1/8W startup resistor could be used together with a VDD capacitor to provide a fast startup and low power
dissipation solution.
Power-Saving Mode Operation
The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under
light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is
taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency
starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load
conditions. The 22KHz minimum frequency control also eliminates the audio noise at any loading conditions.
At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a
fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the
energy. The UC3837 enter burst mode at standby condition to minimize the switching loss and reduces the standby
power consumption. Power supplies using the UC3837 can easily meet even the strictest regulations regarding
standby power consumption.
Switch Frequency Set
The maximum switch frequency is fixed to 65KHz. Switch frequency is modulated by output power POUT during IC
operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The
magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower
switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light
load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW
and POUT/POUT (MAX) as followed Fig.1.
Fig.1 The relation curve between fSW and relative output power POUT/ POUT (MAX)
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UC3837

Preliminary
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
Fig.2 Frequency Hopping
Built-in Slope Compensation
Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the
sub-harmonic oscillation.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid
premature termination of the switching pulse, a 400ns leading-edge blanking time is built in. Conventional RC
filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot
switch off the gate driver.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.8V, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a
higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
Under Voltage Lockout (UVLO)
The turn-on and turn-off thresholds of the UC3837 are fixed internally at VTHD(ON)/VDD(MIN) During start-up, the
hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UC3837 will be enabled. The
hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of the main
transformer. VDD must not drop below VDD(MIN) during this start-up process. This UVLO hysteresis window ensures
that hold-up capacitor will be adequate to supply VDD during start-up.
Gate Output
The UC3837 output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat
dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control. The
low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 15V
clamp is added for MOSFET gate protection at higher than expected VDD input.
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UC3837

Preliminary
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Protection Controls
The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. Driver is reset after failure is eliminated.
OVP
The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed
Fig.3.
Fig.3 OVP case
Fig.4 OLP case
OLP
OLP will shut down driver when VFB> VOLP for continual a blanking time. The OLP event as followed Fig.4.
OTP
OTP will shut down driver when the NTC resistor temperature TJ>T (THR).
PCB Layout Note
Noise from the current sense or the control signal can cause significant pulse width jitter in
continuous-conduction mode, and slope compensation helps alleviate these problems. Good placement and layout
practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter
components near the UC3837, and increasing the power MOS gate resistance is advised.
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UC3837
Preliminary
LINEAR INTEGRATED CIRCUIT
REFRENCE CIRCUIT (12V/1.5A)

BOM
Reference
BD1
CX1 (Optional)
CY1 (Optional)
C2
C1
C3
C4
C5,C13 (Optional)
C7 (Optional)
C8
C9
C10
C11
C12
C14
D2
D3
D4 (Optional)
D5
F1
L1
Component
BD 1A/600V
NC
YC 220P/400V (Y1)
EC 22μF/400V 105°C
EC 10μF/400V 105°C
CC 0.01μF/1000V
EC 3.3μF/50V
CC 104P/25V 0805
CC 102P/25V 1206
CC 102P/25V 1206
CC 222P/100V 1206
EC 470u/16V 105°C
EC 220u/16V 105°C
CC 222P/16V 0805
NC
Diode FR107
Diode FR102
Diode SB360
R1Ω/0.5W
10μH 6mm
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Reference
L2
Q1
R1,R2
R3
R4 (Optional)
R5
R6
R7
R8
R9/R9-1
R10
R12
R13
R14
R15
R16
R17
T1
U1
U2
U3
Component
20mH 6*8mm
4N60
R 1MΩ 1206
R 30KΩ 1206
R 20Ω 1W
R 0Ω 1206
R 100Ω 1206
R 1.1Ω 1W
R 10kΩ 1206
R 12KΩ 0805
R 51Ω 0.5W
R 510Ω 0805
R 2KΩ 0805
R 0Ω 0805
R 43kΩ 0805
R 12kΩ 0805
R 120kΩ 0805
EF-20
IC UC3837
TL431
PC817
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QW-R103-069.B
UC3837
Preliminary
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
DMAX (%)
FSW-Power-Saving (KHz)
ISTR (µA)
FSW(kHz)
VDD(min) (V)
VTHD(ON) (V)

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UC3837

Preliminary
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS (Cont.)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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