CM8500

CM8500
3A BUS TERMINATOR
GENERAL DESCRIPTION
FEATURES
The CM8500 is a switching regulator designed to provide a
desired output voltage or termination voltage for various
applications by converting voltage supplies ranging from 2.0V
to 4.0V. The CM8500 can be implemented to produce
regulated output voltages in two different modes. In the
default mode, when the VIN/2 pin is open, the output voltage
is 50% of the VCCQ. The CM8500 can also be used to
produce various user-defined voltages by forcing a voltage on
the VIN/2 pin. In this case, the output voltage follows the
VIN/2 pin input voltage. The switching regulator is capable of
sourcing or sinking up to 3A of current while regulating an
output V TT voltage to within 3% or less.
The CM8500, used in conjunction with series termination
resistors, provides an excellent voltage source for active
termination schemes of high speed transmission lines as
those seen in high speed memory buses and distributed
backplane designs.
Patent Filed #6,452,366
16 pin PTSSOP and PSOP package
Source and sink up to 3A, no heat sink required
Peak Current to 6A
Integrated Power MOSFETs
Output voltage can be programmed by external resistors
Separate voltages for VCCQ and PVDD
V OUT of ±3% or less at 3A
Minimum external components
Shutdown for standby or suspend mode operation
Thermal shutdown protection
Soft start
The voltage output of the regulator can be used as a
termination voltage for other bus interface standards such as
SSTL, CMOS, Rambus ™ ,GTL+, VME, LV-CMOS, LV-TTL,
and PECL.
APPLICATIONS
Mother Board
IPC
PCI / AGP Graphics
SCSI-III Bus terminator
Game / Play Station
Buck Converter
Set Top Box
PIN CONFIGURATION
PSOP-16 (PS16)/PTSSOP-16 (PT16)
Top View
2004/06/01 Rev. 1.1
1
VCC1
VCC2
16
2
PVDD1
PVDD2
15
3
VL1
VL2
14
4
PGND1
PGND2
13
5
AGND
AGND
12
6
SD
VFB
11
7
VIN/2
VCCQ
10
8
AGSEN
AGND
9
Champion Microelectronic Corporation
Page 1
CM8500
3A BUS TERMINATOR
PIN DESCRIPTION
Pin No.
Symbol
Description
Operating Rating
Typ.
Max.
Min.
Unit
1,16
VCC1,VCC2
Voltage supply for internal circuits
2
2.5
4
V
2,15
PVDD1,PVDD2
Voltage supply for output power transistors
2
2.5
4
V
3,14
VL1,VL2
Output voltage/inductor connection (IDD1+IDD2,
-3
3
A
0.75 X
VCC +
V
VCC
0.3V
Output RMS current)
4,13
PGND1,PGND2
Ground for output power transistors
AGND
Ground for internal reference voltage divider
8
AGSEN
Ground for remote sensing
6
SD
Shutdown active high. CMOS input level
5,9,12
7
VIN/2
Input for external reference voltage
10
VCCQ
Voltage reference for external voltage divider
11
VFB
Feedback node for the VTT
VCCQ/2
V
2.5
V
VCCQ/2
V
BLOCK DIAGRAM
VCCQ
VCC1
10
1
PVDD2
15
PVDD1
2
SD
6
VCC2
16
OSCILLATOR/
RAMP GENERATOR
3
VL1
14 VL2
100K
Q
R
Q
ERROR AMP
VIN/2
S
7
+
+
RAMP AMP
COMPARATOR
-
100K
AGND 5
AGND 9
20PF
AGND 12
AGND
13
4
11
8
PGND1
VFB
PGND2
ORDERING INFORMATION
Part Number
Temperature Range
CM8500IT
-40℃ to 85℃
16-Pin
PTSSOP (PT16)
CM8500IS
-40℃ to 85℃
16-Pin
PSOP (PS16)
CM8500GIT*
-40℃ to 85℃
16-Pin
PTSSOP (PT16)
CM8500GIS*
-40℃ to 85℃
16-Pin
PSOP (PS16)
CM8500TEVAL
*Note: G : Suffix for Pb Free Product
2004/06/01 Rev. 1.1
Package
Evaluation Board (T16)
Champion Microelectronic Corporation
Page 2
CM8500
3A BUS TERMINATOR
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the
Junction Temperature ...…………………… …………150°C
device could be permanently damaged.
Storage Temperature
PVDD/VCC/VCCQ ......................................….......-0.3V to 4.0V
Lead Temperature (Soldering, 10 sec)……………….. 300°C
Thermal Resistance  (θ JA )….. ………………….. .40°C/W
Voltage on Any Other Pin ………... GND – 0.3V to VCC + 0.3V
……................……. -65°C to 125°C
Output RMS Current, Source or Sink .....…………........…...3.0A
OPERATING CONDITIONS
Temperature Range ............................. -40°C to 85°C
PVDD Operating Range .........................2.0V to 4.0V
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, these specifications apply TA=25°C;
VCC=+3.3V and PVDD=+3.3V) maximum ratings are stress ratings only and functional device operation is not implied.
(Note 1)
Symbol
Parameter
Test Conditions
CM8500
Min.
Typ.
Max.
Unit
SWITCHING REGULATOR
IOUT = 0, VCCQ = 2.3V
1.12
1.15
1.18
V
VCCQ = 2.5V
1.22
1.25
1.28
V
VCCQ = 2.7V
1.32
1.35
1.38
IOUT =
VCCQ = 2.3V
1.09
1.15
1.21
V
±3A,
VCCQ = 2.5V
1.19
1.25
1.31
V
VCCQ = 2.7V
1.28
1.35
1.42
V
VCCQ = 2.3V
1.139
1.15
1.162
V
VCCQ = 2.5V
1.238
1.25
1.263
V
VCCQ = 2.7V
1.337
1.35
1.364
V
KΩ
690
KHz
VIN/2 =
open
Note 2
VL
Output Voltage, SSTL_2
V
VIN/2 =
open
Note 3
IOUT = 0
VIN/2
Internal Resistor Divider
ZIN
VIN/2 Reference Pin Input Impedance
fsw
Switching Frequency
CM8500
IOUT(RMS)
Maximum Output RMS Current
CM8500
3
A
IOUT(PEAK)
Maximum Output Peak Current
CM8500
6
A
Drain to Source on-State Resistance
PVDD=5V
180
mΩ
Note 2
Note 2
VCCQ = 0
50
510
600
MOSFETs
RDS(ON)
150
SUPPLY
IVCCA
Quiescent Current
IPVDD
VFB = 1.4V
LC unconnected
VFB = 1.4V
LC unconnected
200
µA
500
µA
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions
Note 2: VCC, PVDD = 3.3V ±10%
Note 3: It’s not 100% test
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 3
CM8500
3A BUS TERMINATOR
FUNCTIONAL DESCRIPTION
The CM8500 is a switching regulator that is capable of sinking
INPUTS
and sourcing 3A of current without an external heat sink.
The input voltage pins (VCCQ or VIN/2) determine the output
CM8500 uses a standard surface mount PTSSOP and PSOP
voltages (VL1 or VL2). In the default mode, when the VIN/2 pin
package with bottom metal exposed and the heat can be
is open, the output voltage is 50% of the VCCQ input.
piped through the bottom of the device and onto the PCB.
If a specific voltage is forced at the VIN/2 pin, the output voltage
follows the voltage at the VIN/2 pin. VCCQ suggested
The CM8500 integrates power MOSFETs that are capable of
connecting to VCCQ of memory module for better tracking with
source and sink 3A of current while maintaining excellent
memory VCCQ.
voltage regulation. The output voltage can be regulated within
3% or less by using the external feedback. Separate voltage
OTHER SUPPLY VOLTAGES
supply inputs have been added to fit applications with various
Several inputs are provided for the supply voltages: PVDD1,
power supplies for the databus and power buses.
PVDD2, VCC1, and VCC2.
OUPUTS
The PVDD1 and PVDD2 provide the power supply to the power
The output voltage pins (VL1, VL2) are tied to the databus,
MOSFETs. VCC1 and VCC2 provide the voltage supply to the
address, or clock lines via an external inductor. Output voltage logic section and internal error amplifiers.
is determined by the VCCQ or VIN/2 inputs.
FEEDBACK
The VFB pin is an input that can be used for closed loop
compensation. This input is derived from the voltage output.
AGSEN pin is a contact node of internal resistor divider for
remote sense.
APPLICATIONS
USING THE CM8500 FOR SSTL BUS TERMINATION
Figure 1 is the typical schematic of the CM8500TEVAL that
shows the recommended approach for bus terminating
solutions for SSTL-2 bus. This circuit can be used in PC
memory and Graphics memory applications as shown in
Figure 2 and Figure 3.
Figure 4 shows the PCB layout of the CM8500TEVAL.
Table 1details the key parameters of SSTL_2 specification.
Figure 5 shows two different approach of SSTL_2 Terminated
Output. (Refer to page 8 for detail description.)
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 4
CM8500
3A BUS TERMINATOR
APPLICATION CIRCUIT
NOTE:
J3:referance output provided from Vtt
J4:short :Demo kit on .
open:off(into shutdown mode)
J6:reference output provided from shunt regulator
J5:pin1 ,pin2 short:Vtt = 1/2Vcc
1
2
C13
104
5
Vref-OUT
J3
TP1
BNC
When external voltage applied ,pin1,2 should be open
R8
100
and pin2:connect to external voltage (+)
4
1
pin3:connect to external voltage (-)
3
Vtt=1/2 external voltage
2
D6
100uf/6.3V
100uf/6.3V 820uf/6.3V
L1
3.3uH
R6,R7(option circuit)forVttVOLTAGEADJUST
SK12
Vtt=(Vcc*R6)/R6+R7
VTT
J1
1
2
C3
104
C12
C11
C7
C2
104
D5
SK12
C15
10uf/6.3V
VCC
U1 CM8500
1
VDD
2
2
1
C14
100uf/6.3V
3
C4
104
R5
100k
4
5
6
J4ON/OFF 2
7
2
R6
R7
C6 8
10k
10k
102
1
1
VCC1
VCC2
VDD1
VDD2
VL1
VL2
PGND1 PGND2
AGND1 AGND4
SD
2/VCC
FB
VCCQ
G-sense AGND3
VCC
16
R1
5R1
J2
DC-INPUT
VDD
1
2
VDD
15
C16
14
C5
13
104
C1
104
C10
10uf/6.3V
470uf/6.3V
C9
100uf/6.3V
12
11
10
9
J5
2
3
1
IN/EXT
R3 200k
1
2
1
2
R4
1k
C8
102
Figure 1. CM8500 Typical Application
(Schematic of CM8500TEVAL)
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 5
CM8500
3A BUS TERMINATOR
Figure 2. Termination Solution for PC Main Memory (Mother Boards)
Figure 3. Termination Solution for Graphic Memory (AGP Graphics)
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 6
CM8500
3A BUS TERMINATOR
CM8500TEVAL PART LIST
Item
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Q’ty
Description
Resistors
0805, 5Ω, 1/8W
1
0805, 100Ω, 1/8W
1
0805, 470Ω, 1/8W
1
0805, 1KΩ, 1/8W
1
0805, 100KΩ, 1/8W
2
Designator
Manufacturer
R1
R8
R9 (option)
R4
R3, R5
Capacitors
1
0805, 1nF/ 16V (102)
6
0805, 0.1µF/ 16V (104)
1
0805, 1µF/ 16V (105)
CE 10φ, 820uF/ 6.3V
1
2
B Size, Tant 10uF/ 6.3V
4
D Size, Tant 100uF/ 6.3V
Magnetics
1
3.3uH 5A Inductor
IC’s
1
CM8500IT
1
CM431L
Connectors
1
2-pin, 2.54mm
4
2-pin Jumper, 2.54mm
1
3-pin Jumper, 2.54mm
PCBs
1
CM8500TEVAL PCB
C6, C8
C1, C2, C3, C4, C5
C13
C7
C10, C15
C9, C11, C12, C14
Sanyo OSCON
L1
Bipolar Electronic Corp.
U1
U2 (option)
Champion Microelectronic Corp.
Champion Microelectronic Corp.
J2
J1, J3, J4, J6 (option)
J5
Champion Microelectronic Corp.
Vendor Information
Bipolar Electronic Corp.
Sanyo
2004/06/01 Rev. 1.1
Phn: +886-3-360 8892
Champion Microelectronic Corporation
Page 7
CM8500
3A BUS TERMINATOR
CM8500TEVAL PCB LAYOUT
Figure 4. CM8500EVAL PCB Layout
SSTL-2 SPECIFICATIONS
SYMBOL
VDD
PARAMETER
Device Supply Voltage
MIN
TYP
VDDQ
MAX
UNITS
N/A
V
VDDQ
Output Supply Voltage
2.3
2.5
2.7
V
VREF
Input Reference Voltage
1.15
1.25
1.35
V
VTT
Termination Voltage
VREF - 0.04
VREF
VREF + 0.04
V
INPUT DC LOGIC LEVELS
VIH (DC)
DC Input Logic High
VREF + 0.18
VDDQ + 0.3
V
VIL (DC)
DC Input Logic Low
- 0.3
VREF - 0.18
V
INPUT AC LOGIC LEVELS
VIH (AC)
AC Input Logic High
VIL (AC)
AC Input Logic Low
VREF + 0.35
V
VREF - 0.35
V
OUTPUT DC CURRENT DRIVE
IOH (DC)
Output Minimum Source DC Current
IOL (DC)
Output Minimum Sink DC Current
Notes:
- 15.2
mA
15.2
mA
VREF and VTT must track variations in VDDQ
Peak-to-peak AC noise on VREF may not exceed ± 2% VREF (DC)
VTT of transmitting device must track VREF of receiving device
Table 1. Key Specifications for SSTL_2
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 8
CM8500
3A BUS TERMINATOR
SSTL_2 TERMINATED OUTPUT
Single Terminated Output
Double Terminated Output
Figure 5. SSTL_2 Terminated Output
Note.
The SSTL_2 specification requires adequate output current drive so that parallel termination schemes can be used. The use of
parallel termination is important for high-speed signaling, since it allows proper termination of the bus transmission lines, which
reduces signal reflections. The result will be improved settling, lower EMI emissions, and higher possible clock rates. A minimum
termination resistance of 23Ω to VTT can be used and still comply with the minimum output voltages and output currents of the
SSTL_2 specification.
Two choices for implementing the parallel termination are shown in Figure 5.
Double Terminated Output
The bus is terminated at both ends with a 50Ω resistor, for a combined parallel resistance of 25Ω.
Single Terminated Output
The bus is terminated at the far end from the controller with a single 25Ω resistor.
It is strongly recommended that the single resistor termination scheme be used for best performance. The benefits of this
approach include reduced cost, simpler signal routing, reduced reflections, and better signal bandwidth and settling.
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 9
CM8500
3A BUS TERMINATOR
CM8500EVAL TESTING DIAGRAM
Figure 6. CM8500EVAL Typical Testing Diagram
TYPICAL CHARACTERISTICS
CM8500 Temperature vs. VTT (VCC,VCCQ&VDD=3.3V)
1.350
VTT(V)
1.300
1A
2A
1.250
3A
1.200
1.150
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
85
T(℃)
Temperature vs. VTT VCC, VCCQ & VDD=3.3V
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 10
CM8500
3A BUS TERMINATOR
CM8500 Temperature vs. VTT (VCC,VCCQ&VDD=2.5V)
1.350
VTT(V)
1.300
1A
2A
1.250
3A
1.200
1.150
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
85
T(℃)
Temperature vs. VTT VCC, VCCQ & VDD=2.5V
2V INPUT LOAD: 0A - 3A
2.5V INPUT LOAD: 0A - 3A
3.3V INPUT LOAD: 0A - 3A
2004/06/01 Rev. 1.1
2V INPUT LOAD: 3A - 0A
2.5V INPUT LOAD: 3A - 0A
3.3V INPUT LOAD: 3A - 0A
Champion Microelectronic Corporation
Page 11
CM8500
3A BUS TERMINATOR
PACKAGE DIMENSION
16-PIN PTSSOP (PT16)
θ
θ
16-PIN PSOP (PS16)
θ
θ
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 12
CM8500
3A BUS TERMINATOR
IMPORTANT NOTICE
Champion Microelectronic Corporation (CMC) reserves the right to make changes to its products or to discontinue
any integrated circuit product or service without notice, and advises its customers to obtain the latest version of
relevant information to verify, before placing orders, that the information being relied on is current.
A few applications using integrated circuit products may involve potential risks of death, personal injury, or severe
property or environmental damage. CMC integrated circuit products are not designed, intended, authorized, or
warranted to be suitable for use in life-support applications, devices or systems or other critical applications. Use of
CMC products in such applications is understood to be fully at the risk of the customer. In order to minimize risks
associated with the customer’s applications, the customer should provide adequate design and operating
safeguards.
HsinChu Headquarter
Sales & Marketing
5F, No. 11, Park Avenue II,
Science-Based Industrial Park,
HsinChu City, Taiwan 300
11F, No. 306-3, Sec. 1, Ta Tung Rd.,
Hsichih, Taipei Hsien
Taiwan 221
T E L : +886-3-567 9979
F A X : +886-3-567 9909
http://www.champion-micro.com
T E L : +886-2-8692 1591
F A X : +886-2-8692 1596
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 13