UMFT230XA Datasheet

UMFT230XA Datasheet
Version 1.3
Document Reference No.: FT_000519
Clearance No.: FTDI# 269
Future Technology
Devices International
Datasheet
UMFT230XA USB to Basic
UART Development Module
UMFT230XA is a USB to Basic UART DIP module with a 0.3” row pitch.
1
Introduction
The UMFT230XA is a development module
for FTDI’s FT230XQ, one of the devices
from FTDI’s range of USB interface bridging
integrated circuit devices. FT230X is a USB
to UART interface with a battery charger
detection feature, which can allow batteries
to be charged with a higher current from a
dedicated charger port (without the
FT230X being enumerated). In addition,
asynchronous and synchronous bit bang
interface modes are available. The
internally generated clock (6MHz, 12MHz
and 24MHz) can be brought out of the on
one of the CBUS pin to be used to drive a
microprocessor or external logic.
The UMFT230XA is a module which is
designed to plug into a standard 0.3” wide
16 pin DIP socket. All components used,
including the FT230XQ are Pb-free (RoHS
compliant).
1.1 Features
The UMFT230XA is fitted with a FT230XQ; all
the features of the FT230X can be utilized with
the UMFT230XA. For a full list of the FT230X’s
features please see the FT230X datasheet which
can be found by clicking here.
In addition to the features listed in the FT230X
datasheet, the UMFT230XA has the following
features:

Small PCB assembly module designed to fit
a standard 7.62mm (0.3”) wide 16 pin DIP
socket. Pins are on a 2.54mm (0.1”) pitch.

On board USB ‘mini-B’ socket allows module
to be connected to a PC via a standard A to
mini-B USB cable.

Functionally configurable using solder links.
The default solder links setup enables the
module to function without peripheral wires
or application board. Other configurations
enable external power supply options and
variation of logic reference levels.
Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the user agrees
to defend, indemnify and hold harmless FTDI from any and all damages, claims, suits or expense resulting
from such use.
UMFT230XA Datasheet
Version 1.3
Document Reference No.: FT_000519
Clearance No.: FTDI#
269
Table of Contents
1
Introduction ................................................................................... 1
1.1
Features ........................................................................................................ 1
2
Driver Support ................................................................................ 3
3
Ordering Information & TID ........................................................... 3
4
UMFT230XA Signals and Configurations ......................................... 4
5
4.1
UMFT230XA Pin Out ...................................................................................... 4
4.2
Signal Descriptions ....................................................................................... 5
4.3
CBUS Signal Options ..................................................................................... 6
Module Configurations .................................................................... 7
5.1
Solder Link Configuration Options ................................................................. 7
5.2
Solder Link Modifications .............................................................................. 7
5.3
Bus Power Configuration ............................................................................... 8
5.4
Self Powered Configuration ........................................................................... 9
5.5
USB Bus Powered with Power Switching Configuration .............................. 10
5.6
Variable IO Voltage Supply ......................................................................... 11
5.7
3.3V Voltage Supply .................................................................................... 12
5.8
Configuring the MTP ROM ............................................................................ 12
6
Module Dimensions ...................................................................... 13
7
IC Package Markings .................................................................... 13
8
UMFT230XA Module Circuit Schematic .......................................... 14
9
Internal MTPROM Configuration ................................................... 15
10 Contact Information ..................................................................... 16
Appendix A – List of Figures and Tables ................................................................ 18
Appendix B – Revision History .............................................................................. 19
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Driver Support
Royalty-Free VIRTUAL COM PORT (VCP)
DRIVERS for:
Royalty-Free D2XX Direct Drivers (USB Drivers +
DLL S/W Interface):

Windows 8 32,64-bit

Windows 8 32,64-bit

Windows 7 32,64-bit

Windows 7 32,64-bit

Windows Vista

Windows Vista

Windows XP 32,64-bit

Windows XP 32,64-bit

Windows XP Embedded

Windows XP Embedded.

Windows CE.NET 4.2 , 5.0 and 6.0

Windows CE.NET 4.2, 5.0 and 6.0

MAC OS OS-X

MAC OS OS-X

Linux 3.0 and greater

Linux 3.0 and greater

Android

Android
The drivers listed above are all available to download for free from www.ftdichip.com. Various 3rd Party
Drivers are also available for various other operating systems - visit www.ftdichip.com for details.
3
Ordering Information & TID
Module Code
Utilised IC
Code
TID
Description
UMFT201XA-01
FT201XQ
40001460
USB to I2C evaluation module.
UMFT220XA-01
FT220XQ
40001461
USB to 4-bit SPI/FT1248 evaluation module.
UMFT221XA-01
FT221XQ
40001462
USB to 8-bit SPI/FT1248 evaluation module.
UMFT230XA-01
FT230XQ
40001463
USB to Basic UART evaluation module. (long pin)
UMFT230XA-02
FT230XQ
40001463
USB to Basic UART evaluation module. (short pin)
UMFT231XA-01
FT231XQ
40001464
USB to Full-Handshake UART evaluation module.
UMFT240XA-01
FT240XQ
40001466
USB to 8-bit 245 FIFO evaluation module.
TID is the test identification code. Note that this TID is for revision D silicon.
4
4
4
4
4
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UMFT230XA Signals and Configurations
4.1 UMFT230XA Pin Out
J2-1 – SLD
VBUS
VCC
GND – J1-1
3V3OUT
VCCIO
CBUS3
RESET#
CBUS2
CTS#
CBUS1
RTS#
CBUS0
RXD
J2-8 – GND
TXD – J1-8
Figure 4.1 – Module Pin Out
Figure 4.1 illustrates the signals available on the DIL pins. The LHS shows the pinout when the module is
viewed from the bottom. The RHS shows what signals are available (on the pins below) when viewed
from the top. The pins do not go completely through the PCB.
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4.2 Signal Descriptions
Pin No.
J1-1,
J2-8
Name
Type
Description
GND
PWR
Module Ground Supply Pins
Power
J1-2
3V3OUT
Input/
Output
3.3V output from integrated LDO regulator. This pin is decoupled with a 100nF
capacitor to ground on the PCB module. The prime purpose of this pin is to provide
the 3.3V supply that can be used internally. For power supply configuration details
see section 5.
Power
+1.8V to +3.3V supply to the UART Interface and CBUS I/O pins. For power supply
Input
configuration details see section 5.
J1-3
VCCIO
J1-4
RESET#
Input
J1-5
CTS#
Input
Clear To Send Control Input / Handshake Signal.
J1-6
RTS#
Output
Request to Send Control Output / Handshake Signal.
J1-7
RXD
Input
Receiving Asynchronous Data Input.
J1-8
TXD
Output
Transmit Asynchronous Data Output.
J2-1
SLD
GND
USB Cable Shield. Connected to GND via a 0ohm resistor.
FT230X active low reset line. Configured with an on board pull-up and recommended
filter capacitor.
5V Power output from the USB bus. For a low power USB bus powered design, up to
J2-2
VBUS
Power
Output
100mA can be sourced from the 5V supply and applied to the USB bus. A maximum
of 500mA can be sourced from the USB bus in a high power USB bus powered design.
Currents up to 1A can be sourced from a dedicated charger and applied to the USB
bus.
Power
J2-3
VCC
J2-4
CBUS3
I/O
J2-5
CBUS2
I/O
J2-6
CBUS1
I/O
J2-7
CBUS0
I/O
Input
5V power input for FT230X. For power supply configuration details see section 5.
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. . See CBUS Signal Options, Table 4.2.
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM.. See CBUS Signal Options, Table 4.2.
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM.. See CBUS Signal Options, Table 4.2.
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. See CBUS Signal Options, Table 4.2.
Table 4.1 – Module Pin Out Description
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4.3 CBUS Signal Options
The following options can be configured on the CBUS I/O pins. These options are all configured in the
internal MTP ROM using the utility software FT_PROG, which can be downloaded from the
www.ftdichip.com. The default configuration is described in Section 9.
CBUS Signal
Option
Available On
CBUS Pin
Tristate
CBUS0-CBUS3
IO Pad is tristated
TXDEN
CBUS0-CBUS3
Enable transmit data for RS485
DRIVE_1
CBUS0-CBUS3
Output a constant 1
DRIVE_0
CBUS0-CBUS3
Output a constant 0
PWREN#
CBUS0-CBUS3
Output is low after the device has been configured by USB, then high during
USB suspend mode. This output can be used to control power to external logic
P-Channel logic level MOSFET switch.
NOTE: This function is driven by an open-drain to ground with no internal
pull-up, this is specially designed to aid battery charging applications.
UMFT230XA connects an on-board 47K pull-up to each CBUS and DBUS pin.
TXLED#
CBUS0-CBUS3
Transmit data LED drive – open drain pulses low when transmitting data via
USB.
RXLED#
CBUS0-CBUS3
Receive data LED drive – open drain pulses low when receiving data via USB.
TX&RXLED#
CBUS0-CBUS3
LED drive – open drain pulses low when transmitting or receiving data via
USB.
SLEEP#
CBUS0-CBUS3
Goes low during USB suspend mode. Typically used to power down an
external logic to RS232 level converter IC in USB to RS232 converter designs.
Cancel SLEEP# option for when connected to a dedicated charger port, this
can be selected when configuring the MTP ROM. When this option is enabled
SLEEP# is driven high when FT230X is connected to a Dedicated Charger Port.
CLK24MHz
CBUS0-CBUS3
24 MHz Clock output.**
CLK12MHz
CBUS0-CBUS3
12 MHz Clock output.**
CLK6MHz
CBUS0-CBUS3
6 MHz Clock output.**
GPIO
CBUS0-CBUS3
CBUS bit bang mode option. Allows up to 4 of the CBUS pins to be used as
general purpose I/O. Configured individually for CBUS0, CBUS1, CBUS2 and
CBUS3 in the internal MTP ROM. A separate application note, AN232R-01,
available from FTDI website (www.ftdichip.com) describes in more detail how
to use CBUS bit bang mode.
BCD_Charger
CBUS0-CBUS3
Battery Charge Detect indicates when the device is connected to a dedicated
battery charger host. Active high output. NOTE: Requires a 10K pull-down to
remove power up toggling.
BCD_Charger#
CBUS0-CBUS3
Active low BCD Charger, driven by an open drain to ground with no internal
pull-up (4.7K on board pull-up present).
BitBang_WR#
CBUS0-CBUS3
Synchronous and asynchronous bit bang mode WR# strobe output.
BitBang_RD#
CBUS0-CBUS3
Synchronous and asynchronous bit bang mode RD# strobe output.
VBUS Sense
CBUS0-CBUS3
Input to detect when VBUS is present.
Time Stamp
CBUS0-CBUS3
Toggle signal which changes state each time a USB SOF is received
Keep_Awake#
CBUS0-CBUS3
Table 4.2 – CBUS Signal Options
Description
Active Low input, prevents the chip from going into suspend.
**When in USB suspend mode the outputs clocks are also suspended.
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Module Configurations
5.1 Solder Link Configuration Options
Solder
Link No.
JP1
Setting
Status
Description
Shorted
Default
Connects internal 3.3V regulator to VCCIO. This restricts signal drive to only 3.3V
level signals.
Disconnects internal 3.3V regulator connection to VCCIO. This mode allows for the
supply of 1.8V-3.3V power from an external power supply, thus allows the
JP1
Opened
processing of signals with logic levels between 1.8V and 3.3V. VCCIO can be
adjusted to match the interface requirements of external circuitry.
Table 5.1 – Solder Links JP1 Pin Description
NonDefault
Solder
Link No.
JP2
Setting
Status
Description
Shorted
Default
Connects VBUS to VCC. This mode is known as “BUS-Powered” mode.
NonDisconnects VBUS to VCC. This allows the supply of power form an external power
Default
supply. This mode is known as “Self-Powered” mode.
Table 5.2 – Solder Links JP2 Pin Description
JP2
Opened
Note: There should never be more than one power output supplied to the same net. Failure to properly
remove solder from JP1 and JP2 can cause a direct short between two different power supplies (when a
self-powered set-up is applied and the USB bus is connected) resulting in damage to the UMFT230XA
module and the target circuit.
5.2 Solder Link Modifications
The UMFT230XA has two solder links fixed to the top side of the PCB. These solder link can be adjusted
by removing the solder linking the two PADs to produce an open or by placing a solder bridge to produce
a short.
By default the UMFT230XA has both solder links shorting their pads. To allow for enhanced flexibility of
this module remove both solder links and wire the header pins according to the power setup required.
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5.3 Bus Power Configuration
GND
Alternative
connection
VCCIO
VCC
3V3OUT
VBUS
Alternative
connection
Current Flow
GND
Self-Sourced
3V3 TTL Mode
Solder Link JP1 - Closed
Bus Powered
Mode
Solder Link JP2 - Closed
Viewing pins thourgh the board
from the top.
Figure 5.1 – Bus Powered Configuration
A bus powered configuration draws its power from the USB host/hub. The UMFT230XA is configured by
default to be in bus powered mode.
Figure 5.1illustrates the UMFT230XA module in a typical USB bus powered design configuration. By
default solder bridge connections link VCCIO to 3V3OUT, and VCC to VBUS. (Note that Figure 5.1 is for
illustration only and that the pins do not actually go all the way through the PCB
For a bus power configuration power is supplied from the USB VBUS:
+5V VBUS power is sourced from the USB bus and is connected to the FT230X power input (VCC)
+3.3V power is sourced from the FT230X’s voltage regulator output and is connected to the FT230X IO
port’s power input (VCCIO).
Interfacing the UMFT230XA module to a microcontroller (MCU), or other logic devices for bus powered
configuration is done the same way as a self powered configuration (see Section 3), except that it is
possible for the MCU or external device to take its power supply from the USB bus (either the 5V from
the USB pin, or 3.3V from the 3V3OUT pin).
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5.4 Self Powered Configuration
Vcc = 1.8V – 3.3V
Vcc = 5V
VIO
TXD
MCU
TXD
RXD
RXD
RTS#
RTS#
CTS#
CTS#
VCCIO
VCC
3V3OUT
VBUS
GND
Self Power
Variable TTL
Mode
Viewing
pins
thourgh
the
board
Mode
Solder Link JP2 - Open
from the top.
Solder Link JP1 - Open
Figure 5.2 – Self-Powered Configuration
A self-powered configuration operates on the principle of drawing power from an external power supply,
as oppose to drawing power from the USB host. In this configuration no current is drawn from the USB
bus.
Figure 5.2 illustrates the UMFT230XA in a typical USB self-powered configuration. In this case the solder
links connection of JP1 is removed, which allows 5V power to be supplied to the module VCC pins from an
external source. VCCIO can to be powered from 3V3OUT or the VCC of an external source. (Note that
Figure 5.2 is for illustration only and that the pins do not actually go all the way through the PCB)
For a self-powered configuration it is necessary to prevent current from flowing back to the USB data
lines when the connected USB host or hub has powered down. To carry out this function the UMFT230XA
uses an on-board voltage divider network connected to the USB power bus and RESET# pin. This
operates on the principle that when no power is supplied to the VBUS line, the FT230X will automatically
be held in reset by a weak pull-down, when power is applied the voltage divider will apply a weak 3.3V
pull-up. Driving a level to the RESET# pin of the UMFT230XA will override the effect of this voltage
divider. When the FT230X is in reset the USB DP signal pull-up resistor connected to the data lines is
disconnected and no current can flow down the USB lines.
An example of interfacing the FT230X with a Microcontroller’s UART interface is also illustrated in Figure
5.2. This example shows the wire configuration of the transfer and handshake lines. This example also
illustrates that a voltage other than 3.3V can be supplied to the FT230X’s IO port, this feature is
described further and for bus powered mode in Section 5.6.
Alternatively both the FT230X’s IO port and MCU can be powered from the 3V3OUT pin; this approach is
described in Section 5.5.
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5.5 USB Bus Powered with Power Switching Configuration
5V
P-Channel Power
MOSFET
s
d
VCC
TXD
0.1uF
10K
RXD
TXD
RTS#
Soft
Start
Circuit
CBUSx
PWREN#
RXD
CTS#
0.1uF
g
1K
RTS#
MCU
CTS#
VCCIO
VCC
3V3OUT
VBUS
GND
Self-Sorced
3.3V TTL Mode
Solder Link JP1 - Closed
Bus Powered
Mode
Solder Link JP2 - Closed
Viewing pins thourgh the board
from the top.
Figure 5.3 – Bus Powered with Power Switching Configuration
USB bus powered mode is introduced in Section 5.3. This section describes how to use this mode with a
power switch.
USB bus powered circuits are required by USB compliance standards to consume less than 2.5mA (and
less than 100mA when not enumerated and not suspended) when connected to a host or hub when in
USB suspend mode. The PWREN# CBUS function can be used to remove power from external circuitry
whenever the FT230X is not enumerated. (Note: It is impossible to be in suspended mode when
enumerated.) (Note that Figure 5.3 is for illustration only and that the pins do not actually go all the way
through the PCB)
To implement a power switch using PWREN#, configure a P-Channel Power MOSFET to have a soft start
by fitting a 10K pull-up, a 1K series resistor and a 100nF cap as shown in Figure 5.3. The time constant
Connecting the source of the P-Channel MOSFET to 3V3OUT instead of VBUS can allow external logic to
source 3.3V power from the FT230X without breaking USB compliancy. In this setup it is important that
the VCCIO is not sourced from the drain of this MOSFET, this is because the power used to drive the gate
of this transistor is sourced from VCCIO. VCCIO should be connected directly to 3V3OUT for this setup to
function effectively. It is also important that the external logic must and IO core of the FT230X must not
draw more that 50mA, this is because the current limit of the internal 3.3V regulator is 50mA.
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5.6 Variable IO Voltage Supply
Vcc = 1.8V – 3.3V
TXD
MCU
TXD
RXD
RXD
RTS#
RTS#
CTS#
CTS#
VCCIO
VCC
3V3OUT
VBUS
GND
Solder Link JP1 - Open
Solder Link JP2 - Closed
Viewing pins thourgh the board
from the top.
Figure 5.4 – USB Bus Powered 3.3V Logic Drive
The FT230X can process signals at CMOS/TTL logic levels in the range of 1.8V to 3.3V. This section
describes how to utilise this feature.
Figure 5.4 shows a configuration where the FT230X is interfaced to a device with IOs operating in the
range of 1.8V – 3.3V. The IO ports of this module need to be powered with a voltage level that is equal
to the level of the signals it is processing. Since the FT230X’s embedded voltage regulator only outputs
3V3 the IO ports will need to be powered from another power source when operating at voltage levels
other than 3.3V. (Note that Figure 5.4 is for illustration only and that the pins do not actually go all the
way through the PCB)
By default, a short is present between 3V3OUT (embedded voltage regulator) and VCCIO (IO port’s
power input) by solder links JP1. If an external power supply is used to power the IO ports this solder
links needs to be open. This can be done by removing the solder linking the two pads of the solder links.
The configuration described in this section can be implemented in either bus-powered mode or selfpowered mode.
Note 1: The CBUS and DBUS pins are 5V tolerant; however these signals cannot drive signals at 5V
TTL/CMOS. VCCIO is not 5V tolerant; applying 5V to VCCIO will damage the chip.
Note 2: If power is applied to VCCIO and no power is applied to VCC all Ios will be at an unknown state,
this however will not damage the chip. The FT230X also has protective circuitry to prevent the chip being
damaged by a voltage discrepancy between VCCIO and the level of the signal being processed.
Note 3: When using VCCIO less than 3V3 on a chip from FTDI’s X-chip range, it is recommended to uses
pull up resistors (47K) to VCCIO on the data lines, all of the UMFT2xxXA devices include an on-board
pull-up for these lines.
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5.7 3.3V Voltage Supply
Vcc = 3.3V
Vcc = 3.3V
TXD
MCU
TXD
RXD
RXD
RTS#
RTS#
CTS#
CTS#
VCCIO
VCC
3V3OUT
VBUS
GND
Solder Links JP2 - Open
Solder Links JP1 - Closed
Viewing pins thourgh the board
from the top.
Figure 5.5 – USB Self Powered 3.3V Logic Drive
The FT230X can be powered from a single 3.3V supply. This feature is an alternative to having the
FT230X powered at 5V in standard self-powered configuration.
The 3.3V Self Powered configuration is illustrated in Figure 5.5. Note that the 3.3V input is connected to
VCC, VCCIO and 3V3OUT. (Note that Figure 5.5 is for illustration only and that the pins do not actually go
all the way through the PCB)
5.8 Configuring the MTP ROM
The FT230X contains an embedded MTP ROM. This can be used to configure the functions of each CBUS
pins, the current drive on each signal pin, current limit for the USB bus and the other descriptors of the
device. For details on using the MTP ROM/EEPROM programming utility FT_PROG, please see the
FT_PROG User Guide and the FT230X datasheet.
When programming the MTP ROM please note:
i) One of the CBUS Pins can be configured as PWREN# in the internal MTP ROM. This can be used to
switch the power supply to the external circuitry.
ii) The Max Bus Power setting of the MTP ROM should specify the maximum current to be drawn from
the USB host/hub when enumerated. For high-powered USB devices the current limit when
enumerated is between 100mA and 500mA, for low-powered USB devices the current limit is
100mA.
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Module Dimensions
6
2.54
28.32
7.62
12.2
2.4
7.6
30.1
2.2
L
-01 L = 5.6mm
-02 L = 4.6mm
Figure 6.1 – UMFT230XA Module Dimensions
All dimensions are given in millimetres.
The UMFT230XA module exclusively uses lead free components, and is fully compliant with European
Union directive 2002/95/EC.
7
IC Package Markings
1
FTDI
I
XXXXXXXXXX
12
FT230XQ
YYWW-D
5
8
The date code format is YYXX where XX = 2 digit week number, YY = 2 digit year number. This is
followed by the revision letter.
The code XXXXXXX is the manufacturing LOT code.
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UMFT230XA Module Circuit Schematic
Figure 8.1 – Module Circuit Schematic
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Internal MTPROM Configuration
Following a power-on reset or a USB reset the FT230X will scan its internal MTP ROM and read the USB
configuration descriptors stored there. The default values programmed into the internal MTP ROM in the
FT230XQ used on the UMFT230XA are shown in Table 8.1.
Parameter
Value
Notes
USB Vendor ID (VID)
0403h
FTDI default VID (hex)
USB Product UD (PID)
6015h
FTDI default PID (hex)
Serial Number Enabled?
Yes
Serial Number
See Note
A unique serial number is generated and programmed into
the ,TP ROM during final test of the module.
Pull down I/O Pins in USB
Suspend
Disabled
Enabling this option will make the device pull down on the
UART interface lines when the power is shut off (PWREN#
is high).
Manufacturer Name
FTDI
Product Description
UMFT230XA
Max Bus Power Current
Power Source
90mA
Bus Powered
Device Type
FT230X
USB Version
0200
Returns USB 2.0 device description to the host. Note: The
device is a USB 2.0 Full Speed device (12Mb/s) as opposed
to a USB 2.0 High Speed device (480Mb/s).
Remote Wake Up
Enabled
Taking RI# low will wake up the USB host controller from
suspend.
High Current I/Os
Disabled
Enables the high drive level on the UART and CBUS I/O
pins.
Load VCP Driver
Enabled
Makes the device load the CVP driver interface for the
device.
CBUS0
GPIO
CBUS1
GPIO
CBUS2
GPIO
CBUS3
GPIO
Invert UART
Disabled
Signal on this pin becomes TXD# if enable.
Table 9.1 – Default Internal MTP ROM Configuration
The internal MTP ROM in the FT230X can be programmed over USB using the utility program FT_PROG.
FT_PROG can be downloaded from the www.ftdichip.com. Users who do not have their own USB vendor
ID but who would like to use a unique Product ID in their design can apply to FTDI for a free block of
unique PIDs. Contact FTDI Support ([email protected]) for this service, also see TN_100 and
TN_101.
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Contact Information
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E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
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[email protected]
[email protected]
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http://ftdichip.com
Distributor and Sales Representatives
Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales
representative(s) in your country.
System and equipment manufacturers and designers are responsible to ensure that their systems, and any Future Technology Devices International Ltd
(FTDI) devices incorporated in their systems, meet all applicable safety, regulatory and system-level performance requirements. All application-related
information in this document (including application descriptions, suggested FTDI devices and other materials) is provided for reference only. While FTDI
has taken care to assure it is accurate, this information is subject to customer confirmation, and FTDI disclaims all liability for system designs and for any
applications assistance provided by FTDI. Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the user agrees to
defend, indemnify and hold harmless FTDI from any and all damages, claims, suits or expense resulting from such use. This document is subject to change
without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Neither the whole nor any part
of the information contained in, or the product described in this document, may be adapted or reproduced in any material or electronic form without the prior
written consent of the copyright holder. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow G41
1HH, United Kingdom. Scotland Registered Company Number: SC136640
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Appendix A – List of Figures and Tables
List of Figures
Figure 4.1 – Module Pin Out ........................................................................................................................... 4
Figure 5.1 – Bus Powered Configuration ...................................................................................................... 8
Figure 5.2 – Self-Powered Configuration ...................................................................................................... 9
Figure 5.3 – Bus Powered with Power Switching Configuration .............................................................. 10
Figure 5.4 – USB Bus Powered 3.3V Logic Drive ....................................................................................... 11
Figure 5.5 – USB Self Powered 3.3V Logic Drive ....................................................................................... 12
Figure 6.1 – UMFT230XA Module Dimensions ........................................................................................... 13
Figure 8.1 – Module Circuit Schematic ........................................................................................................ 14
List of Tables
Table 4.1 – Module Pin Out Description ........................................................................................................ 5
Table 4.2 – CBUS Signal Options ................................................................................................................... 6
Table 5.1 – Solder Links JP1 Pin Description ............................................................................................... 7
Table 5.2 – Solder Links JP2 Pin Description ............................................................................................... 7
Table 9.1 – Default Internal MTP ROM Configuration ................................................................................ 15
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UMFT230XA Datasheet
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Appendix B – Revision History
Document Title:
UMFT230XA
Document Reference No.:
FT_000519
Clearance No.:
FTDI# 269
Product Page:
http://www.ftdichip.com/FT-X.htm
Document Feedback:
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Version 1.0
Initial Datasheet Created
09/02/12
Version 1.1
Added links, referances to silicon revision, TID and logos.
13/06/12
Version 1.2
Added a section for package marking and changed TIDs.
29/01/13
Version 1.3
Added -02 details.
08/11/13
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