MB91590 series 32bit Microcontorller Datasheet Supplementary Information Note: This sheet shows a change trace of description in datasheet. All the changes between previous and current document edition are described in this sheet. Following "ID" is a number which is owned by every change. A change which is applied to other documents of same family should have a same ID. Summary Error Error Page Original document code: DS705-00010-4v0-E, Previous document code: DS705-00010-3v1-E Rev. 1.0 June 19, 2015 I2C timing 141 Hish Speed Mode*3 0.9*3 250 Correct Page Correct ID 141 Hish Speed Mode 0.9 250*3 #40 CAN PLL jitter 126 Fcp=80MHz(4MHz multiplied by 20) at the remark of CAN PLL jitter(during lock) 126 Delete #84 TEQFP package support 176 (Dimension of HQFP-208(FPT-208P-M04)(Under consideration)) 176 (LET208 208PIN ExposedPAD Low Profile Quad Flat Package) #375 Update the power supply current for Icc5 (MAX) in normal operation 124 Icc5:At normal operation FCP=128MHz, Fcpp=32MHz:-(Min), 80(Typ), 120(Max):mA:*4, *5 Icc5:At normal operation FCP=80MHz, Fcpp=40MHz:-(Min), 60(Typ), 100(Max):mA:*4, *5 124 Icc5:At normal operation FCP=128MHz, Fcpp=32MHz:-(Min), 80(Typ), 120(Max):mA:*4 Icc5:At normal operation FCP=128MHz, Fcpp=32MHz:-(Min), 80(Typ), 155(Max):mA:*5 Icc5:At normal operation FCP=80MHz, Fcpp=40MHz:-(Min), 60(Typ), 100(Max):mA:*4 Icc5:At normal operation FCP=80MHz, Fcpp=40MHz:-(Min), 60(Typ), 130(Max):mA:*5 #389 Update the power supply current for Iccs5 (MAX) in sleep mode 124 Iccs5:At sleep mode FCP=128MHz, Fcpp=32MHz:-(Min), 25(Typ), 65(Max):mA:*4, *5 124 Iccs5:At sleep mode FCP=128MHz, Fcpp=32MHz:-(Min), 25(Typ), 65(Max):mA:*4 Iccs5:At sleep mode FCP=128MHz, Fcpp=32MHz:-(Min), 25(Typ), 80(Max):mA:*5 Update the power supply current for ICCBS5 (MAX) in bus sleep mode 124 ICCBS5:At bus sleep mode FCP=128MHz,Fcpp=32MHz:-(Min), 124 15(Typ), 55(Max):mA:*4, *5 ICCBS5:At bus sleep mode FCP=128MHz,Fcpp=32MHz:-(Min), 15(Typ), 55(Max):mA:*4 ICCBS5:At bus sleep mode FCP=128MHz,Fcpp=32MHz:-(Min), 15(Typ), 70(Max):mA:*5 #391 Update the power supply current for Icc3 (MAX) in GDC normal operation 124 Icc3:When GDC normal operation FgdC=81MHz, FgdCIF=108MHz:-(Min), 200(Typ), 400(Max):mA:*5 124 Icc3:When GDC normal operation FgdC=81MHz, FgdC-IF=108MHz:-(Min), 100(Typ), 300(Max):mA:*5 Annotation for power supply current table 125 *5: MB91F59A/B (Under evaluation) 125 #390 #392 *5: MB91F59A/B #393 Publication Number MB91590_DS705-00010-4v0-E-SI Revision 1 Issue Date June 19, 2015 Supplementary Information Summary Update the power supply current for Icc5 (MAX) in Flash write/erase Update the power supply current for Icc3 (MAX) in GDC operation stop Error Page 124 124 Error Icc5:At FLASH write FCP=128MHz, Fcpp=32MHz:-(Min), 95(Typ), 135(Max):mA:*3, *4, *5 Icc5:At FLASH erase FCP=128MHz, Fcpp=32MHz:-(Min), 95(Typ), 135(Max):mA:*3, *4, *5 Correct Correct Page 124 Icc5:At FLASH write FCP=128MHz, Fcpp=32MHz:-(Min), 95(Typ), 135(Max):mA:*3, *4 Icc5:At FLASH write FCP=128MHz, Fcpp=32MHz:-(Min), 95(Typ), 165(Max):mA:*3, *5 Icc5:At FLASH erase FCP=128MHz, Fcpp=32MHz:-(Min), 95(Typ), 135(Max):mA:*3, *4 Icc5:At FLASH erase FCP=128MHz, Fcpp=32MHz:-(Min), 95(Typ), 165(Max):mA:*3, *5 Icc3:When GDC operation stop:-(Min), 2(Typ), 300(Max):mA:*5 124 June 19, 2015, MB91590_DS705-00010-4v0-E-SI1 ID #396 Icc3:When GDC operation stop:-(Min), 2(Typ), 155(Max):mA:*5 #397 2