transitioning from the cs8405a to the cs8406

AN229
Application Note
TRANSITIONING FROM THE CS8405A TO THE CS8406
by Sean Davis
1. Introduction
The CS8406 was designed as a pin and function compatible update for the CS8405A to add
192 kHz sample rate capability and offer over 1/3 less total power consumption than the
CS8405A. This document outlines the considerations that need to be accounted for when making the transition. Please refer to the latest revision of each part’s datasheet for a detailed
description of part operation.
2. Power Supply
The VD+ supply of the CS8405A operates only at 5.0 V ±10%, while the VD supply of the
CS8406 operates at either 3.3 V or 5.0 V ±5%. However, when the CS8406 is operated with
VD = 5.0 V, certain conditions apply:
 VIH (Min) for the CS8406 = 2.75 V. VIH (Min) for the CS8405A = 2.0 V.
 In power down mode, it is recommended that all inputs be driven low to minimize current
consumption.
3. Software Mode
Shown in Table 2 on page 2 is a list of pin numbers and their corresponding pin names for both
parts when operated in Software mode. The register settings for the CS8405A are compatible
with the CS8406.
4. Hardware Mode
Shown in Table 3 on page 3 is a list of pin numbers and their corresponding pin names for both
parts when operated in Hardware mode.
5. CS8406 Test Pins
The CS8406 has several pins labeled as TEST. These pins are unused inputs in either Software
or Hardware mode. It is recommended that these pins be tied to a supply (VL or GND) to minimize leakage current.
When transitioning from the CS8405A to the CS8406, some of the TEST pins on the CS8406
may be left floating due to corresponding pins on the CS8405A being labeled as no connects.
The CS8406 will operate the same if these pins are left floating, however current consumption
from VL will increase by 25 μA per pin that is left floating. As the CS8406 consumes much less
current than the CS8405A, this should not be a concern to the user.
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APRIL ‘09
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6. Output Resistance
The typical output resistance of the transmitter pins changed from the CS8405A to the CS8406.
The value of the external series resistor placed on the transmitter pins should be modified appropriately to account for this change. See the latest CS8406 datasheet for details on selecting the
value of the external resistor.
Parameter
VL = 3.3 V
TXP/TXN CS8405A Output Resistance
TXP/TXN CS8406 Output Resistance
VL = 5 V
Unit
40
26
Ω
33.5
26.5
Ω
Table 1. Transmitter Output Resistance
Pin Number CS8405A Pin Name CS8406 Pin Name Differences
1
SDA / CDOUT
SDA / CDOUT
CS8405A I2CTM is only supported at VL+ = 5.0 V.
CS8406 allows I2C operation at VL = 3.3 V or 5.0 V.
5
DGND2
TEST
See “CS8406 Test Pins” on page 1.
6
VD+
VD
See “Power Supply” on page 1.
7
DGND4
TEST
See “CS8406 Test Pins” on page 1.
8
DGND3
TEST
See “CS8406 Test Pins” on page 1.
10
NC1
TEST
See “CS8406 Test Pins” on page 1.
11
NC2
TEST
See “CS8406 Test Pins” on page 1.
16
NC3
TEST
See “CS8406 Test Pins” on page 1.
17
NC4
TEST
See “CS8406 Test Pins” on page 1.
18
NC5
TEST
See “CS8406 Test Pins” on page 1.
21
OMCK
OMCK
CS8405A OMCK clock ratios can be 256*Fs, 384*Fs,
or 512*Fs.
CS8406 OMCK clock ratios can be 128*Fs, 256*Fs,
384*Fs, or 512*Fs.
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VL+
VL
For both parts, the VL supply can operate at 3.3 V
or 5.0 V.
SCL / CCLK
CS8405A I2C is only supported at VL+ = 5.0 V.
CS8406 allows I2C operation at VL = 3.3 V or 5.0 V.
28
SCL / CCLK
Pins 2, 3, 4, 9, 12, 13, 14, 15, 19, 20, 22, 24, 25, 26, and 27 have the same functions on both parts.
Table 2. Software Mode Comparison
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Pin Number CS8405A Pin Name CS8406 Pin Name Differences
2
VL2+
TEST
See “CS8406 Test Pins” on page 1.
6
VD+
VD
See “Power Supply” on page 1.
7
DGND4
TEST
See “CS8406 Test Pins” on page 1.
8
DGND3
TEST
See “CS8406 Test Pins” on page 1.
HWCK0
Pins 20 and 27 set the OMCK clock ratio for the
CS8406. Setting both pins to VL (the recommended
setting from the CS8405A datasheet) or both pins to
GND will cause the clock ratio to be 256*Fs, the only
mode available for the CS8405A.
20
VL3+
21
OMCK
OMCK
CS8405A OMCK clock ratio is 256*Fs.
CS8406 OMCK clock ratios can be 128*Fs, 256*Fs, or
512*Fs, set by HWCK[0:1].
23
VL+
VL
For both parts, the VL supply can operate at 3.3 V
or 5.0 V.
HWCK1
Pins 20 and 27 set the OMCK clock ratio for the
CS8406. Setting both pins to VL (the recommended
setting from the CS8405A datasheet) or both pins to
GND will cause the clock ratio to be 256*Fs, the only
mode available for the CS8405A.
27
VL4+
Pins 1, 3, 4, 5, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 22, 24, 25, 26, and 28 have the same functions on both parts.
Table 3. Hardware Mode Comparison
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7. Revision History
Revision
Changes
REV1
Initial Release
REV2
Added “Output Resistance” on page 2
.
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to www.cirrus.com
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