CX20724 Ultra Low-Power HD Audio CODEC Data Sheet General Description Features Conexant's CX20724 is an ultra low-power, high performance High Definition (HD) audio Coder Decoder (CODEC) that supports ECR HDA048A mobile extensions, and is primarily targeted at the mobile PC market, including notebooks, ultrabooks, All-In-Ones (AIOs), and tablets. The CODEC is fully compliant with all industry specifications, including Universal Audio Architecture (UAA) and the latest Windows Hardware Certification Kit (WHCK). Host interface signaling levels of 1.5V, 1.8V, and 3.3V are selectable. • With two 24-bit stereo Digital-to-Analog Converters (DACs) operating at sampling frequencies up to 192kHz and two 24-bit stereo Analog-to-Digital Converters (ADCs) operating up to 96kHz, the CODEC supports multi-streaming and Real-Time Communication (RTC) applications. By combining these hardware features with Conexant's playback, voice, and speech pre-processing algorithms, this CODEC is the ideal solution for platforms needing Lync and Skype, general consumer applications, and gaming/multi-media enthusiasts. • • The CX20724 has an integrated stereo AudioSmart™ class-D with intelligent power delivery and dynamic signal loudness optimization. SpeakerShield technology provides industry-leading, load-based protection in realtime that includes Direct Current (DC) detection, shortcircuit, near-short, high temperature, and overtemperature. Integrated 14-band hardware Equalizer (EQ) and Dynamic Range Compression (DRC) optimizes speaker frequency response and loudness without distortion. The EQ can also be applied to the headphone and line out paths. A four-band hardware EQ is available on the microphone inputs. Additional unlimited bands of EQ and DRC are available in software. The CODEC includes a stereo capless headphone output and a headset with integrated detect and switch without an external Bill Of Materials (BOM). A universal jack supports all audio peripherals on one jack. A mono subwoofer output is available with tunable EQ, as well as line-in/microphone re-tasking. • • • • • • • • • • • • Host interface supports 1.5V, 1.8V, or 3.3V signaling levels Two pairs of DACs and ADCs have independent sampling rates up to: – 192kHz for DACs – 96kHz for ADCs 2.8WRMS per channel AudioSmart™ class-D with intelligent power delivery and dynamic signal loudness optimization Integrated seven bands per channel EQ and DRC SpeakerShield best industry advanced speaker protection Fully integrated headset support with detect/switch and a universal audio jack Four digital microphones for array applications Tunable microphone EQ Mono subwoofer output with a dedicated EQ Input/output re-tasking for docking applications Line-in for scalar board interfaces S/PDIF output supports rates up to 96kHz D3 Live allows external device playback through an internal speaker with full dynamics and protection while the system is asleep Bi-directional EAPD and GPIOs Supports analog and digital PC Beep System Compatibility • • • • • HD Audio Specification, Revision 1.0a including ECR HDA048A mobile extensions Windows XP/Vista/7/8.x/10 Microsoft Premium Logo Linux Android Up to four digital microphones can be connected. Multiple General Purpose Input/Outputs (GPIOs) are available, as well as a bi-directional External Amplifier Power-Down (EAPD). The CODEC also includes a Sony/Philips Digital Interface Format (S/PDIF) output. 05/26/15 Conexant Confidential • www.conexant.com 010-24DSR03 CX20724 Data Sheet Revision History Revision History Document No. Release Date Change Description 010-24DSR03 05/26/15 Updated: • • • • • • 010-24DSR02 11/17/14 "System Compatibility." "Introduction." "CX20724 Audio CODEC Features." "CX20724 Block Diagram" figure. "Analog Performance" table. "Power Consumption" table. Updated: • • • • • • • "Features." "Introduction." "CX20724 Audio CODEC Features." "Pin Assignments" table. "Device Performance Specifications." "Power Consumption" table. "Node 0 Responses" table. 010-24DSR01 09/15/14 Updated "Features.". 010-24DSR00 09/05/14 Initial release. Conexant Confidential 05/26/15 010-24DSR03 ii CX20724 Data Sheet Table of Contents Table of Contents General Description.......................................................................................................................................................i Features..........................................................................................................................................................................i System Compatibility ....................................................................................................................................................i Revision History ...........................................................................................................................................................ii Introduction...................................................................................................................................................................1 CX20724 Audio CODEC Features................................................................................................................................2 Hardware Interface .......................................................................................................................................................5 General ................................................................................................................................................................................. 5 Host Interface ............................................................................................................................................................. 5 Audio Ports ................................................................................................................................................................. 5 Block Diagram...................................................................................................................................................................... 6 Pin Information .................................................................................................................................................................... 7 Pin Configuration ........................................................................................................................................................ 7 Pin Assignments ......................................................................................................................................................... 8 Device Performance Specifications................................................................................................................................. 10 Power Consumption.......................................................................................................................................................... 12 Package Dimensions..................................................................................................................................................13 HD Audio Interface......................................................................................................................................................14 Overview............................................................................................................................................................................. 14 Intel ECR HDA048A Support............................................................................................................................................. 15 Verbs................................................................................................................................................................................... 15 Node ID 00: Root Node ............................................................................................................................................ 16 Node ID 01: Audio Function Group (AFG)................................................................................................................ 17 Nodes 10, 11: DAC 1, 2 Widgets.............................................................................................................................. 19 Node 12: PC Beep Generator Widget ...................................................................................................................... 20 Node ID 13: ADC1 Widget........................................................................................................................................ 21 Node ID 14: ADC2 Widget........................................................................................................................................ 23 Node ID 15: Mixer Widget......................................................................................................................................... 24 Node ID 16: Port A/Vendor Widget........................................................................................................................... 25 Node ID 17: Port G BTL Pin Widget ......................................................................................................................... 26 Node ID 18: Port B Widget ....................................................................................................................................... 27 Node ID 19: Port D Widget ....................................................................................................................................... 29 Conexant Confidential 05/26/15 010-24DSR03 iii CX20724 Data Sheet Table of Contents Node ID 1A: Port C Widget....................................................................................................................................... 30 Node ID 1F: Port H Widget ....................................................................................................................................... 31 Node ID 1D: Port E Line-Out/Line-In/MIC-In ............................................................................................................ 32 Node ID 1E: Port F Widget ....................................................................................................................................... 34 Node ID 20: DAC 3—Sony/Philips Digital Interface Format (S/PDIF) Output Widget .............................................. 35 Node ID 21: Port I S/PDIF Output Widget ................................................................................................................ 36 Node 22: Port M Widget ........................................................................................................................................... 37 Node 1B: Vendor-Specific Widget ............................................................................................................................ 38 Node 1C: Vendor-Specific Widget ............................................................................................................................ 38 Unsolicited Messages ....................................................................................................................................................... 38 Audio Unsolicited Messages..................................................................................................................................... 38 Ordering Information..................................................................................................................................................39 Conexant Confidential 05/26/15 010-24DSR03 iv CX20724 Data Sheet List of Figures List of Figures Figure 1: CX20724 Block Diagram ................................................................................................................................................... 6 Figure 2: CX20724 Pin Configuration ............................................................................................................................................... 7 Figure 3: Package Diagram ............................................................................................................................................................ 13 Conexant Confidential 05/26/15 010-24DSR03 V CX20724 Data Sheet List of Tables List of Tables Table 1: Pin Assignments ................................................................................................................................................................. 8 Table 2: Analog Performance ......................................................................................................................................................... 10 Table 3: Power Consumption.......................................................................................................................................................... 12 Table 4: Node 0 Responses ........................................................................................................................................................... 16 Table 5: Node 01 Responses ......................................................................................................................................................... 17 Table 6: Node 10 and 11 Responses ............................................................................................................................................. 19 Table 7: PC Beep Generator Responses ....................................................................................................................................... 20 Table 8: Node ID 13 Responses..................................................................................................................................................... 21 Table 9: Node ID 14 Responses..................................................................................................................................................... 23 Table 10: Node ID 15 Responses................................................................................................................................................... 24 Table 11: Node ID 16 Responses................................................................................................................................................... 25 Table 12: Node ID 17 Responses................................................................................................................................................... 26 Table 13: Node ID 18 Responses................................................................................................................................................... 27 Table 14: Node ID 19 Responses................................................................................................................................................... 29 Table 15: Node ID 1A Responses .................................................................................................................................................. 30 Table 16: Node ID 1F Responses................................................................................................................................................... 31 Table 17: Node ID 1D Responses .................................................................................................................................................. 32 Table 18: Node ID 1F Responses................................................................................................................................................... 34 Table 19: Node ID 20 Responses................................................................................................................................................... 35 Table 20: Node ID 21 Responses................................................................................................................................................... 36 Table 21: Node ID 1D Responses .................................................................................................................................................. 37 Table 22: Audio Unsolicited Messages........................................................................................................................................... 38 Table 23: Ordering Information....................................................................................................................................................... 39 Conexant Confidential 05/26/15 010-24DSR03 VI CX20724 Data Sheet Introduction Introduction Conexant's CX20724 is an ultra low-power, high performance audio CODEC that supports ECR HDA048A mobile extensions and is primarily targeted at the mobile PC market, including notebooks, ultrabooks, AIOs, and tablets. The host interface signaling levels of 1.5V, 1.8V, and 3.3V are selectable. The CX20724 has audio fidelity that exceeds Microsoft desktop and notebook premium logo requirements, including Windows 8 and Windows 8.1. With two 24-bit stereo DACs operating at sampling frequencies up to 192kHz and two 24-bit stereo ADCs operating up to 96kHz, the CODEC supports multi-streaming and RTC applications. By combining these hardware features with Conexant's playback, voice, and speech pre-processing algorithms, this CODEC is the ideal solution for Enterprise platforms needing Lync and Skype, general consumer applications, and gaming/multi-media enthusiasts. The CX20724 has an integrated stereo AudioSmart™ class-D intelligent power delivery and dynamic signal loudness optimization that is capable of driving up to 2.8WRMS per channel into 4 loads. SpeakerShield technology provides industry-leading, load-based protection in real-time that includes DC detection, short-circuit, near-short, high temperature, and over-temperature. Integrated 14-band hardware EQ and DRC optimizes speaker response and loudness without distortion to enable a high-quality audio experience on integrated speakers that are independent of a driver and an Operating System (OS). The EQ can also be applied to the headphone and line out paths. A four-band hardware EQ is available on the microphone inputs. Additional unlimited bands of EQ and DRC are available in software. ProCoustic capless headphone driver produces a full-range frequency response, and eliminates Alternating Current (AC) coupling capacitors. Integrated headset support with auto-detect and auto-switch between Apple and Nokia-style headsets eliminates all external BOM. In-line headset button sensing enables control of third-party applications directly from the headset, or simply allows the user to wake the system from the headset. A single universal jack supports headsets, headphones, external microphones, and line-in devices. A re-tasking line-in/Mic/line-out port can be used for multi-function jacks, analog dock interfaces, and connection to speaker amplifiers for higher power and for multi-speaker systems. The line-in offers a HighDefinition Multimedia Interface (HDMI) scalar board interface for AIO applications. A bi-directional EAPD allows external amplifier power control in addition to Embedded Controller (EC)/chipset control of the CODEC class-D and HP amplifiers without adding an external BOM or system design complexity. A mono subwoofer output includes a two-band programmable band-pass filter for best speaker matching which can be bypassed to drive full frequency into the subwoofer, if needed. The D3-Live mode enables external audio devices to play through an input or a universal jack to the internal speakers with full speaker EQ/ DRC, while in system is in connected standby, low power, and sleep modes. Up to four digital microphones can be connected with integrated boost and DC offset removal. Together with Conexant's AudioSmart voice and speech input processing technologies, the CODEC supports all convertible, detachable, and tablet microphone configurations, including recording for two-user facing and two-world facing, and one-world or two-world facing for environment noise removal. Each stereo pair has its own programmable clock output that can be individually enabled, and can be programmed for low frequency modes to minimize power consumption. Multiple GPIOs as well as an S/PDIF output are available that support sample rates up to 96kHz. Conexant's PopShield technology eliminates pops and clicks during all transition states. This technology includes active DC offset removal ground calibration and innovative Vref ramping schemes to avoid pops on AC-coupled paths. The CX20724 has D-Flex power management that exceeds industry power requirements, and consumes minimum power during a connected standby and all low-power system states without pops or clicks. In its non-active lowest power state, the CODEC consumes 300μW. Less than 27mW headphone playback power consumption into 32 loads ensures maximum system battery life. The headset center button and jack plug-in wake-up events are supported. Conexant Confidential 05/26/15 010-24DSR03 1 CX20724 Data Sheet CX20724 Audio CODEC Features Conexant offers comprehensive audio software driver support, with both in-house and third-party software APOs, including Andrea Electronics, Creative Labs, Dolby, DTS, Sonic Focus, MaxxAudio, Waves, and more. Conexant’s AudioSmart voice and speech processing algorithm suite ensures clear voice communication and speech command and control in noisy environments. The Smart Source Pickup (SSP) does not rely on beam-forming techniques, and provides an easy to use powerful solution that requires few or no user controls. The SSP passes the latest Intel ASR certification and Cortana in portrait and landscape modes with just two microphones, and is available for Windows, Linux, and Android. AudioSmart also offers keystroke, screen tapping, and fan noise suppression. CX20724 Audio CODEC Features • • • • • • • • Two pairs of independent DACs and ADCs have independent sampling rates up to: – 192kHz for DACs – 96kHz for ADCs 2.8WRMS per channel stereo class-D with spread spectrum and common mode scrambling to reduce Electro-Magnetic Interference (EMI) AudioSmart™ class-D intelligent power delivery and dynamic signal loudness optimization maximizes even small speaker Sound Pressure Level (SPL) and ensures no speaker damage EQ and DRC: – Integrated 14-band hardware programmable EQ ensures optimal speaker frequency response – DRC maximizes loudness while preventing distortion – EQ can be applied to headphone and line-out paths – Four-band microphone EQ – Two-band EQ on the subwoofer output – Additional unlimited bands of EQ and DRC are available in the software SpeakerShield technology provides real-time, load-based class-D speaker protection that is independent of driver and application—programmable by Basic Input/Output System (BIOS) and includes: – Programmable High-Pass Filter (HPF) protects speakers against damage from high energy, low frequency content – DC protection detects DC voltage across the speakers and prevents damage by immediately shutting down the class-D amplifier – Short circuit protects against straight shorts to ground that can happen during manufacturing – When near-shorts are detected, the amplifier gain adjusts to auto recover and shuts it down if the problem persists – Very high temperature conditions immediately shut off the amplifier – High temperature throttles down the class-D gain to auto recover, or shuts it down if the problem persists – Class-D voltage supplies, presence, and accuracy of DAC and class-D clocks are carefully monitored A stereo ProCoustic capless headphone driver delivers more than 20mW into 32 loads with no pops, and eliminates the BOM cost and space of external headphone amplifiers and DC-blocking capacitors Built-in, four-conductor headset jack supports headphone/headset auto-detection, as well as autoswitching between Apple and Nokia-style headsets without any external components Headset in-line command sensing is supported for system wake or application control from a headset button; jack plug event wake-up also supported Conexant Confidential 05/26/15 010-24DSR03 2 CX20724 Data Sheet • • • • • • • • • • • • • • • • • • • • • • • CX20724 Audio CODEC Features Eliminates external powered speaker hum noise while the system is off—a fully integrated feature that requires no external components Universal audio jack supports all headsets, headphones, external microphones, and external line-in devices on one jack A mono subwoofer output includes a two-band programmable band-pass filter that can be bypassed to drive full frequency into the subwoofer—works with the class driver Input/Output (I/O) re-tasking port enables multi-function jacks, analog dock interfacing, and external amplifiers for higher powered speakers and systems with more than two internal speakers A line input provides an interface for HDMI scalar boards and analog docks Digital Microphone Interface (DMIC) with DC offset removal and programmable boost supports up to four digital microphone elements. Two fully synchronous programmable clock outputs are available to control the DMIC in stereo pairs or all together. Low clock frequencies are available for low-power operation of DMIC modules. The DMIC interface signaling can run at 1.8V or 3.3V. S/PDIF output supports rates up to 96kHz Record security prevents unwanted recordings from all or selected input ports Two-band microphone EQ helps hardware compensation for Skype and Lync certification—additional EQ bands are available in software Integrated headphone limiter supports GS Mark EN50332-2 without an external BOM—selectable through BIOS or a driver/GUI Supports analog and digital PC Beep—Wake-on-Beep never misses a beep, even when in low-power mode Multiple GPIOs are available for custom applications, and can be selected for 1.8V or 3.3V signaling levels Bi-directional EAPD supports external amplifier control for power savings as well as integrated HP and class-D amplifier shutdown/mute on a single pin—avoids external BOM cost and design complexity Integrated Low Drop-Outs (LDOs) provide on-chip clean rails and clean Microphone Bias (micbias) Supports 1.5V, 1.8V, and 3.3V host interface signaling levels Pop Shield II enhanced pop and click suppression on all ports Jack sense detects jack plug events An integrated digital mixer is used to record what is playing pre-EQ, so recorded audio sounds great on all devices and peripherals D3 Live allows external audio devices to play to the internal speakers, with full hardware EQ and DRC while the system is asleep or in low power modes—use your notebook as a speaker dock CODEC consumes less than 300μW in it lowest power state Supports ultra-low power headphone playback into 32 of less than 27mW Compliant with Intel's High Definition Audio Specification, Revision 1.0a and mobile HD audio extensions in ECR HDA048A Available in a 50-pin, thermally-enhanced QFN package Conexant Confidential 05/26/15 010-24DSR03 3 CX20724 Data Sheet • • • • • • • • CX20724 Audio CODEC Features AudioSmart speech/voice pre-processing algorithms are available from Conexant, including: – End-to-end noise reduction – True stereo Acoustic Echo Canceler (AEC) – SSP solves common, real-world problems, and works much better than traditional beam-forming noise reduction approaches—works in all orientations (portrait, landscape, LCD panel flat on a table) with stereo microphone only and without user control changes – Best-in-class keystroke suppression, tap suppression, and fan noise suppression solutions – SSP optimizes hit rates for speech recognition applications like Nuance—solution ensures near flawless hit rates while other processing like keystroke suppression and VOIP enhancements remain enabled simultaneously – Far Field Pickup enables far field speakerphone and multi-speaker group conference call applications 10-band graphic EQ: – Provides additional, user-controlled, enhancements and pre-sets – Night mode boosts vocal clarity while maintaining background sound quality Multi-band dynamic EQ (multi-band DRC) improves the sound quality of low-cost speakers and prevents speaker rattle and distortion—allows different threshold tuning on different frequency bands Phantom bass psycho-acoustic technology creates virtual bass content on mainstream speakers 3D: – Expander widens the audio stage for a fuller and richer sound – Headphones recreates a surround sound, speaker-like environment in headphones so users can enjoy a richer and fuller music listening experience SmartAudio GUI—advanced audio control panel Audio director for classic and multi-stream selections Third-party software support includes, but is not limited to: – Creative Labs – Dolby – DTS, Inc. – ForteMedia – Andrea Electronics – Waves Conexant Confidential 05/26/15 010-24DSR03 4 CX20724 Data Sheet Hardware Interface Hardware Interface General Host Interface The host interface supports HD audio and mobile extensions in ECR HDA048A and uses the following common set of signals: • • • • • Bit clock (BIT_CLK), input Frame sync (SYNC), input Serial data output (SDATA_OUT), input Serial data input (SDATA_IN), input/output Bus reset (RESET#)/Master clock (MCLK), input Audio Ports The following lists the supported audio interface signals: • • • • • • • • • • • Port A (PORTA_L and PORTA_R), capless headphone output/line output, headset Port B (PORTB_L and PORTB_R), microphone input/line input with micbias Port C (DMIC_CLK, DMIC_DATA), stereo digital microphone input Port D (PortD_A, PortD_B), analog headset mono microphone input (supports Apple/Nokia-style headset auto-detection and auto-switching with no BOM) Port E (PORTE_L, PORTE_R), stereo Line output, re-taskable as microphone or line-in Port F (PORTF_L, PORTF_R)l stereo line input Port G (Left+ and Right+), class-D speaker amplifier output, stereo/mono selectable Port H (DMIC_CLK, DMIC_DATA), stereo digital microphone input Port I, S/PDIF output Port M, mono analog output for subwoofer PC speaker beep pass-through (PC_BEEP), input Conexant Confidential 05/26/15 010-24DSR03 5 CX20724 Data Sheet Block Diagram Block Diagram The following figure shows the CX20724 block diagram. HD Audio Interface EAPD/#SPKMUTE #SPKMUTE/GPIO Reset# Music REQ/GPIO Port B Micbias BIT_CLK Port E Micbias SYNC 14 ADC SDO Line-In/MIC Boost 18 SDI Boost Micbias D 2.2K Jack Port B 19 MIC-In Port D Headphone Ground 1 Headphone Ground 2 Beep DAC1 13 Ȉ DAC2 Line-Out Line-In/MIC Boost 1D ADC PC Beep Jack Port E Boost 1E Line-In Jack Port F Port C 1A Port H 1F Boost Digital Mic Boost Digital Mic DATA1 CLOCK1 Internal DATA2/GPIO1 CLOCK2 15 1B 12 Beep 1C 22 Ȉ HP/BP Mono Out Ȉ Port M EQ/ DRC/ HPF 11 16 DAC Ȉ HP Line-Out Jack Port A EQ/ DRC/ HPF 17 10 Ȉ DAC CLASS_D Amp Internal Port G Sense A (Port A, B, E, F) Jack 20 21 DAC S/PDIF/GPIO Port I Figure 1: CX20724 Block Diagram Conexant Confidential 05/26/15 010-24DSR03 6 CX20724 Data Sheet Pin Information Pin Information Pin Configuration The following figure shows the CX20724 pin configuration. Figure 2: CX20724 Pin Configuration Conexant Confidential 05/26/15 010-24DSR03 7 CX20724 Data Sheet Pin Information Pin Assignments The following table lists the CX20724 pin assignments. Table 1: Pin Assignments Pad Number Signal Name 1 SDO. HD audio bus serial data input to the CODEC. 2 HDA Bus RESET. HD audio bus master hardware reset. 3 VDDIO—1.5V/1.8V/3.3V, ±5%. Sets the host interface signaling level. Connect to the same power supply as the host bus controller. 4 TEST1. Test mode pin. All designs must pull this pin high. Refer to the reference schematic for details. 5 TEST2. Test mode pin. All designs must pull this pin high. Refer to the reference schematic for details. 6 MUSIC_REQ/SPDIF/GPIO0. Multi-function pin. Pad Number Signal Name 26 PORTA_RIGHT. Capless headphone output, right channel. 27 PORTM. Mono subwoofer output. 28 PORTE_LEFT. Line-in/line-out/microphonein, left channel. 29 PORTE_RIGHT. Line-in/line-out/ microphone-in, right channel. 30 HGNDA. Microphone: • Ground terminal for CTIA-style headsets. • Bias for Open Mobile Terminal Platform (OMTP) style headsets. HGNDB. Microphone: • Ground terminal for OMTP-style headsets. • Bias for CTIA-style headsets. 31 MUSIC_REQ. Pull high by the external controller to enable D3 Live Mode. SPDIF. S/PDIF output. 7 GPIO0. GPIO. SPKR_ MUTE#/GPIO1. Multi-function pin. 32 VREF_DAC. Analog Ground (AGND) reference—connect directly to AGND. 33 VREFP (Analog Reference). AGND reference—connect to AGND through a capacitor (typically 1μF). 34 AVDD5. 5V ±10%. LDO voltage supply input to the CODEC. 35 PORTD_A. • Headset microphone input. • Mono microphone input for CTIA style headsets. SPKR_MUTE. When pulled low, holds class-D on mute. Instead, Conexant recommends using a bi-directional EAPD pin. 8 GPIO1. GPIO. PORTC, DMIC DATA 1/GPIO3. Multifunction pin. DMIC DATA 1. An input to the CODEC—the digital MIC data from one or two DMICs. 9 10 GPIO3. GPIO. DVDD_IO. Sets the: • Digital I/O level. Connect to 1.8V/3.3V, ±5%. • Signaling level for the DMIC, S/PDIF, EAPD, and GPIO. PORTC, DMIC_CLK 1/GPIO2. Multifunction pin. DMIC_CLK 1. Output from the CODEC—the digital MIC clock. GPIO2. GPIO. Conexant Confidential 05/26/15 010-24DSR03 8 CX20724 Data Sheet Pin Information Pad Number Signal Name 11 Bi-directional EAPD. Bi-directional pin, Refer to the reference schematics for details. Output. Controls the external amplifiers’ power up/down per the HD Audio Specification. 12 Input. Can be driven by EC or such to mute class-D and headphones. PORTH, DMIC_CLK 2/GPIO4. Multifunction pin. Pad Number Signal Name 36 PORTD_B. • Headset microphone input. • Mono microphone input for OMTP style headsets. 37 MICBIAS_E. Programmable micbias output for port E. 38 MICBIAS_B. Programmable micbias output for port B. 39 PORTB_L. Microphone/line-in port, left channel. PORTB_R. Microphone/line-in port, right channel. DMIC_CLK 2. Output from the CODEC—the digital MIC clock for second pair of DMICs. 13 GPIO4: GPIO. PORTH, DMIC DATA 2/GPIO5. Multifunction pin. DMIC DATA 2. Input to the CODEC—the digital MIC data from third and fourth DMICs. 14 15 16 17 18 GPIO5. GPIO. PORTG, Class D LEFT +. Class-D amplifier output, left channel, positive. PVDD5 LEFT, 5V ±10%. Class-D left power supply voltage. Connect to PVDD5 RIGHT, and connect both to system 5V. PORTG, Class D LEFT -. Class-D amplifier output, left channel, negative. PORTG, Class D RIGHT -. Class-D amplifier output, right channel, negative. PVDD5 RIGHT, +5V ±10%. Connect to PVDD5 LEFT, and connect both to system 5V. 40 41 PORTF_L. Line-in port, left channel. 42 PORTF_R. Line-in port, right channel. 43 JSENSE. Jack sense input. Connect to the resistor network per the HD Audio Specification. Refer to the reference schematic for details. PC BEEP. PC speaker beep input. Needs to be AC-coupled using a 0.1μF capacitor. Maximum input level is 1.8V. Use external attenuator if using a 3.3V signal to drive this pin. LDO_AVDD. 1.8V to 1.6V LDO output. Connect to AGND through a capacitor. VDD18. 1.8V ±5%. Analog supply voltage input to the CODEC. 19 PORTG, Class D RIGHT +. Class-D amplifier output, right channel, positive. 44 20 CP_AVDD18, 1.8V, ±5%. Charge pump supply input. FLY_P, Flying Capacitor. Charge pump positive transfer charge—connect to FLY_N through a 2.2mF capacitor. FLY_N, Flying Capacitor. Charge pump negative transfer charge—connect to FLY_P through a 2.2mF capacitor. CP_VNEG. Charge pump negative rail output—connect to digital ground through a 2.2μF capacitor. CP_VPOS. Charge pump positive rail output—connect to digital ground through a 2.2μF capacitor. PORTA_L. Capless headphone output, left channel. 45 21 22 23 24 25 46 47 LDO_VDD_CORE, 1.2V LDO output. Connect to digital GND through a capacitor. 48 BCLK. HD audio bus bit clock input to the CODEC. 49 SYNC. HD audio bus SYNC input to the CODEC. 50 SDI. HD audio bus serial data output from the CODEC. Conexant Confidential 05/26/15 010-24DSR03 9 CX20724 Data Sheet Device Performance Specifications Device Performance Specifications The following table details the analog performance. Table 2: Analog Performance Device Type Requirement Minimum Typical Maximum Frequency Range at 48kHz and Above THD+N @ –3dBFS - 90dBFS - [20Hz, 20kHz] Dynamic Range with Signal Present - 104dBFS Awt - [20Hz, 20kHz] - • ±0.25dB ripple (0.5dB [20Hz, 20kHz] peak-to-peak delta) 1dB at upper band edge 3dB at lower band edge Magnitude Response - • • Analog Line Output Jack Sampling Frequency Accuracy - - 0.02% - Line Output Crosstalk - 83dB - [20Hz, 15kHz] Full-scale Output Voltage - 1VRMS - - Noise Level During System Activity 95dBFS Awt - - - Inter-channel Phase Delay - - 30 degrees or 12.5μs, whichever is greater. [20Hz, 20kHz] THD+N @ –3dBFS (1W 4) - 78dB - [20Hz, 20kHz] Dynamic Range with Signal Present - 98dBFS Awt - [20Hz, 20kHz] - • ±0.25dB ripple (0.5dB [20Hz, 20kHz] peak-to-peak delta) 1dB at upper band edge 3dB at lower band edge Magnitude Response - Speaker Amplifier • • Sampling Frequency Accuracy - - 0.02% - Crosstalk - 86dB - [20Hz, 15kHz] Noise Level During System Activity 90dBFS Awt - - - Inter-channel Phase Delay - 30 degrees or 12.5μs, whichever is greater. [20Hz, 20kHz] - Conexant Confidential 05/26/15 010-24DSR03 10 CX20724 Data Sheet Device Performance Specifications Table 2: Analog Performance (Continued) Device Type Requirement Minimum Typical Maximum Frequency Range at 48kHz and Above THD+N @ –3dBFS/ 10k - 78dBFS - [100Hz, 20kHz] THD+N @ –3dBFS/ 32 - 91dBFS - [100Hz, 20kHz] THD+N @ –3dBFS/ 16 - 79dBFS - [100Hz, 20kHz] Dynamic Range with Signal Present, All Loads - 103dBFS Awt - [100Hz, 20kHz] - • ±0.25dB ripple (0.5dB [100Hz, 20kHz] peak-to-peak delta) 1dB at upper band edge 3dB at lower band edge Magnitude Response - Analog Headphone Out Jack • • Sampling Frequency Accuracy - - 0.02% - Headphone Output Crosstalk (at Jack) - 89dB - [100Hz, 15kHz] Full-scale Output Voltage, 10k Load - 1VRMS - (3) Full-scale Output Voltage, 32 Load - 820mVRMS - - Noise Level During 95dBFS Awt System Activity 300 - - Noise Level During System Activity 32 85dBFS Awt - - - Inter-channel Phase Delay - - 30 degrees or 12.5μs, whichever is greater. [100Hz, 20kHz] THD+N @ –3dBFS - 91dBFS - [20Hz, 20kHz] Dynamic Range with Signal Present - 99dBFS Awt - [20Hz, 20kHz] - • [20Hz, 20kHz] <= ±0.25dB ripple (0.5dB peak-to-peak delta) 1dB at upper band edge 3dB at lower band edge Magnitude Response Analog Line-In Jack • • Sampling Frequency Accuracy - - 0.02% - Full-scale Input Voltage 0.707VRMS - - - Conexant Confidential 05/26/15 010-24DSR03 11 CX20724 Data Sheet Power Consumption Table 2: Analog Performance (Continued) Device Type Requirement Minimum Typical Maximum Frequency Range at 48kHz and Above THD+N @ –3dBFS - 91dBFS - [100Hz, 20kHz] Dynamic Range with Signal Present - 99dBFS Awt - [100Hz, 20kHz] - • [100Hz, 20kHz] <= ±0.25dB ripple (0.5dB peak-to-peak delta) 1dB at upper band edge 3dB at lower band edge Magnitude Response Analog Microphone-In Jack • • Sampling Frequency Accuracy - - 0.02% - Full-scale Input Voltage (0dB Boost) 0.707VRMS - - - Power Consumption The following table lists the power consumption for the device. Table 3: Power Consumption Mode Power Non Active, Lowest Power State 300μW Headphone Playback into 32 Load (1mW) 27mW Conexant Confidential 05/26/15 010-24DSR03 12 CX20724 Data Sheet Package Dimensions Package Dimensions The following figure provides the CX20724 package diagram. Figure 3: Package Diagram Conexant Confidential 05/26/15 010-24DSR03 13 CX20724 Data Sheet HD Audio Interface HD Audio Interface Overview The CX20724 host interface supports Intel's High Definition Audio Specification, Revision 1.0a. The HD audio interface is a five-pin interface: • • • • • Clock (BIT_CLK) Serial data in (SDATA_IN) Serial data out (SDATA_OUT) SYNC RESET# The clock is provided by the controller at a frequency of 24MHz. Because the SDATA_OUT signal is provided by the controller and contains data for every edge of the 24MHz clock, the CX20724 must sample data on both rising and falling edges of SDATA_OUT. The SYNC signal not only signals the beginning of the 500 clock frame, it designates the beginning of the data for each stream and indicates which stream of data is to be on SDATA_OUT next (streams do not need to appear in order; the controller may do as it likes). Channels are another way of organizing the serial data. Each stream has at least one channel. Each stream must start with channel 0 and proceed without interruption until all the assigned channels are exhausted. Because a stereo pair takes two adjacent channels, if: • • DAC1 is in stereo mode and assigned to channel 0, then the left data will be on channel 0 and the right on channel 1 DAC2 is in stereo mode and assigned to channel 2 (and the same stream as DAC1), then the left data will be on channel 2 and the right on channel 3 The SDATA_IN signal contains the CX20724 data headed towards the controller, and is only generated on rising edges. This includes information read from the HD audio registers, ADC, and incoming modem data. The stream and channel are indicated before the data is transmitted on SDATA_IN (refer to Intel’s HD Audio Specification 1.0a for the format). The SDATA_IN signal is responsible for knowing the device number, which is the CODEC Address (CAd) in Intel’s HD Audio Specification 1.0a. During the last clock of the first sync after a Power-on Reset (PoR), the SDATA_IN is driven high by the CX20724 for one clock cycle. This indicates to the controller the need for a CAd. The CX20724 then stops driving the SDATA_IN signal, and the controller begins to drive it. The controller drives SDATA_IN high through the next sync, and the CAd is assigned by the number of clocks after the fall of sync that it takes for the SDATA_IN to fall. The interface then turns around again, and SDATA_IN is an output from the CX20724 until reset. Intel’s HD Audio Specification 1.0a also contains one other concept of an unsolicited message. Unsolicited messages can occur for a number of reasons, such as timers, ringing phones, answers from the device to a register read, etc. Because the bus has no interrupt, these reasons are taken care of in unsolicited messages. If the controller was not addressing the CAd assigned to the CX20724 during the previous frame and if one of these unsolicited messages is needed (and enabled), the CX20724 uses the first cycles after the sync on SDATA_IN to alert the controller to the event. Only one event can be signaled in a frame. The CX20724 only sends the message once, and does not expect any sort of acknowledgment from the controller. Refer to Intel's High Definition Audio Specification, Revision 1.0a for details on link interface signaling and protocols. Conexant Confidential 05/26/15 010-24DSR03 14 CX20724 Data Sheet Intel ECR HDA048A Support Intel ECR HDA048A Support The CX20724 CODEC also supports Intel’s HD audio mobile extensions in ECR HDA048A. These new power savings extensions to Intel's High Definition Audio Specification are fully backward-compatible with HD audio 1.0a. The CODECs that only support the HD Audio Specification 1.0a work with host chipsets that support ECR HDA048A. Similarly, the CODECs that support ECR HDA048A work with the host chipsets that only support the HD Audio Specification 1.0a. Under ECR HDA048A the HD audio architecture is designed to support static clock frequency switching. This is an optional feature that helps to save power when the audio subsystem is configured for lower bandwidth operations when it is feasible to run a slower BCLK. In addition to supporting the mandatory default 24MHz BCLK, HD audio controllers and CODECs may optionally support a set of lower operating frequencies (i.e., 6MHz and 12MHz). The CX20724 supports these rates. Verbs This section describes how this device interacts with the verbs defined in Intel’s HD Audio Specification 1.0a. Each of the following subsections describe the verb IDs, parameters/payload, and corresponding responses that apply to that node. Verbs are commands and queries that are passed from the HD audio controller to the CODECs on the HD audio bus. Responses are data passed from the HD audio CODEC to the HD audio controller. All controller verbs must be followed by a CODEC response. Unsolicited responses from the CODEC are data transmitted without a controller verb request. A 1 in the: • • Valid bit position indicates the Response field contains a valid response. UnSol bit position is meaningful only when the Valid bit is set, and indicates that the response is unsolicited rather than in reply to a verb. The 32 actual response bits vary in format and are each documented in Intel’s HD Audio Specification 1.0a. Note: For more information regarding the verbs, controller, CODEC commands, and control protocol, refer to Intel’s HD Audio Specification 1.0a document. Each node in the CODEC is addressed using a CAd that is assigned to the CODEC during initialization, and the Node's ID (NID). The concatenation of the CAd and NID provide a unique address that allows commands to reference a specific node within the audio subsystem. The entire verb is formed by pre-pending the CAd and the NID to the verb ID and parameter/payload. In this section’s tables and descriptions, the CAd and NID are not listed as part of the verb. Register values may have up to five letters included with their default value. These letters indicate which of the possible reset events force the register to its default value. The five letters are as follows: • • • • • P = POR R = HD audio reset pin assertion V = Single verb reset W = Double verb reset D = D-state change reset Only the letters in the list force the register to its default value. Conexant Confidential 05/26/15 010-24DSR03 15 CX20724 Data Sheet Verbs Node ID 00: Root Node Table 4 defines a root note that has one Audio Function Group (AFG). This device is compliant with and follows the guidelines given in Intel's High Definition Audio Specification, Revision 1.0a and the Windows Logo Program (WLP) device requirements for Windows 7 and Windows 8. Table 4: Node 0 Responses Description Verb ID Parameter Response Default Value Comments Vendor ans Device ID F00h 00h - • • • Revision ID F00h 02h - Revision. 14F1xxxxh Vendor ID = 14F1h Device ID = 50F4h for CX20724 Device ID = 50F3h for CX21724 Note: This field increments with silicon stepping. Subordinate Node Count F00h 04h 0x00010001 - AFG. Bit Clock Capabilities F00h 16h 0x00000007 - Supports 6MHz, 12MHz, and 24MHz. Interface Capabilities F00h 17h 0x00000000 - Default. Get Current BCLK Frequency F37 00h 0x0000000a 0x00000004 24MHz. Conexant Confidential 05/26/15 010-24DSR03 16 CX20724 Data Sheet Verbs Node ID 01: Audio Function Group (AFG) Table 5 describes an AFG. made up of 19 nodes, and indicates the default supported sample rates and bit widths for the entire device. Nodes that have differing capabilities also respond to verb queries. The configuration default register in the AFG is not a standard feature Table 5: Node 01 Responses Description Verb ID Parameter Response Default Value Comments Subordinate Node Count 0xF00 0x04 0x00100013 - • • Starting node = 10 Node count = 19 Function Group 0xF00 0x05 0x00000101 - • • AFG Unsolicited capable AFG Capabilities 0xF00 0x08 0x00010F0F - Sample delay in and out is 16—PC Beep generator. PCM Size and Rate 0xF00 0x0A 0x000A0140 - • • PCM Format 0xF00 0x0B 0x00000001 - PCM only. Supported Power States 0xF00 0x0F 0xE000001F - EPSS, clock stop, D0, D1, D2, D3, and D4. GPIO Count 0xF00 0x11 0xC0000007 - Seven GPIOs unsolicited message and wake. Get Power State 0xF05 0x00 0x00000abc 0x00000633 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. 16-bit and 24-bit 48kHz and 96kHz Set Power State 0x705 0x0a 0x00000000 - Get Unsolicited 0xF08 0x00 0x000000aa 0x00000000 (P, W) aa = Unsolicited enable and tag. a = Requested state. Set Unsolicited 0x708 0xaa 0x00000000 - Get GPIO Data 0xF15 0x00 0x000000aa 0x00000000 (P, W) aa = GPIO data. aa = Unsolicited enable and tag. Set GPIO Data 0x715 0xaa 0x00000000 - Get GPIO Enable 0xF16 0x00 0x000000aa 0x00000000 (P, W) aa = GPIO enable. aa = GPIO data. Set GPIO Enable 0x716 0xaa 0x00000000 - Get GPIO Direction 0xF17 0x00 0x000000aa 0x00000000 (P, W) aa = GPIO direction. Set GPIO Direction 0x717 0xaa 0x00000000 - Get GPIO Wake 0xF18 0x00 0x000000aa 0x00000000 (P, W) aa = GPIO wake. Set GPIO Wake 0x718 0xaa 0x00000000 - aa = GPIO wake. Get GPIO UM Enable 0xF19 0x00 0x000000aa aa = Unsolicited message enable. Set GPIO UM Enable aa = Unsolicited message enable. aa = GPIO enable. aa = GPIO direction. 0x719 0xaa 0x00000000 Get GPIO Sticky Mask 0xF1A 0x00 0x000000aa 0x00000000 (P, W) aa = Sticky mask. Set GPIO Sticky Mask 0x71A 0xaa 0x00000000 aa = Sticky mask. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x00000000 (P) • • • • aa = Config 4 bb = Config 3 cc = Config 2 dd = Config 1 Set Config Default 1 0x71C 0xaa 0x00000000 - aa = Config 1. Set Config Default 2 0x71D 0xaa 0x00000000 - aa = Config 2. Conexant Confidential 05/26/15 010-24DSR03 17 CX20724 Data Sheet Verbs Table 5: Node 01 Responses (Continued) Description Verb ID Parameter Response Default Value Comments Set Config Default 3 0x71E 0xaa 0x00000000 - aa = Config 3. Set Config Default 4 0x71F 0xaa 0x00000000 - aa = Config 4. Get Subsystem ID 0xF200xF23 0x00 0xaaaabbcc 0x14F10101 (P) • • • Set Subsystem ID 1 0x720 0xaa 0x00000000 - aa = Assembly ID. Set Subsystem ID 2 0x721 0xaa 0x00000000 - aa = SKU ID. Set Subsystem ID 3 0x722 0xaa 0x00000000 - aa = Subsystem ID low byte. Set Subsystem ID 4 0x723 0xaa 0x00000000 - aa = Subsystem ID high byte. Soft Reset 0x7FF 0x00 0x00000000 - Soft reset. aaaa = Subsystem ID bb = SKU ID cc = Assembly ID Conexant Confidential 05/26/15 010-24DSR03 18 CX20724 Data Sheet Verbs Nodes 10, 11: DAC 1, 2 Widgets The following table describes a stereo DAC. Table 6: Node 10 and 11 Responses Description Verb ID Parameter Response Default Value Comments Get Converter Format 0xA 0x0000 0x0000aaaa 0x00000031 (P, W) aaaa = Converter format. Set Converter Format 0x2 0xaaaa 0x00000000 - Get Amplifier Gain 0xB80 0xBA0 0x00 0x00 0x000000aa 0x0000004A (P, W) • • aa = Right gain aa = Left gain Set Amplifier Gain 0x390 0x3A0 0x3B0 0xaa 0x00000000 - aa = Right gain aa = Left gain aa = Right and left gain Audio Widget DAC 0xF00 0x09 0x00000C1D - DAC—analog. PCM Size and Rate 0xF00 0x0A 0x000A0540 - • • PCM Format 0xF00 0x0B 0x00000001 - PCM only. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Output Amplifier Capabilities 0xF00 0x12 0x80034A4A - Get Power State 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - a = Requested state. Get Converter Stream and Channel 0xF06 0x00 0x000000ab 0x00000000 (P, R, V, W, D) • • a = Stream b = Channel position Set Converter Stream 0x706 and Channel 0xab 0x00000000 - • • a = Stream b = Channel position aaaa = Converter format. • • • • • • 16-bit and 24-bit 44.1kHz, 96kHz, and 192kHz Mute, 1dB step Step 74 is 0dB 74 of 80 steps are exposed Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = Left/right swap. Set EAPD 0x70C 0x0a 0x00000000 - a = Left/right swap. Conexant Confidential 05/26/15 010-24DSR03 19 CX20724 Data Sheet Verbs Node 12: PC Beep Generator Widget The following table describes a beep generator. Table 7: PC Beep Generator Responses Description Verb ID Parameter Response Default Value Comments Get Amplifier Gain 0xBA0 0x00 0x0000000a 0x00000003 (P, W) aa = Left gain –24dB Set Amplifier Gain 0x3A0 0x3B0 0xaa 0x00000000 - • • Audio Widget PC Beep 0xF00 0x09 0x0070000C - PC Beep generator with an output amplifier. Get Output Amplifier Capabilities 0xF00 0x12 0x000F0707 - 4dB step, eight steps, and step 8 is –4dB. Get Beep Generation Control 0xF0A 0x00 0x000000aa 0x00000000 (P, W) aa = Divider. Set Beep Generation Control 0x70A 0xaa 0x00000000 - aa = Divider. aa = Left gain aa = Left gain Conexant Confidential 05/26/15 010-24DSR03 20 CX20724 Data Sheet Verbs Node ID 13: ADC1 Widget The following table describes a stereo ADC. Table 8: Node ID 13 Responses Description Verb ID Parameter Response Default Value Comments Get Converter Format 0xA 0x0000 0x0000aaaa 0x00000031 (P, W) aaaa = Converter format. Set Converter Format 0x2 0xaaaa 0x00000000 - Get Index 0 Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 1 Amp Gain 0xB00 0xB20 0x01 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 2 Amp Gain 0xB00 0xB20 0x02 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 3 Amp Gain 0xB00 0xB20 0x03 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 4 Amp Gain 0xB00 0xB20 0x04 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 5 Amp Gain 0xB00 0xB20 0x05 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 6 Amp Gain 0xB00 0xB20 0x06 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Set Index 0 Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 1 Amp Gain 0x351 0x361 0x371 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 2 Amp Gain 0x352 0x362 0x372 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 3 Amp Gain 0x353 0x363 0x373 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 4 Amp Gain 0x354 0x364 0x374 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 5 Amp Gain 0x355 0x365 0x375 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 6 Amp Gain 0x356 0x366 0x376 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Capabilities 0xF00 0x09 0x00100D1B - ADC—Analog. PCM Size and Rate 0xF00 0x0A 0x000A0140 - • • aaaa = Converter format. 16-bit and 24-bit 48kHz and 96kHz Conexant Confidential 05/26/15 010-24DSR03 21 CX20724 Data Sheet Verbs Table 8: Node ID 13 Responses (Continued) Description Verb ID Parameter Response Default Value Comments PCM Format 0xF00 0x0B 0x00000001 - PCM only. Input Amplifier Capabilities 0xF00 0x0D 0x8003504A - Mute, 1db step, 80 steps, and step 74 is 0db. Connection Length 0xF00 0x0E 0x00000007 - - Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Connection Select 0xF01 0x00 0x0000000a 0x00000000 (P, W) a = Connection index. Set Connection Select 0x701 0x0a 0x00000000 - a = Connection index. Get Connection List 0xF02 0x00 0x151A1918 - • • 18 = Port B input 19 = Headset microphone 1A = Digital mic1 input 15 = DAC mix Get Connection List 0xF02 0x04 0x001F1E1D - Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • • • • a = Settings reset b = Actual state c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - • a = Requested state. Get Converter Stream/ Channel 0xF06 0x00 0x000000ab 0x00000000 (P, R, V, W, D) • • a = Stream b = Channel position Set Converter Stream/ Channel 0x706 0xab 0x00000000 - • • a = Stream b = Channel position • 1D = Port E input 1E = Port F input 1F = Digital mic2 input Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = Left/right swap. Set EAPD 0x70C 0x0a 0x00000000 - a = Left/right swap. Conexant Confidential 05/26/15 010-24DSR03 22 CX20724 Data Sheet Verbs Node ID 14: ADC2 Widget The following table describes a stereo ADC. Table 9: Node ID 14 Responses Description Verb ID Parameter Response Get Converter Format 0xA 0x0000 0x0000aaaa 0x00000031 (P, W) aaaa = Converter format. Default Value Comments Set Converter Format 0x2 0xaaaa 0x00000000 - Get Index 0 Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 1 Amp Gain 0xB00 0xB20 0x01 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Get Index 2 Amp Gain 0xB00 0xB20 0x02 0x000000aa 0x0000004A (P, W) • • 0x000000aa aa = Right gain aa = Left gain Set Index 0 Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 1 Amp Gain 0x351 0x361 0x371 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Set Index 2 Amp Gain 0x352 0x362 0x372 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Capabilities 0xF00 0x09 0x00100D1B - ADC—Analog. PCM Size and Rate 0xF00 0x0A 0x000A0140 - • • PCM Format 0xF00 0x0B 0x00000001 - PCM only. Input Amplifier Capabilities 0xF00 0x0D 0x8003504A - Mute, 1db step, 80 steps, and step 74 is 0db. Connection Length 0xF00 0x0E 0x00000003 - - Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Connection Select 0xF01 0x00 0x0000000a 0x00000000 (P, W) a = Connection index. Set Connection Select 0x701 0x0a 0x00000000 - a = Connection index. Get Connection List 0xF02 0x00 0x001F151A - - Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • • • • a = Settings reset b = Actual state c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - • a = Requested state. Get Converter Stream/ Channel 0xF06 0x00 0x000000ab 0x00000000 (P, R, V, W, D) • • a = Stream b = Channel position Set Converter Stream/ Channel 0x706 0xab 0x00000000 - • • a = Stream b = Channel position Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = Left/right swap. Set EAPD 0x70C 0x0a 0x00000000 - aaaa = Converter format. 16-bit and 24-bit 48kHz and 96kHz a = Left/right swap. Conexant Confidential 05/26/15 010-24DSR03 23 CX20724 Data Sheet Verbs Node ID 15: Mixer Widget The following table describes a mixer widget. Table 10: Node ID 15 Responses Description Verb ID Parameter Response Default Value Comment Get Index 0 Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • a = Right gain a = Left gain Get Index 1 Amp Gain 0xB00 0xB20 0x01 0x000000aa 0x000000aa 0x00000000 (P, W) • • a = Right gain a = Left gain Set Index 0 Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • a = Right gain a = Left gain a = Left & Right gain Set Index 1 Amp Gain 0x351 0x361 0x371 0xaa 0x00000000 - • • • a = Right gain a = Left gain a = Left & Right gain Audio Widget Mixer 0xF00 0x09 0x0020050B - Mixer with input amplifier. Input Amplifier Capabilities 0xF00 0x0D 0x80034A4A - Mute, 1dB steps, 74 steps, step 74 is 0dB. Connection Length 0xF00 0x0E 0x00000002 - Connected to two widgets. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Connection List 0xF02 0x00 0x00001110 - Connected to DAC1, DAC2. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - a = Requested state. Conexant Confidential 05/26/15 010-24DSR03 24 CX20724 Data Sheet Verbs Node ID 16: Port A/Vendor Widget The following table describes a pin widget that has selectable headphone or line drive and supports jack sensing. Table 11: Node ID 16 Responses Description Verb ID Parameter Response Audio Widget Pin 0xF00 0x09 Default Value 0x00400581 0x00F00000 Comment • • Pin—Analog Vendor widget in UAJ mode Get Pin Capabilities 0xF00 0x0C 0x0001001C - Output, HP, sense, EAPD. Connection Length 0xF00 0x0E 0x00000002 - Connected to 2. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, D3. Get Connection 0xF01 0x00 0x0000000a 0x00000000 (P, W) DAC1 is selected. Set Connection 0x701 0x0a 0x00000000 - • • Get Connection List 0xF02 0x00 0x00001110 DAC1, DAC2. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000a0 0x000000C0 (P, W) a = Headphone and output enable. Set Pin Control 0x707 0xa0 0x00000000 - Get Unsolicited Response 0xF08 0x00 0x000000aa 0x00000000 (P, W) aa = Unsolicited enable and tag. Set Unsolicited Response 0x708 0xaa 0x00000000 - aa = Unsolicited enable and tag. Get Pin Sense 0xF09 0x00 0xa0000000 - • • • - 0 = DAC1 1 = DAC2 a = Requested state. a = Headphone and output enable. a = Presence detect 8 = Present 0 = Missing Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = EAPD. Set EAPD 0x70C 0x0a 0x00000000 - a = EAPD. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd • • • • Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config 1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config 2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config 3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config 4. 0x0421401F (P) aa = Config 4 bb = Config 3 cc = Config 2 dd = Config 1 Conexant Confidential 05/26/15 010-24DSR03 25 CX20724 Data Sheet Verbs Node ID 17: Port G BTL Pin Widget The following table describes a pin that accepts a stereo signal and drives stereo speakers. Table 12: Node ID 17 Responses Description Verb ID Parameter Response Audio Widget Pin 0xF00 0x09 Default Value 0x00400501 - Comment Pin—Analog. Get Pin Capabilities 0xF00 0x0C 0x00010010 - Output, EAPD. Connection Length 0xF00 0x0E 0x00000002 - Connected to 2. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, D3. Get Connection 0xF01 0x00 0x0000000a 0x00000000 (P, W) DAC1 is selected. Set Connection 0x701 0x0a 0x00000000 - • • Get Connection List 0xF02 0x00 0x00001110 Connected to DAC1, DAC2. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000a0 0x00000040 (P, W) a = Output enable. Set Pin Control 0x707 0xa0 0x00000000 - Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = EAPD. Set EAPD 0x70C 0x0a 0x00000000 - a = EAPD. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd • • • • Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config 1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config 2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config 3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config 4. - 0x90170010 (P) 0 = DAC1 1 = DAC2 a = Requested state. a = Output enable. aa = Config 4 bb = Config 3 cc = Config 2 dd = Config 1 Conexant Confidential 05/26/15 010-24DSR03 26 CX20724 Data Sheet Verbs Node ID 18: Port B Widget Table 13 describes a stereo pin widget that can be configured to be a line input or microphone input. There is a microphone boost control and micbias. Table 13: Node ID 18 Responses Description Verb ID Parameter Response Default Value Comment Get Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • aa = Right gain aa = Left gain Set Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Pin 0xF00 0x09 0x0040048B 0x0040058B Default UAJ Mode • • Pin—Analog Add connection list Get Pin Capabilities 0xF00 0x0C 0x00001324 0x0001133C - Vref, input, jack sense. Input Amp Capabilities 0xF00 0x0D 0x002F0300 - 12db step, four steps, and step 0 is 0db. Connection Length 0xF00 0x0E 0x00000002 - Connected to 2. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Connection 0xF01 0x00 0x0000000a 0x00000000 (P, W) DAC 1 is selected. Set Connection 0x701 0x0a 0x00000000 - • • Get Connection List 0xF02 0x00 0x00001110 - DAC 1, 2. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000aa 0x00000000 (P, W) aa = Vref, input enable, output, HP. Set Pin Control 0x707 0xaa 0x00000000 - Get Unsolicited Response 0xF08 0x00 0xaa 0x00000000 (P, W) aa = Unsolicited enable and tag. Set Unsolicited Response 0x708 0xaa 0x00000000 - aa = Unsolicited enable and tag. Get Pin Sense 0xF09 0x00 0xa0000000 - • • • Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = EAPD. Set EAPD 0x70C 0x0a 0x00000000 - a = EAPD. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x048130F0 (P) • • • • 0 = DAC 1 1 = DAC 2 a = Requested state. aa = Vref, input enable, output, HP. a = Presence detect 8 = Present 0 = Missing aa = Config4 bb = Config3 cc = Config2 dd = Config1 Conexant Confidential 05/26/15 010-24DSR03 27 CX20724 Data Sheet Verbs Table 13: Node ID 18 Responses (Continued) Description Verb ID Parameter Response Default Value Comment Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. Conexant Confidential 05/26/15 010-24DSR03 28 CX20724 Data Sheet Verbs Node ID 19: Port D Widget Table 14 describes a stereo pin widget that is a microphone input. There is a microphone boost control and micbias. Table 14: Node ID 19 Responses Description Verb ID Parameter Response Default Value Comment Get Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • aa = Right gain aa = Left gain Set Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Pin 0xF00 0x09 0x0040048B 0x0040040B Headset enabled Pin—Analog. Get Pin Capabilities 0xF00 0x0C 0x00001324 0x00001320 Headset enabled • • Input Amp Capabilities 0xF00 0x0D 0x002F0300 - 12db step, four steps, and step 0 is 0db. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000aa 0x00000000 (P, W) aa = Vref, input enable. Set Pin Control 0x707 0xaa 0x00000000 - Get Unsolicited Response 0xF08 0x00 0xaa 0x00000000 (P, W) aa = Unsolicited enable and tag. Set Unsolicited Response 0x708 0xaa 0x00000000 - aa = Unsolicited enable and tag. Get Pin Sense 0xF09 0x00 0xa0000000 - • • • a = Presence detect 8 = Present 0 = Missing Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x04A190F0 (P) • • • • aa = Config4 bb = Config3 cc = Config2 dd = Config1 Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. Vref-in, jack sense Vref-in a = Requested state. aa = Vref, input enable. Conexant Confidential 05/26/15 010-24DSR03 29 CX20724 Data Sheet Verbs Node ID 1A: Port C Widget Port C is a stereo digital microphone. Table 15: Node ID 1A Responses Description Verb ID Parameter Response Default Value Comment Get Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • aa = Right gain aa = Left gain Set Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Pin 0xF00 0x09 0x0040040B Headset enabled Pin—Analog. Get Pin Capabilities 0xF00 0x0C 0x00000020 Headset enabled Input only. Input Amp Capabilities 0xF00 0x0D 0x002F0300 - 12db step, four steps, and step 0 is 0db. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000aa 0x00000000 (P, W) a = Input enable. Set Pin Control 0x707 0xaa 0x00000000 - a = Input enable. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x90A700F0 (P) • • • • Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. a = Requested state. aa = Config4 bb = Config3 cc = Config2 dd = Config1 Conexant Confidential 05/26/15 010-24DSR03 30 CX20724 Data Sheet Verbs Node ID 1F: Port H Widget Port H is a stereo digital microphone. Table 16: Node ID 1F Responses Description Verb ID Parameter Response Default Value Comment Get Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • aa = Right gain aa = Left gain Set Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Pin 0xF00 0x09 0x0040040B - Pin—Analog. Get Pin Capabilities 0xF00 0x0C 0x00000020 - Input only. Input Amp Capabilities 0xF00 0x0D 0x002F0300 - 12db step, four steps, and step 0 is 0db. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000aa 0x00000000 (P, W) aa = Input enable. Set Pin Control 0x707 0xaa 0x00000000 - aa = Input enable. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x90A700F0 (P) • • • • Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. a = Requested state. aa = Config4 bb = Config3 cc = Config2 dd = Config1 Conexant Confidential 05/26/15 010-24DSR03 31 CX20724 Data Sheet Verbs Node ID 1D: Port E Line-Out/Line-In/MIC-In The following table describes a pin that is selectable as a stereo line output, line input, or MIC input with boost and bias, and supports jack sensing. Table 17: Node ID 1D Responses Description Verb ID Parameter Response Default Value Comment Get Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • aa = Right gain aa = Left gain Set Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Pin 0xF00 0x09 0x0040058B - Pin—Analog. Get Pin Capabilities 0xF00 0x0C 0x00011334 - Input, output, jack sense, Vref, EAPD. Input Amp Capabilities 0xF00 0x0D 0x002F0300 - 12db step, four steps, and step 0 is 0db. Connection Length 0xF00 0x0E 0x00000002 - Connected to DAC 1, 2. EPSS, D0, D1, D2, and D3. Supported Power States 0xF00 0x0F 0x8000000F - Get Connection 0xF01 0x00 0x0000000a 0x00000000 (P, W) DAC 1 is selected. Set Connection 0x701 0x0a 0x00000000 - • • Get Connection List 0xF02 0x00 0x00001110 - DAC 1, 2. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000a0 0x00000040 (P, W) a = Vref, input enable, and output enable. Set Pin Control 0x707 0xa0 0x00000000 - Get Unsolicited Response 0xF08 0x00 0x000000aa 0x00000000 (P, W) aa = Unsolicited enable and tag. Set Unsolicited Response 0x708 0xaa 0x00000000 - aa = Unsolicited enable and tag. Get Pin Sense 0xF09 0x00 0xa0000000 - • • • Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = EAPD. Set EAPD 0x70C 0x0a 0x00000000 - a = EAPD. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x240140F0 (P) • • • • 0 = DAC 1 1 = DAC 2 a = Requested state. a = Vref, input enable, and output enable. a = Presence detect 8 = Present 0 = Missing aa = Config4 bb = Config3 cc = Config2 dd = Config1 Conexant Confidential 05/26/15 010-24DSR03 32 CX20724 Data Sheet Verbs Table 17: Node ID 1D Responses (Continued) Description Verb ID Parameter Response Default Value Comment Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. Conexant Confidential 05/26/15 010-24DSR03 33 CX20724 Data Sheet Verbs Node ID 1E: Port F Widget Table 18 describes a stereo input pin that can be configured to be a line input or a microphone input. There is a microphone boost control. This pin supports jack sensing. Table 18: Node ID 1F Responses Description Verb ID Parameter Response Default Value Comment Get Amp Gain 0xB00 0xB20 0x00 0x000000aa 0x000000aa 0x00000000 (P, W) • • aa = Right gain aa = Left gain Set Amp Gain 0x350 0x360 0x370 0xaa 0x00000000 - • • • aa = Right gain aa = Left gain aa = Left and right gain Audio Widget Pin 0xF00 0x09 0x0040048B - Pin—Analog. Get Pin Capabilities 0xF00 0x0C 0x00000024 - Input, jack sense. Input Amp Capabilities 0xF00 0x0D 0x002F0300 - 12db step, four steps, and step 0 is 0db. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000aa 0x00000000 (P, W) aa = Vref, input enable. a = Requested state. Set Pin Control 0x707 0xaa 0x00000000 - Get Unsolicited Response 0xF08 0x00 0xaa 0x00000000 (P, W) aa = Unsolicited enable and tag. aa = Vref, input enable. Set Unsolicited Response 0x708 0xaa 0x00000000 - aa = Unsolicited enable and tag. Get Pin Sense 0xF09 0x00 0xa0000000 - • • • a = Presence detect 8 = Present 0 = Missing Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x248130F0 (P) • • • • aa = Config4 bb = Config3 cc = Config2 dd = Config1 Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. Conexant Confidential 05/26/15 010-24DSR03 34 CX20724 Data Sheet Verbs Node ID 20: DAC 3—Sony/Philips Digital Interface Format (S/PDIF) Output Widget The following table describes an S/PDIF DAC that supports 16-bit and 24-bit widths, and a 48kHz sample rate. Table 19: Node ID 20 Responses Description Verb ID Parameter Response Default Value Comment Get Converter Format 0xA 0x0000 0x0000aaaa 0x00000031 (P, W) aaaa = Converter format. Set Converter Format 0x2 0xaaaa 0x00000000 - aaaa = Converter format. Audio Widget S/PDIF 0xF00 0x09 0x00000611 - DAC—Digital stereo. PCM Size and Rate 0xF00 0x0A 0x000E05E0 - • • PCM Format 0xF00 0x0B 0x00000005 - PCM and AC-3. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Power State 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - a = Requested state. Get Converter Stream/ 0xF06 Channel 0x00 0x000000ab 0x00000000 (P, R, V, W, D) • • a = Stream b = Channel Set Converter Stream/ 0x706 Channel 0xab 0x00000000 - • • a = Stream b = Channel Get Digital Converter Control 0xF0D 0xF0E 0x00 0xaabbccdd Set Digital Control 1 0x70D 0xaa 0x00000000 - aa = Header information. Set Digital Control 2 0x70E 0xaa 0x00000000 - aa = Category code. Set Digital Control 3 0x73E 0xaa 0x00000000 - aa = IEC coding type and keep alive enable. Set Digital Control 4 0x73F 0x00 0x00000000 - Reserved, read as 0. 0x00000000 (P, W) • • • • 16-bit and 24-bit 48K, 96K, and 192K sample rates aa = Reserved bb = Coding mode cc = Category code dd = Header information Conexant Confidential 05/26/15 010-24DSR03 35 CX20724 Data Sheet Verbs Node ID 21: Port I S/PDIF Output Widget The following table describes a digital output pin. Table 20: Node ID 21 Responses Description Verb ID Parameter Response Default Value Comment Audio Widget Pin 0xF00 - Pin—Digital. 0x09 0x00400701 Get Pin Capabilities 0xF00 0x0C 0x00000010 - Output. Connection Length 0xF00 0x0E 0x00000001 - - Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Connection 0xF01 0x00 0x0000000a 0x00000000 (P, W) S/PDIF DAC is selected. Set Connection 0x701 0x0a 0x00000000 - 0 = S/PDIF DAC. Get Connection List 0xF02 0x00 0x00000020 - Connects to S/PDIF DAC. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000a0 0x00000000 (P, W) a = Output enable. Set Pin Control 0x707 0xa0 0x00000000 - a = Output enable. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x044510F0 (P) • • • • Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. a = Requested state. aa = Config4 bb = Config3 cc = Config2 dd = Config1 Conexant Confidential 05/26/15 010-24DSR03 36 CX20724 Data Sheet Verbs Node 22: Port M Widget The following table exposes a pin that accepts a stereo signal and drives a mono line out. Table 21: Node ID 1D Responses Description Verb ID Parameter Response Default Value Comment Audio Widget Pin 0xF00 0x00400501 - Pin—Analog. 0x09 Get Pin Capabilities 0xF00 0x0C 0x00010010 - Output. Connection Length 0xF00 0x0E 0x0000002 - Connected to 2. Supported Power States 0xF00 0x0F 0x8000000F - EPSS, D0, D1, D2, and D3. Get Connection 0xF01 0x00 0x0000000a 0x00000000 (P, W) DAC 1 is selected. Set Connection 0x701 0x0a 0x00000000 - • • Get Connection List 0xF02 0x00 0x00001110 - DAC 1, 2. Get Power Sate 0xF05 0x00 0x00000abc 0x00000433 (P, W) • a = Settings reset • b = Actual state • c = Requested state The settings reset is cleared by this verb or any write to this node. Set Power State 0x705 0x0a 0x00000000 - Get Pin Control 0xF07 0x00 0x000000a0 0x00000000 (P, W) a = Output enable. Set Pin Control 0x707 0xa0 0x00000000 - Get EAPD 0xF0C 0x00 0x0000000a 0x00000000 (P, W) a = EAPD. Set EAPD 0x70C 0x0a 0x00000000 - a = EAPD. Get Default Config 0xF1C- 0x00 0xF1F 0xaabbccdd 0x900700F0 (P) • • • • Set Default Config 1 0x71C 0xaa 0x00000000 - aa = Config1. Set Default Config 2 0x71D 0xaa 0x00000000 - aa = Config2. Set Default Config 3 0x71E 0xaa 0x00000000 - aa = Config3. Set Default Config 4 0x71F 0xaa 0x00000000 - aa = Config4. 0 = DAC 1 1 = DAC 2 a = Requested state. a = Output enable. aa = Config4 bb = Config3 cc = Config2 dd = Config1 Conexant Confidential 05/26/15 010-24DSR03 37 CX20724 Data Sheet Unsolicited Messages Node 1B: Vendor-Specific Widget This node describes the EQ, DRC, and other registers that are available in this device. Refer to the BIOS Guide and Programming document for details. Node 1C: Vendor-Specific Widget This node describes the vendor-specific registers. Refer to the BIOS Guide document for details. Unsolicited Messages Audio Unsolicited Messages Table 22 describes all possible bit coding and sources of unsolicited messages for the AFG. The tag comes from the unsolicited message tag stored in the node that generated the event. When the bus is inactive, a wake event is generated and the unsolicited response is sent after the bus becomes active per Intel's High Definition Audio Specification, Revision 1.0a. Table 22: Audio Unsolicited Messages Node ID Description Node 1 GPIO state change. Node 16 Port A jack change (sense pin). Node 18 Port B jack change (sense pin). Node 19 Port D jack change (headset logic). Node 1D Port E jack change (sense pin). Node 1E Port F jack change (sense pin). - Headset button events. Conexant Confidential 05/26/15 010-24DSR03 38 CX20724 Data Sheet Ordering Information Ordering Information Table 23: Ordering Information Model/Order/Part Numbers AudioSmart Class-D Operating Temperature Device Order Number Audio CODEC Part Number CX20724-11Z CX20724 -11Z 50-QFN, 6x6 Yes 0 to 70°C CX21724-11Z CX21724 -11Z 50-QFN, 6x6 No 0 to 70°C Revision Audio CODEC Package Type Note: All devices are lead-free (Pb-free) and China Restriction of Hazardous Substances (RoHS) compliant , and are compatible with leaded re-flow processes. Contact the local Conexant sales office for advanced software options. www.conexant.com Headquarters: 1901 Main Street, Suite 300 Irvine, CA,92614 General Information: U.S. and Canada: 888-855-4562 | International: 1 + 949-483-3000 © 2015 Conexant Systems, Inc. Information in this document is provided in connection with Conexant Systems, Inc. (“Conexant”) products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to this document at any time, without notice. Conexant advises all customers to ensure that they have the latest version of this document and to verify, before placing orders, that information being relied on is current and complete. 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CONEXANT SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Conexant products are not intended for use in medical, lifesaving or life sustaining applications. Conexant customers using or selling Conexant products for use in such applications do so at their own risk and agree to fully indemnify Conexant for any damages resulting from such improper use or sale. The following are trademarks of Conexant Systems, Inc.: Conexant®, the Conexant "C" logo, SmartAudio, and SmartDAA®. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. For additional disclaimer information, consult Conexant’s Legal Information posted at www.conexant.com which is incorporated by reference. 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