Implementing Linear Motion Control

Application
Note
RDC 5028 Resolver-To-Digital Converter
Implementing Linear Motion control
using an LVDT Transducer
ABSTRACT
The RDC5028 was initially designed to be used as a Resolver to Digital converter (RDC). This application note
was developed to address applications using the RDC5028 with a Linear Voltage Differential Transformer
(LVDT).
The RDC5028 can easily be adapted to be used with an LVDT by the addition of two operational amplifiers and
resistors to provide the gain and biasing required for the RDC5028. This application note explains the translation
required at the RDC5028 output to convert the Tan (A) function to a desired linear value. Three different LVDT
configurations for interfacing LVDT’s to the RDC5028 will be highlighted.
THEORY
The secondary of an LVDT incorporates two windings that are 180° out of phase with each other, the voltage of
each will be identified as Va and Vb. The VSIN input to the RDC5028 requires the input signal to be Va – Vb. At
the null position Va – Vb will equal 0 Volts and at the maximum excursion in each direction the magnitude of
Va = Vb = VFS = 1.3VRMS. Therefore the linear position will extend from –FS through the null position to the
+FS position. This linear excursion will be translated by the RDC5028 as a SIN/COS (TAN) function with –FS =
-45° (315°), the null position = 0°, and +FS = +45°. This TAN function that is presented by the RDC5028 counter
output can then be translated to a linear function by use of a lookup table or equation to derive the linear position
of the LVDT.
The VCOS input and Reference input to the RDC5028 will be (Va + Vb) a constant voltage that is equal to the
primary voltage times the turns ratio of the transformer. The voltage applied to those inputs are normally
1.3VRMS.
The RDC5028 is used in the 14 Bit mode where by the lower 11 bits are used in the calculation and the upper
three bits are used to determine off scale conditions.
Application Note AN5028-4 12/22/05
Rev A
Formula for Translation
Table 1 shows the relationships between the various terms and Figure 1 on the following page represents the
actual output (Tan A) of the RDC5028 and the desired Linear Output.
Let:
Angle @ -FS = 315o, Angle @ +FS = +45o
A = Output Angle
Digital Output = Dec2Hex (214 x A/360)
Tan (A) = RDC5028 Output Normalized
Desired Linear Output = DLO = (A -360) / 45
Then: % Error = Tan (A) – DLO
Digital Error = Dec2Hex (% Error x 211)
Digital Correction = Digital Output – Digital Error
Table 1 – LVDT Terms Translation Relationships
- Full Scale
Null
+ Full Scale
Output Angle
(A)
Digital
Output
Tan (A)
315
3800
-1
-1
0
0
3800
320
38E3
-0.8390996
-0.8888889
0.049789258
65
387D
325
39C7
-0.7002075
-0.7777778
0.07757024
9E
3928
330
3AAA
-0.5773503
-0.6666667
0.089316397
B6
39F3
335
3B8E
-0.4663077
-0.5555556
0.089247897
B6
3AD7
340
3C71
-0.3639702
-0.4444444
0.08047421
A4
3BCC
345
3D55
-0.2679492
-0.3333333
0.065384141
85
3CCF
350
3E38
-0.176327
-0.2222222
0.045895242
5D
3DDA
355
3F1C
-0.0874887
-0.1111111
0.023622448
30
3EEB
0
0000
0
0
0
0
0000
5
00E3
0.0874887
0.1111111
-0.023622448
30
0113
10
01C7
0.176327
0.2222222
-0.045895242
5D
0224
15
02AA
0.2679492
0.3333333
-0.065384141
85
032F
20
038E
0.3639702
0.4444444
-0.08047421
A4
0432
25
0471
0.4663077
0.5555556
-0.089247897
B6
0527
30
0555
0.5773503
0.6666667
-0.089316397
B6
060B
35
0638
0.7002075
0.7777778
-0.07757024
9E
06D6
40
071C
0.8390996
0.8888889
-0.049789258
65
0781
45
0800
1
0.999999
1E-06
0
07FF
Application Note AN5028-4 12/22/05
DesiredLinear % Error of Full Digital
Output
Scale
Error
2
Digital
Correction
Rev A
1
0.8
0.6
Position
0.4
0.2
Tan (A)
0
Linear
-0.2
-0.4
-0.6
-0.8
45
35
25
15
5
355
345
335
325
315
-1
Angle
Figure 1 – RDC5028 Translation Relationships
Counter Output Limits
The RDC5028 is used in the 14 bit mode where by the 3 MSBs are used to detect Over Full Scale range and the
lower 11 bits derive the displacement.
Over +FS
+FS -1 LSB
+1 LSB
Zero
-1 LSB
–FS
Over –FS
00-1xxx-xxxx-xxxx
00-0111-1111-1111
00-0000-0000-0001
00-0000-0000-0000
11-1111-1111-1111
11-1000-0000-0000
11-0xxx-xxxx-xxxx
Input Conditioning Circuits
The RDC5028 power supply range is from Ground and +5V, for this reason a 2.5VDC reference is required to be
presented to the SIN & COS inputs. The AC level to both these inputs are set by the user to be nominally maxed
out at 1.3VRMS to prevent saturation in the RDC5028.
Below are three examples utilizing different configurations for interfacing LVDTs to the RDC5028.
1. Figure 2 utilizes a three wire LVDT with the center tap grounded.
2. Figure 3 utilizes a three wire LVDT with the center tap floating.
3. Figure 4 utilizes a two wire LVDT.
Application Note AN5028-4 12/22/05
3
Rev A
Figure 2 – Three Wire LVDT CT Grounded
SIN Input to RDC
VAC SIN =
a ∗ (Va - Vb)
VAC SIN =
(Ra + R) ∗ (Va - Vb)
VDC SIN =
2.5 ∗ (R / (R + Ra)) ∗ (1 + (Ra/R))
COS & REF input to RDC
VAC COS =
b ∗ (Va + Vb)
VAC COS =
(Rb/R) ∗ (Va + Vb)
VDC COS =
2.5 ∗ (.5R / (.5R + Rb)) ∗ (1 + (Rb/.5R))
Application Note AN5028-4 12/22/05
4
Rev A
Figure 3 – Three Wire LVDT CT Floating
SIN Input to RDC
VAC SIN =
VAC SIN =
VDC SIN =
a ∗ (Va - Vb)
(Ra/R) ∗ (Va - Vb)
2.5 ∗ (R / (Ra + R)) ∗ (1 + (Ra/R))
COS & REF input to RDC
VAC COS =
VAC COS =
VDC COS =
b ∗ (Va + Vb)
(.5 ∗ (.5Rb/R)) ∗ (Va + Vb)
2.5 + ((5 + (10Rb/R)) / (2 + (R/Rb)) - (5Rb/R)
Application Note AN5028-4 12/22/05
5
Rev A
Figure 4 – Two Wire Conditioning Circuit
SIN Input to RDC
@ Null Vab =
0Vrms
VFS = Vab @ +FS = Vab @ -FS
VAC SIN =
a ∗ Vab
VAC SIN =
(Ra/R) ∗ Vab
VDC SIN =
2.5 ∗ (R/(R + Ra)) ∗ (1 + (Ra/R))
COS & REF input to RDC
VAC COS =
b ∗ (Vref)
VAC COS =
(Rb/R) ∗ Vref
VDC COS =
(2.5 ∗ (1 + (Rb/R))) - (2.5 ∗ (Rb/R))
Note: The capacitors are used for conditioning the SIN input to the RDC5028. The one draw back to using a two
wire LVDT is that you must consider the Phase Lead that is generated by the LVDT (not an issue with 3 wire
LVDTs).
Application Note AN5028-4 12/22/05
6
Rev A
Example for Figure 2
SIN Input to RDC
Position
Va
Vb
VAC SIN
VDC SIN
5
0.20
0.00
1.3
2.5
VFS = Va @ +FS = Vb @ -FS
VAC SIN = a ∗ (Va - Vb)
4
0.18
0.02
1.04
2.5
3
0.16
0.04
0.78
2.5
VAC SIN = (Va ∗ (Ra / (Ra + R)) ∗ (1 + (Ra/R)) + (Vb ∗ (-Ra/R))
VDC SIN = 2.5 ∗ (R / (R + Ra)) ∗ (1 + (Ra/R))
2
0.14
0.06
0.52
2.5
1
0.12
0.08
0.26
2.5
0
0.10
0.10
0
2.5
-1
0.08
0.12
-0.26
2.5
-2
0.06
0.14
-0.52
2.5
+FS
Null
Example
VAC SIN FS =
1.3 VRMS
-3
0.04
0.16
-0.78
2.5
VFS =
0.2 VRMS
-4
0.02
0.18
-1.04
2.5
-5
0.00
0.20
-1.3
2.5
Position
Va
Vb
VAC COS
VDC COS
5
3.00
0.00
1.3
2.5
4
2.70
0.30
1.3
2.5
3
2.40
0.60
1.3
2.5
2
2.10
0.90
1.3
2.5
1
1.80
1.20
1.3
2.5
0
1.50
1.50
1.3
2.5
a = Gain = VAC SIN FS / VFS =
6.5
Set R =
10 K
Ra = Gain ∗ R =
65 K
-FS
COS & REF Input to RDC
+FS
VAC COS = b ∗ (Va + Vb)
VAC COS = (Rb || R) / (R + (Rb || R)) ∗ (1 + (Rb/.5R)) ∗ (Va + Vb)
VDC COS = 2.5 ∗ (.5R / (.5R + Rb)) ∗ (1 + (Rb/.5R))
Example
Null
VAC COS =
1.3 VRMS
-1
1.20
1.80
1.3
2.5
Va + Vb =
b = Gain = VAC COS / (Va + Vb) =
3 VRMS
-2
0.90
2.10
1.3
2.5
0.433
-3
0.60
2.40
1.3
2.5
Set R =
Rb = Gain ∗ R =
10 K
4.333 K
-4
0.30
2.70
1.3
2.5
-5
0.00
3.00
1.3
2.5
Rc = .5 ∗ R =
5K
Rb || R =
3.023 K
Application Note AN5028-4 12/22/05
-FS
7
Rev A
Dynamic Considerations
Operate in the 14 bit mode. Moving from –FS to +FS is equivalent to a ¼ rotation. Refer to the RDC5028
data sheet for setting up the band-width and maximum velocity.
Conclusion
The RDC5028 provides the space level community with a radiation hardened solution to support not only
rotational control systems but applications that require linear motion control.
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the information in this document gives only a general
indication of the product capacity, performance and
suitability, none of which shall form part of any contract.
We reserve the right to make design changes
without notice. All trademarks are acknowledged.
Parent company Aeroflex, Inc. ©Aeroflex 2003.
Application Note AN5028-4 12/22/05
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8
Rev A