California Eastern Laboratories AN1014 APPLICATION NOTE Suppression of Prescaler Self-Oscillation NEC/CEL offers a broad range of silicon and GaAs MMIC prescalers. Prescalers are integrated circuits designed to generate an output signal at a frequency which is an integral divisor of the input signal frequency. Prescalers are used in many applications, from digital signal sources to analog frequency dividers in phase-locked loops. NEC’s silicon prescalers operate from 100 MHz to 3 GHz, and GaAs prescalers operate from 1 GHz to 14 GHz. Division ratios are available from 2 to 512. Table I lists frequency ranges and division ratios of the available prescalers. Most devices are available in a choice of a flat, hermetically-sealed, ceramic package; a low-cost, surfacemount, plastic package; or as unpackaged chips. Surface mount devices are available in tape-and-reel. The consistency of NEC wafer processing results in high reliability and repeatable circuit performance of NEC prescalers. Part # Frequency Range (GHz) Division Ratio UPB581 UPB582 UPB584 UPB585 UPB586 UPB587 UPB588 0.5 to 2.8 0.5 to 2.8 0.5 to 2.5 0.5 to 2.5 0.5 to 2.5 0.05 to 1.0 0.5 to 2.5 2 4 2 4 256,512 2,4,8 64,128 UPG501 UPG502 UPG503 UPG504 UPG506 1.5 to 5.0 1.0 to 5.0 3.5 to 9.0 2.0 to 9.0 8.0 to 14.0 4 2 4 2 8 Table I: Frequency ranges and division ratios. Both GaAs and silicon prescalers employ a series of high gain circuits which drive the output stages well into saturation. This ensures an output power level and waveshape which is largely independent of the input signal. Although this is a desirable feature, it has a drawback. While the reverse isolation of the devices is adequate, in practice it is difficult to prevent this isolation from being degraded by external feedback paths. It is not uncommon for enough RF power to be fed back for the prescaler to self-oscillate in the absence of a strong input signal. The frequency of oscillation varies based on the sensitivity curve of the prescaler and the frequency dependence of the feedback path. There are several methods for eliminating this problem. The simplest is to ensure that there is always an applied input signal of adequate magnitude to turn on the prescaler. The applied signal saturates the prescaler circuits at the desired frequency, preventing the undesired signal from being amplified. A second approach is to minimize the feedback path. While this is a desirable goal in most RF and microwave circuits, it can be difficult to achieve because of the high gain of the prescaler and the proximity of the input and output leads. In general, feedback can be minimized by ensuring good RF grounding of all bias lines and the top side ground plane (if used), and providing maximum physical isolation of the input and output RF traces. In cases where an input signal is not always available, and feedback path reduction does not prevent selfoscillation, CEL has found that self-oscillation can be eliminated by reducing the input sensitivity of the prescaler to the feedback signal. Of course, this also reduces the prescaler sensitivity to the desired input signal. However, the high gain of the prescaler circuitry ensures that there is minimal effect on output power. There are several ways to accomplish a reduction in the input sensitivity. The simplest is to add a shunt resistor from the input line to ground. Tests have shown that oscillations can be reliably suppressed using a shunt resistor of between 50 ohms and 10K ohms. The worst case (50 ohms) results in a loss of sensitivity of approximately 3 dB. It is important when using this technique to minimize the distance between the shunt resistor and the prescaler. An example circuit is shown in Figure 1, and the proper pin connections are shown in Table II and III. 1000 pF OUT 1 OUT 8 VSS2 2 VSS1 7 VGG 3 6 4 VDD 5 IN -2.2 1000 pF 10 µF 1000 pF +3.6 V 10 µF 1000 pF UPG504B Figure 1. Example circuit using shunt resistor. IN Shunt Resistor for Oscillation Suppression AN1014 Shunt Resistor/+3.0 V Applied +1.5 Volts Applied Part # Pin/Pad# Description Pin/Pad # Description UPB581A UPB581B UPB581C UPB581P Pin 5 Pin 2 Pin 2 Pad 2 Input Input Input Input Pin 6 Pin 3 Pin 3 Pad 3 Bypass Bypass Bypass Bypass UPB582A UPB582B UPB582C UPB582P Pin 5 Pin 2 Pin 2 Pad 2 Input Input Input Input Pin 6 Pin 3 Pin 3 Pad 3 Bypass Bypass Bypass Bypass UPB584B UPB584G UPB584P Pin 2 Pin 2 Pad 2 Input Input Input Pin 3 Pin 3 Pad 3 Bypass Bypass Ref UPB585B UPB585G UPB585P Pin 2 Pin 2 Pad 2 Input Input Input Pin 3 Pin 3 Pad 3 Bypass Bypass Ref UPB586B UPB586G UPB586P Pin 2 Pin 2 Pad 2 Input Input Input Pin 3 Pin 3 Pad 3 Bypass Bypass Ref UPB587B UPB587G UPB587P Pin 2 Pin 2 Pad 2 Input Input Input Pin 3 Pin 3 Pad 3 Bypass Bypass Ref UPB588B UPB588G UPB588P Pin 2 Pin 2 Pad 2 Input Input Input Pin 3 Pin 3 Pad 3 Bypass Bypass Ref Table II. Silicon Prescalers. Shunt Resistor Neg Gate Voltage Part # Pin/Pad # Description Pin/Pad # Description UPG501B UPG501P Pin 5 Pad 1 Input Input Pin 6 Pad 2 VGG VGG UPBG502B UPG502P Pin 5 Pad 1 Input Input Pin 6 Pad 2 VGG VGG UPG503B UBG503P Pin 5 Pad 1 Input Input Pin 6 Pad 2 VGG1 VGG1 UPG504B UPG504P Pin 5 Pad 1 Input Input Pin 7 Pad 3 VGG VGG UPG506B UPG506P Pin 5 Pad 1 Input Input Pin 6 Pad 3 VGG1 VGG1 Table III. GaAs Prescalers. AN1014 A second approach, which can be used on NEC UPB5xx series silicon prescalers, reduces input sensitivity by changing the bias point of the input transistors using an external voltage. The voltage can be applied to either the bypass pin or the input pin. If the bypass pin is used, the external voltage should be set to 1.5 volts (except of the UPB587 which should have 1.0 volt applied). If the input pin is used, the external voltage should be set to 3.0 volts (except for the UPB587 which should have 2.0 volts applied). The voltage should be applied through a series 1K ohm resistor. The expected current draw is less than 50 microamps. The reduction in input sensitivity is more severe using the applied voltage techniques, so this is only recommended in cases where the shunt resistor approach has failed. A way around this problem is to provide some means of electronically disabling the applied voltage, leaving the input sensitivity +5.0 V 2200 pF 1 VCC unaffected whenever an input signal is intentionally applied. Examples of these circuits are shown in Figures 2 and 3, and the proper pin connections are shown in Table II. A similar approach is also available for use with NEC UPG5xx series GaAs prescalers. These prescalers each have a pin (or pad) labeled VGG or VGG1 which is normally left unconnected. By applying a negative voltage to this pin, the gate voltage and current of the input FET is reduced, which reduces the input sensitivity of the prescaler. Voltages from 0 to -9 volts can be used with increasing loss of sensitivity as the voltage is decreased. As noted above, the negative voltage can be electronically disabled when an RF signal is intentionally applied to the input, resulting in no loss of sensitivity to the desired signal. An example circuit is shown in Figure 4, and the proper pin connections are shown in Table III. -2.2 8 1000 pF OUT IN 1K ohm +1.5 V Applied Voltage to Suppress Oscillation OUT 7 2 IN 2200 pF 4 GND 3 VGG2 6 10 µF Applied Voltage to Suppress Oscillation 1000 pF IN UPG503B Figure 4. Example circuit using VGG pin bias. 8 2200 pF OUT 2200 pF 1K ohm 2200 pF 10 µF 1000 pF OUT 7 2 IN 10 µF 0 to -9 V IN 5 4 VDD +3.6 V UPB584B 1 VCC 1000 pF 1000 pF GND 5 6 3 Bypass Applied Voltage to Suppress Oscillation VGG1 7 2200 pF +5.0 V 2200 pF +3.0 V 2 VSS1 6 Figure 2. Example circuit using bypass pin bias. IN VSS2 8 OUT 2200 pF 3 Bypass 1 OUT 4 GND GND 5 UPB585B Figure 3. Example circuit using input pin bias. California Eastern Laboratories Exclusive Agents for NEC RF, Microwave and Optoelectronic semiconductor products in the U.S. and Canada 4590 Patrick Henry Drive, Santa Clara, CA 95054-1817 Telephone 408-988-3500 • FAX 408-988-0279 •Telex 34/6393 Internet: http:/WWW.CEL.COM Information and data presented here is subject to change without notice. California Eastern Laboratories assumes no responsibility for the use of any circuits described herein and makes no representations or warranties, expressed or implied, that such circuits are free from patent infingement. © California Eastern Laboratories 01/23/2003