EMTG360-16b Fact Sheet

EM MICROELECTRONIC - MARIN SA
TG360_16b
16-bit High Performances Flash Smart Card IC
Environment
 Voltage Supply Class A, B, C: 1.8V, 3V, 5.0V  10%
0
 -25 to +85 C Operating Temperature
 Max supply current 10mA @ 20MHz, Class A
 Max supply current 6mA @ 20MHz, Class B
 Max supply current 4mA @ 20MHz, Class C
 ISO7816-3 pads > 4 kV ESD Protection HBM
Memory Control
 General Purpose Non Volatile Memory: GPNVM
 Memory Management Protection Mechanism
 Memory management HW logical to physical
(LOG2PHY)
 Ultra Fast Byte program time
 Fast GPNVM Page Erase time
CPU
 Software compatible Intel 80251 (MCS251)
 Accelerated 16 bit CPU Architecture
 Up to 20 MHz internal CPU clock
ISO 7816-3 interface
 ISO 7816-3 compliant electrical interface
 ISO 7816-3 compliant T=0 and T=1 protocols
 ETU Timer/Counter
Idle Modes
 Idle and Stop mode selectable modes
 NVM update operation with CPU in idle mode
 IO Transmission and Reception with CPU in idle mode
 Max Idle current / Clock stopped: 100 uA
Memories
 9KB RAM
 360 KB User GPNVM256 = 256B/page
 2KB System GPNVM= 16 Pages of 256 B
 GPNVM data retention: 10 years
 GPNVM Endurance E/W > 100 Kcycles
 Secure Boot loader T=0 compatible
Security
 Hardware Random Number Generator
 Hardware DES/TDES module
 Unique chip identification number
 Notification of tampering
 IC operates under regulated voltage and internal clock
 Under / Over voltage sensors (Vcc)
Chip Forms
 8” Wafer sawn or unsawn
 Back grinding and distressing options
 Modules
Typical Application:
 USIM/UICC cards 128KB
 JavaCard based platform
T G 3 6 0 -1 6 b
P o w e r M a n a g e m e n t S y s te m
In te r n a l V D D
A , B , C o n - c h ip
2 0 M H z o n - c h ip O s c illa to r
P o w e r-o n R e s e t
V o lta g e R e g u la to r
C o n tr o lle d C lo c k D iv id e r
S E C U R IT Y M O D U L E
UVD / OVD
F a s t A r c h ite c tu r e
DES / TDES
E T U T im e r
1 6 b it C P U
IS O 7 8 1 6 - 3
C R C 16
In te r fa c e 3 G
8 0 2 5 1 C o re
R andom N um ber
G e n e r a to r
M e m o r y M a n a g e m e n t P r o te c tio n U n it
[ code]
GPNVM
Boot ROM
F ir m w a r e
S y s te m ( 2 K B )
9 K B y te s
S e c u re N V M
RAM
M a n a g e r (B L )
Copyright 2012, EM Microelectronic-Marin SA
EMTG360_16b-FS.doc, Version 2.0, 6-Feb-12
[ d a ta ]
3 6 0 K B y te s
G P N V M U ser
1
F le x ib le c o d e / d a ta m e m o r y a llo c a tio n
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TG360_16b
Introduction
TG360-16B is a member of the Theseus family of devices
designed specifically for smart card applications and Java
Card technology. It is software compatible with the industry
standard
MCS251
micro-controller.
Computing
performances are powering JavaCard based applications
with large provision of memory resources seen thru linear
Von Neumann space up to 24MB.
Security of the family of devices makes them particularly
suitable in electronic commerce and sensitive data areas.
This is accomplished in hardware, with not only protection
against out of parameter operation of the device, but
hardware memory management to protect against software
security attacks. The CPU clock is derived from its own
internal oscillator, so preventing attacks by clock
manipulation, or extrapolating program execution by
monitoring current variations on clock edges.
The need to support the emerging multifunction cards
requires that the device under software control can
download an application and run it when the device is in the
field embedded in a plastic card. This application can be in
the form of a script to be executed by an interpreter or as a
raw binary directly executed by the processor. The device
has to be protected against the downloading of attack
software designed to corrupt or uncover the working or data
contained in the device. Traditionally this has been a
software function, which relies on the total integrity of the
embedded software. The TG360-16B implements the first
level of protection in hardware.
A dynamic memory protection mechanism is relying on a
flexible border between code and data space.
The General Purpose Non Volatile Memory concept allows
reaching ultra low cost implementation of traditional 128KB
EEPROM smart card ICs and more. All your efforts to save
code footprint are optimizing your end product
performances.
Random Number Generator
The on chip random number generator is passing test
based on Fips140-2 criteria, providing a rapid stream of
truly random numbers. This allows use of the random
numbers generated beyond just the provision of numbers
for randomising transmissions or generating keys.
DES/TDES/3KDES and CRC16 Hardware modules
Hardware acceleration of DES / Triple DES and 3 Keys
DES encryption decryption algorithms provide an efficient
way to protect application data and code. It supports ECB
and CBC modes. In addition, CRC16 hardware module
allows the verification of data integrity.
Clocks
TG360-16B has its own internal oscillator this allows the
core of the device to be independent of the external clock.
The processor can also be clocked much faster than the IO
CLK signal. This ensures the elimination of fraudulent
attacks involving frequency jitter and unequal mark space
ratios. The internal clock generator is connected to the core
via a divider that is under the control of the software. This
allows the Operating System writer to control the trade off
between execution speed and power drawn by the device.
Extending battery life in hand help applications where slow
interfaces are involved.
Anti tampering
The TG360-16b has extensive anti tampering provision
including the monitoring of the connection to the device to
ensure that deviations beyond a prescribed criteria result in
the device being closed down before its operating
conditions are violated.
On chip voltage regulators
Several on chip regulators isolate the various elements of
the device from variations and fluctuations in the supply
voltage. This allows elements to be characterised precisely,
as they operate at one fixed voltage, which in turn
maximises the endurance of the device.
Serial interface
TG360-16B offers a unique serial interface compliant with
the ISO 7816-3 specification with several modes
implemented allowing serial connections at 9600 up to
357K bits per second at 3.57MHz. TG360-16B supports T=0
asynchronous half duplex character transmission protocol,
T=1 asynchronous half duplex block transmission and a
proprietary T=14 protocol used for fast loading of Code into
the OTP by the card manufacturer. It handles minimum
guard time requirements between characters specified by
ISO7816-3 specification automatically. TG360-16B is
designed to be compatible with the ISO7816-3 specification
defining the characteristics of Integrated Circuit Cards
commonly referred to as smart cards.
Technology
This product is using superior Flash memory SuperFlash
Technology licensed from SST and SuperFlash is a
registered trademark of SST (Silicon Storage Technology
Inc.).
Copyright 2012, EM Microelectronic-Marin SA
EMTG360_16b-FS.doc, Version 2.0, 6-Feb-12
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TG360_16b
Technical Data
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Supply Operating Volt
Vcc
min
-0.3
Voltage at remaining pin
Vpin
Power dissipation
Ptot
Storage temperature
IccI
DC Characteristics
Parameter
Symbol
typical
Unit
max
6
V
Vss –0.3
Vcc+0.3
V
+60
mW
-40
+125
°C
Limit Values
Operating temperature
TA
min
-25
Supply Voltage Class A, B, C
Vcc
1.62
Supply Current Class B
Supply Current Class C
typical
Unit
max
+85
°C
5.5
V
Icc
6 (Note 1)
mA
Icc
4 (Note 1)
mA
Supply Current idle
IccI
200 (Note 2)
A
Supply Current stopped
IccS
100 (Note 3)
A
Note 1: The supply current refers to external clock frequency of 5 Mhz
0
Note 2: The supply current at 3.3V and a clock frequency of 1 Mhz, at +25 C
o
Note 3: The supply current at 3.3V and +25 C
IO pin:
Parameter
Symbol
Conditions
min
max
Unit
H input voltage
VIH
IIhmax =20A
0.7 * Vcc
Vcc
V
L input voltage
VIL
IIL max =20A
-0.3
0.8
V
H output voltage (Note 1)
VOH
Vcc
V
VOL
IOhmax = +20A
IOlmax = -1mA
0.7 * Vcc
L output voltage
0
0.4
V
Rise Fall Time
tr , tF
CIN = COUT = 30 pF
1
S
Max
Unit
NOTE 1: Assumes 20K Pull up resistor on interface device
Clock (CLK)
Parameter
Symbol
Condition
Min
H output voltage
VOH
IOhmax = +20 A
Vcc-0.7
Vcc
V
L output voltage
VOL
0
0.5
V
Rise Fall Time
tr , tF
IOlmax = -20A
CIN = COUT = 30 pF
Reset(RST)
Parameter
9% CLK
period
Symbol
Condition
Min
Max
Unit
VOH
IOhmax = +20 A
Vcc-0.7
Vcc
V
L output voltage
VOL
tr , tF
IOlmax = -20A
CIN = COUT = 30 pF
0
Rise Fall Time
H output voltage
0.6
V
400
s
EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the Company's
standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property
of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not authorized for use as
components in life support devices or systems
Copyright 2012, EM Microelectronic-Marin SA
EMTG360_16b-FS.doc, Version 2.0, 6-Feb-12
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