Die Datasheet GAP3SHT33-CAL Silicon Carbide Power Schottky Diode VRRM o IF @ 25 C QC = = = 3300 V 0.3 A 20 nC Features • • • • • 3300 V Schottky rectifier 210 °C maximum operating temperature Positive temperature coefficient of VF Fast switching speeds Superior figure of merit QC/IF Die Size = 1.39 mm x 1.39 mm Advantages Applications • Improved circuit efficiency (Lower overall cost) • Significantly reduced switching losses compare to Si PiN diodes • Ease of paralleling devices without thermal runaway • Smaller heat sink requirements • Low reverse recovery current • Low device capacitance • Down Hole Oil Drilling, Geothermal Instrumentation • High Voltage Multipliers • Military Power Supplies Maximum Ratings at Tj = 175 °C, unless otherwise specified Parameter Repetitive peak reverse voltage Continuous forward current RMS forward current Surge non-repetitive forward current, Half Sine Wave Non-repetitive peak forward current I2t value Power dissipation Operating and storage temperature Symbol VRRM IF IF(RMS) IF,SM IF,max ∫i2 dt Ptot Tj , Tstg Conditions Values 3300 0.3 0.35 2 1 10 0.1 89 -55 to 210 TC ≤ 125 °C, RthJC = 1.69 TC ≤ 125 °C, RthJC = 1.69 TC = 25 °C, tP = 10 ms TC = 125 °C, tP = 10 ms TC = 25 °C, tP = 10 µs TC = 25 °C, tP = 10 ms TC = 25 °C, RthJC = 1.69 Unit V A A A A A2S W °C Electrical Characteristics at Tj = 175 °C, unless otherwise specified Parameter Symbol Diode forward voltage VF Reverse current IR Total capacitive charge QC Switching time Total capacitance Feb 2015 ts C Conditions IF = 0.3 A, Tj = 25 °C IF = 0.3 A, Tj = 175 °C VR = 3300 V, Tj = 25 °C VR = 3300 V, Tj = 175 °C IF ≤ IF,MAX VR = 1500 V dIF/dt = 35 A/μs VR = 1500 V Tj = 175 °C VR = 1 V, f = 1 MHz, Tj = 25 °C VR = 400 V, f = 1 MHz, Tj = 25 °C VR = 1000 V, f = 1 MHz, Tj = 25 °C min. Values typ. 1.7 4.0 1 10 20 < 60 42 8 7 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ max. 2.2 5.0 10 100 Unit V µA nC ns pF Pg1 of 4 Die Datasheet GAP3SHT33-CAL Figures: Figure 1: Typical Forward Characteristics Figure 2: Typical Reverse Characteristics Figure 3: Typical Junction Capacitance vs Reverse Voltage Characteristics Figure 4: Typical Capacitive Energy vs Reverse Voltage Characteristics Feb 2015 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg2 of 4 Die Datasheet GAP3SHT33-CAL Mechanical Parameters Die Dimensions 1.39 x 1.39 Anode pad size 0.75 x 0.75 Die Area total / active mm2 1.93/0.56 Die Thickness 360 µm Wafer Size 100 mm Flat Position 0 deg Die Frontside Passivation Polyimide Anode Pad Metallization 4000 nm Al Backside Cathode Metallization 400 nm Ni + 200 nm Au Die Attach Electrically conductive glue or solder Wire Bond Al ≤ 130 µm Reject ink dot size Φ ≥ 0.3 mm Store in original container, in dry nitrogen, Recommended storage environment < 6 months at an ambient temperature of 23 °C Chip Dimensions: DIE METAL Feb 2015 A [mm] B [mm] C [mm] D [mm] http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ 1.39 1.39 0.75 0.75 Pg3 of 4 Die Datasheet GAP3SHT33-CAL Revision History Date 2015/0212 Revision 2 Comments Inserted Mechanical Parameters 2014/12/19 2013/09/09 1 0 Updated Electrical Characteristics Initial Release Supersedes Published by GeneSiC Semiconductor, Inc. 43670 Trade Center Place Suite 155 Dulles, VA 20166 GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice. GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any intellectual property rights is granted by this document. Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal injury and/or property damage. Feb 2015 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg4 of 4 Die Datasheet GAP3SHT33-CAL SPICE Model Parameters This is a secure document. Please copy this code from the SPICE model PDF file on our website (http://www.genesicsemi.com/images/hit_sic/baredie/schottky/GAP3SHT33-CAL_SPICE.pdf) into LTSPICE (version 4) software for simulation of the GAP3SHT33-CAL. * MODEL OF GeneSiC Semiconductor Inc. * * $Revision: 1.0 $ * $Date: 04-SEP-2013 $ * * GeneSiC Semiconductor Inc. * 43670 Trade Center Place Ste. 155 * Dulles, VA 20166 * * COPYRIGHT (C) 2013 GeneSiC Semiconductor Inc. * ALL RIGHTS RESERVED * * These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY * OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED * TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE." * Models accurate up to 2 times rated drain current. * * Start of GAP3SHT33-CAL SPICE Model * .SUBCKT GAP3SHT33 ANODE KATHODE R1 ANODE INT R=((TEMP-24)*0.0535); Temperature Dependant Resistor D1 INT KATHODE GAP3SHT33_25C; Call the 25C Diode Model D2 ANODE KATHODE GAP3SHT33_PIN; Call the PiN Diode Model .MODEL GAP3SHT33_25C D + IS 1.39E-14 RS 2.88 + N 1.0120127 IKF 36.05007504 + EG 1.2 XTI -3 + CJO 6.01E-11 VJ 0.924257443 + M 0.3084545 FC 0.5 + TT 1.00E-10 BV 3300 + IBV 1.00E-03 VPK 3300 + IAVE 3.00E-01 TYPE SiC_Schottky + MFG GeneSiC_Semiconductor .MODEL GAP3SHT33_PIN D + IS 178.99E-18 RS 15 + N 5 EG 3.23 + XTI 50 FC 0.5 + TT 0 BV 3300 + IBV 1.00E-03 VPK 3300 + IAVE 3.00E-01 TYPE SiC_PiN .ENDS * End of GAP3SHT33-CAL SPICE Model Sep 2013 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Pg1 of 1