Die Datasheet GA01PNS100-CAU Silicon Carbide PiN Diode Chip VRRM IF @ 25 oC QC = = = 10000 V 2A 5 nC Features 10 kV blocking 210 °C operating temperature Fast turn off characteristics Soft reverse recovery characteristics Ultra-Fast high temperature switching Die Size = 2.4 mm x 2.4 mm Advantages Applications Industry’s lowest conduction losses Reduced stacking Reduced system complexity/Increased reliability Voltage Multiplier Ignition/Trigger Circuits Oil/Downhole Lighting Defense Maximum Ratings at Tj = 210 °C, unless otherwise specified Parameter Repetitive peak reverse voltage Continuous forward current RMS forward current Operating and storage temperature Symbol VRRM IF IF(RMS) Tj , Tstg Conditions Values 10 2 1 -55 to 210 TC ≤ 150 °C TC ≤ 150 °C Unit kV A A °C Electrical Characteristics at Tj = 210 °C, unless otherwise specified Parameter Symbol Diode forward voltage VF Reverse current IR Total reverse recovery charge Qrr Switching time ts Total capacitance C Total capacitive charge QC Feb 2015 Conditions IF = 2 A, Tj = 25 °C IF = 2 A, Tj = 210 °C VR = 10 kV, Tj = 25 °C VR = 10 kV, Tj = 210 °C VR = 1000 V IF ≤ IF,MAX IF = 1.5 A dIF/dt = 70 A/μs VR = 1000 V Tj = 210 °C IF = 1.5 A VR = 1 V, f = 1 MHz, Tj = 25 °C VR = 400 V, f = 1 MHz, Tj = 25 °C VR = 1000 V, f = 1 MHz, Tj = 25 °C VR = 1000 V, f = 1 MHz, Tj = 25 °C min. Values typ. 4.4 4.1 0.1 max. 4.8 4.5 3 50 Unit V µA 558 nC < 236 ns http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ 20 5 4 5 pF nC Page 1 of 5 Die Datasheet GA01PNS100-CAU Figures: Figure 1: Typical Forward Characteristics Figure 2: Typical Reverse Characteristics Figure 3: Typical Junction Capacitance vs Reverse Voltage Characteristics Figure 4: Typical Turn Off Characteristics at Ik = 0.5 A and VR = 1000 V Figure 5: Typical Turn Off Characteristics at Tj = 210 °C and VR = 1000 V Figure 6: Reverse Recovery Charge vs Cathode Current Feb 2015 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Page 2 of 5 Die Datasheet GA01PNS100-CAU Figure 7: Reverse Recovery Time vs Cathode Current Feb 2015 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Page 3 of 5 Die Datasheet GA01PNS100-CAU Mechanical Parameters 2 Die Dimensions 2.4 x 2.4 mm Anode pad size Φ 0.98 mm Area total / active 5.76/0.75 mm Die Thickness 450 µm Wafer Size 76.2 mm 0 deg Flat Position Die Frontside Passivation Polyimide Anode Pad Metallization 400 nm Ni + 200 nm Au Backside Cathode Metallization 400 nm Ni + 200 nm Au Die Attach Electrically conductive glue or solder Wire Bond Au ≤ 26 µm Reject ink dot size Φ ≥ 0.3 mm Recommended storage environment 2 Store in original container, in dry nitrogen, < 6 months at an ambient temperature of 23 °C Chip Dimensions: DIE METAL Feb 2015 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ A [mm] B [mm] C [mm] 2.4 2.4 0.98 Page 4 of 5 Die Datasheet GA01PNS100-CAU Revision History Date Revision Comments 2015/02/24 1 Inserted Mechanical Parameters 2012/08/15 0 Initial release Supersedes Published by GeneSiC Semiconductor, Inc. 43670 Trade Center Place Suite 155 Dulles, VA 20166 GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice. GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any intellectual property rights is granted by this document. Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal injury and/or property damage. Feb 2015 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Page 5 of 5 Die Datasheet GA01PNS100-CAU SPICE Model Parameters This is a secure document. Please copy this code from the SPICE model PDF file on our website (http://www.genesicsemi.com/images/hit_sic/baredie/pin/GA01PNS100-CAU_SPICE.pdf) into LTSPICE (version 4) software for simulation of the GA01PNS100-CAU device. * MODEL OF GeneSiC Semiconductor Inc. * * $Revision: 1.0 $ * $Date: 05-SEP-2013 $ * * GeneSiC Semiconductor Inc. * 43670 Trade Center Place Ste. 155 * Dulles, VA 20166 * http://www.genesicsemi.com/index.php/hit-sic/baredie * * COPYRIGHT (C) 2013 GeneSiC Semiconductor Inc. * ALL RIGHTS RESERVED * * These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY * OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED * TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE." * Models accurate up to 2 times rated drain current. * * Start of GA01PNS100-CAU SPICE Model * .MODEL GA01PNS100 D + IS 1.00E-25 + RS 0.49 + N 2.1612 + IKF 0.043903 + EG 3.23 + XTI 10 + TRS1 -0.00155 + CJO 2.28E-11 + VJ 2.304 + M 0.376 + FC 0.5 + BV 11000 + IBV 1.00E-03 + VPK 10000 + IAVE 1 + TYPE SiC_PiN + MFG GeneSiC_Semi * * End of GA01PNS100-CAU SPICE Model Sep 2013 http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/ Page 1 of 1