Evaluation Board Schematic

1
2
3
4
5
6
Q3
2
1
PB7
SOT23
3
GND
U3
2
PA2
3
VBRD
C37
10nF
4
PA3
PA0
PA1
PA2
0_REF
VBRD
VBRD
PA3
NWP
A
PA1
7
C7 VBRD
6
VBRD
5
R5
DNI
R19
100ohm
PKG_8L_SOP
GND
PA5
8
NRESET
6
JCLK
4
PC3
2
PC2
PA5
PA4
NRESET
PC4
JCLK
GND
PC3
PC0
PC2
VBRD
9
7
V_FILTER
1 ohm
100nF
VDD_CORE_1V2
C6
GND
10
C8
R2
GND
PA4
2.2uF GND
VDDA_1V8
GND 1uF
PC7
PC4
3
1
PC6
R13
0 ohm
5
PC0
2
PA0
8
1
1
748 893 0245
AT3
A
R12
0 ohm
C19
GND
GND DNI
VBRD
J1
Y2
ABS07-32.768KHz-T(DNI)
C5 VBRD
1
L22
1.8nH
2
PB0
GND 100nF
C9
PC6
C10
C52
R4
R6
DNI DNI
22pFGND
PC1
PB0
GND 33pF
GND DNI
PA1 PA0 PB4 PB3 PA7
DS2
YELLOW
DS1
RED
2
VDDA_1V8
1
C12
OSCB
GND
ANT1
GND
GND
GND
2
1
ANT2
GND
ANT1
15
14
13
GND
3
GND
C53
1uF
VBRD (0402)
4
OSCB
1
Y1
NC
OSCB
24 MHz
OSCA
NC
3
GND DNI
OSCA
L21
1.8nH
2
C
C21
GND DNI
C1
VG1
10nFGND
VDD_CORE_1V2
PA6
PB5
PB6
PB7
QFN-48_VIA_GRID
A via grid array of nine vias spaced 1.6256mm apart is required
to be placed centered under the Ember QFN-48 IC package
to provide adequate gounding and thermal continuity
EM357 -GPIO
PBO
PC5
Jumper to either PBO or GND
PC1
Jumper to either PC6 or GND
PC0
R1
VDDA_1V8
R3
100ohm
VDD_MEM
10 ohm
GND
748 893 0245
AT4
PC1
5
GND
C17
8.0 pF GND
VDDA_1V8
R7
510 ohm
6
4
GND
C13
PA7
J13
MM8130-2600
GND
27pF GND
R8
510 ohm
GND
1
20
23
21
N/C
ANTSEL
VCCLNA
GND
GND
GND
OSCA 27pFGND
RFP
16
3
GND
C14
10nF
VDDA_1V8
C11
GND
RFn
GND GND
4
6
2
RF_P
7
CT
GND
RF_N
GND
GND
ANT2
N/C
4
3
L10
3.0nH
GND
GND
8
GND
CE
U5
RFFM6201
19
GND
18
GND
17
12
5
6
5
VBRD
GND
4
C15
8.0 pF
GND
11
RF_TX_ALT_P
3
VCC_PA
6
GND
2
10
PB0
GND
DNI
RF_TX_ALT_N
L9
7
GND
C_LNA
VDDA_1V8
GND
9
8
1
B
GND
1
48
C18
8.0 pF
C_Rx_Tx
VDDA_1V8
GND
J12
MM8130-2600
5
22
PC5
8.0 pF
PC5
C20
10nF
C3
100nF
DNI
VCC_DIG
11
10
GND
GND
R15
0 ohm
24
C16
10nF
NRESET
OSCA
VDD_24MHZ
OSCB
VDD_SYNTH
VDD_VCO
47
46
VDD_PRE
45
PB0
44
PC4
VDD_CORE_1
RF_P
PB5
RF_N
PC3
PB6
PC2
12
R16
9
13
PC7
PC6
15
14
VREG_OUT
17
18
16
VDD_PADS_0
VDD_CORE_0
19
PB3
PA7
21
22
20
PB4
PA0
VDD_RF
43
36
RF_TX_ALT_P
42
PB0
35
PB2
PB7
PB5
GND
PB6
PB7
PC0
PC1
PB0
PC4
PC3
PC2
JCLK
34
RF_TX_ALT_N
JTCK
VBRD
VDDA_1V8
2
P11
P10
PC4
VBRD
GND
33
PB1
37
33
32
31
30
29
28
27
26
25
24
23
22
21
20
32
VDD_IF
41
PC3
31
NC
PA6
PC0
PC2
30
PC5
VDD_PADS_2
VDD_MEM
JCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND
C
PB2
LINK
PA4
GND
PA5
PA6
PB1
PB2
GND
29
VDDA_1V8
C27
VDD_PADSA
40
PB1
ACTIVITY
PC5
PC6
PC7
PA7
PB3
NRESET
PB4
PA0
PA1
PA2
PA3
GND
PA6
U1
NRESET
PA5
39
C4
100nF
PA4
PC1
28
VBRD
P10
P11
EM35X_RCM_INTERFACE
27
VDD_PADS_3
PA5
26
PA3
38
PA4
25
PA1
PA2
B
PA3
VDD_PADS_1
24
R10
DNI
23
PA2
R9
0 ohm
C2
0.47uF
FM6201-CTRL-Pin#
CE- pin2
C_RX_TX- pin24
LNA_EN- pin23
C_ANT1- pin21
C_ANT2- pin20
GND
1
2
3
4
5
6
7
8
9
GND
GND
VG2
QFN-24_VIA_GRID
A via grid array of twenty five vias spaced 0.635mm apart is required
to be placed centered under the RFMD QFN-24 IC package
to provide adequate gounding and thermal continuity
D
D
FID1
FAMILY P/N:
RFFM6201
TITLE:
FID
RF6201EM357 EVAL SCHEM
7628 Thorndike Road
Greensboro, NC 27409
Phone: 336−664−1233
DATE:
04/30/13
1
2
3
4
5
DRAWN BY:
RFMD
PCB PART NUMBER:
FM6201-411
REV:
DOC NO:
FM6201-401
SIZE:
6
C
PAGE:
1 of 1
A