HSB276S Silicon Schottky Barrier Diode for Detector and Mixer REJ03G0133-0100Z (Previous: ADE-208-780) Rev.1.00 Nov.10.2003 Features • High forward current, Low capacitance. • HSB276S which is interconnected in series configuration is designed for balanced mixer use. • CMPAK package is suitable for high density surface mounting and high speed assembly. Ordering Information Type No. Laser Mark Package Code HSB276S C2 CMPAK Pin Arrangement 3 2 1 (Top View) Rev.1.00, Nov.10.2003, page 1 of 4 1. Cathode 2 2. Anode 1 3. Cathode 1 Anode 2 HSB276S Absolute Maximum Ratings (Ta = 25°C) Item Symbol Value Unit Reverse voltage VR 3 V 30 mA *1 Average rectified current IO Junction temperature Tj 125 °C Storage temperature Tstg –55 to +125 °C Note: 1. Per one device Electrical Characteristics *１ (Ta = 25°C) Item Symbol Min Typ Max Unit Test Condition Reverse voltage VR 3 — — V IR = 1 mA Reverse current IR — — 50 µA VR = 0.5 V Forward current IF 35 — — mA VF = 0.5 V Capacitance C — — 0.9 pF VR = 0.5 V, f = 1 MHz Capacitance deviation ∆C — — 0.1 pF VR = 0.5 V, f = 1 MHz — 30 — — V C = 200 pF, R = 0 Ω , Both forward and reverse direction 1 pulse. ESD-Capability Note: *2 1. Per one device 2. Failure criterion ; IR ≥ 100 µA at VR = 0.5 V Rev.1.00, Nov.10.2003, page 2 of 4 HSB276S 10–1 10–2 10–2 10–3 Reverse current IR (A) Forward current IF (A) Main Characteristics 10–3 10–4 10–5 0 0.2 0.4 0.6 0.8 Forward voltage VF (V) 1.0 Fig.1 Forward current vs. Forward voltage f=1MHz Capacitance C (pF) 10 1.0 0.1 0.1 1.0 Reverse voltage VR (V) 10 Fig.3 Capacitance vs. Reverse voltage Rev.1.00, Nov.10.2003, page 3 of 4 10–4 10–5 10–6 0 1.0 2.0 3.0 4.0 Reverse voltage VR (V) 5.0 Fig.2 Reverse current vs. Reverse voltage HSB276S Package Dimensions As of January, 2003 0.1 0.3 +– 0.05 (0.65) (0.65) (0.2) 1.3 ± 0.2 0.9 ± 0.1 0.1 0.3 +– 0.05 + 0.1 0.16 – 0.06 2.1 ± 0.3 0.1 0.3 +– 0.05 (0.425) 1.25 ± 0.1 2.0 ± 0.2 (0.425) Unit: mm 0 – 0.1 Package Code JEDEC JEITA Mass (reference value) Rev.1.00, Nov.10.2003, page 4 of 4 CMPAK — Conforms 0.006 g Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. 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