Preliminary PT4432 1.0A Line Driver DESCRIPTION FEATURES The PT4432 is a power line driver designed to drive the output current, up to 1A, into an isolation transformer or simple coil coupling to the loads. Power supply of PT4432 is a single-sided voltage from 6V to 24V. To work as a two stage amplifier, the 1st stage can be configured as a Variable Gain Amplifier (VGA) with gain range 0dB to 21dB. The 2 nd stage is configured as a unit gain amplifier to provide current driving capability. In addition, PT4432 also include the Under Voltage Lock-Out (UVLO), Over Voltage LockOut (OVLO), Thermal Shut Down (TSD) and Average Current Detection (ACD) function. Supply Voltage: 6V to 24V. Flexible 4th-Order Filtering. Under Voltage Protection Set by RUV Resistor. Over Voltage Protection Set to +24V Internally. Thermal Shutdown at 160oC. Current Sense Amplifier with Sensing Resistor over VCCH/VCC Average Current Collected with CCSA Capacitor. Automatic Gain Control Timing Set by CAGC Capacitor. QFN20 Package with Exposed Thermal Pad. APPLICATIONS Power Line Communication Driver in AMM and AMR Metering System Valve, Actuator, and Motor Driver Audio BLOCK DIAGRAM LVSS LVDD 2 20 0 1 19 9 CAGC 1 18 8 TSD CCSA 1 17 7 1 16 6 EN 1 Current Detection Voltage Detection Temperature Detection 15 RUV VCOM 2 Automatic Gain Control Reference Voltage Reference Current 14 AmpB+ AmpA+ 3 13 AmpB- AmpA- 4 12 VCCH 11 VCC RG1 Current Mirror Rstrip AmpA Out 5 ROUT RG2 Current Sense Amp 6 VEE 7 8 9 1 10 0 VEE AmpB Out AmpB Out VCC Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, No. 233-1, Baociao Rd., Sindian Dist., New Taipei City 23145, Taiwan PT4432 TSD APPLICATION CIRCUIT 3V~5V LVDD CAGC 20 19 LVSS 18 CCSA 17 LVDD CAGC TSD 16 CCSA EN RUV 1 EN RUV 2 VCOM AmpB+ 14 3 AmpA+ AmpB- 13 4 AmpA- VCCH 12 5 AmpA Out VCC 11 15 Cbypass Signal Input PT4432 RINA Cac1 timing calculation ===== rc oscillator period t gain down t_dn=4*t gain up t_up=32*t oneshot duration =2048*t PLC transmission info ===== packet length: 52ms preamble length: 6ms t_oneshot < Preamble 6V~24V VCCH RCSA VEE VEE 6 7 AmpB Out 8 9 VCC 10 VCC R4 Cac3 Cac2 RLOAD R5 BILL OF MATERIALS Part RINA RCSA RUV R4 R5 RLOAD CCSA CAGC Cbypass, Cac1, Cac2 Cac3 PRE1.0 2 Value 10K 1 20K 10K 10K 10 680p 51p Unit Ω Ω Ω Ω Ω Ω F F 100n F 10μ F August 2015 PT4432 ORDER INFORMATION Valid Part Number Package Type Top Code PT4432 20 Pins, QFN PT4432 PIN CONFIGURATION LVSS LVDD CAGC TSD CCSA Exposed Pad 16 17 18 19 20 EN 1 15 RUV VCOM 2 14 AmpB+ AmpA+ 3 13 AmpB- AmpA- 4 12 VCCH AmpA Out 5 11 VCC PT4432 10 9 8 7 6 VEE AmpB Out VCC PIN DESCRIPTION Pin Name EN VCOM AmpA+ Description Pin No. Enable/Shutdown Input (High = Enable) 1 1/2 VCC 2 IN Non Inverting Input of Op Amp A 3 IN IN PWR Inverting Input of Op Amp A 4 AmpA Out OUT Output of Op Amp A 5 VEE GND Ground of Analog Circuit 6, 7 AmpB Out OUT Output of Op Amp B 8, 9 VCC PWR Power Supply of Analog Circuit; Low Input of Current Sense Amplifier(CSA) 10 VCC PWR Power Supply of Analog Circuit 11 VCCH PWR Power Supply of Analog Circuit; High Input of Current Sense Amplifier(CSA) 12 AmpB- IN Inverting Input of Op Amp B 13 AmpB+ IN Non Inverting Input of Op Amp B 14 RUV IN Under Voltage Detector Setting 15 AmpA- PRE1.0 I/O CCSA OUT Capacitor for Averaging the CSA Output Voltage 16 TSD OUT Thermal Shutdown Flag (High to indicate junction Temperature >= 160oC) 17 CAGC OUT Capacitor of the RC Oscillator to Set the AGC Timing 18 LVDD PWR Power Supply of Digital Circuit 19 LVSS GND Ground of Digital Circuit 20 Exposed Pad GND For Thermal Dissipation 21 3 August 2015 PT4432 FUNCTION DESCRIPTION MAXIMUM CURRENT LIMIT The maximum peak output stage current of PT4432 is set to 1A. If the output stage current exceed the set current limit, a feedback signal will be sent to adjust the output stage bias voltage stay below the set current limit value. UNDER VOLTAGE PROTECTION In PT4432, pin RUV with 100KΩ pull-up resistor to VCC. By placing a resistor over RUV to ground, the resistor-divided voltage will be compared to the internal-generated reference voltage. When the voltage over RUV is higher than the reference (1V) voltage, PT4432 will stay in normal operation. When the voltage over RUV is lower than the reference voltage, OpAmp A and OpAmp B will be shut down to prevent the improper operation. OVER VOLTAGE PROTECTION The over voltage protection of PT4432 is set to +24V. If VCC is larger than +24V, OpAmp A/OpAmp B will be shut down and a 25mA current will leak from VCC to ground for preventing the build-up voltage over pin VCC. The build-up voltage is generated from power line interference and it can reach 2 times VCC to lock PT4432 in OVP condition. THERMAL SHUTDOWN When the internal junction temperature approximate 160℃, the PT4432 will shift into shutdown mode to prevent damage. Meanwhile, flag signal over TSD (pin 17) will go into logic High state. When its temperature cools down to approximately 120℃, the PT4431 will shift back into its normal operation mode and the TSD flag signal will go down logic low state. The temperature of hysteresis window is about 40℃. AVERAGE CURRENT DETECTION PT4432 has a build-in CSA (Current Sense Amplifier) resemble MAXIM MAX4173. By placing the sensing resistor over pin VCCH and VCC, the detected current signal is translated to voltage signal and shown over pin CCSA (pin 16). A capacitor is placed over pin CCSA to perform the average function. The averaged signal will be compared with the internal reference voltage (1V) to perform gain control (for details, please refer to section: AUTOMATICAL GAIN CONTROL). If VCCH and VCC is connected together, the CSA and AGC function will be bypassed. AUTOMATICAL GAIN CONTROL PT4432 1st stage amplifier can be configured as a 3-bit PGA(Programmable Gain Amplifier) to adjust its gain automatically with detected current. The feedback resistor between AmpA- and AmpA Out is varied in the range between 10K and 113K. By connecting a 10KΩ resistor externally over pin AmpA-, it can work as an inverting amplifier in 8 stages of gain: 0dB/3dB/6dB/9dB/12dB/15dB/18dB/21dB. When the EN signal is applied from low to high, PT4432 will load with default gain and perform the gain adjustment over a one-shot duration. In the one-shot duration(ONESHOT) a. If average current detection voltage is smaller than 1V, the chip will increase its gain with a timing UP.When it reach to its maximum value, the gain will stop from increasing and remain steady. b. If average current detection voltage is larger than 1V, the chip will reduce its gain with a timing DOWN. .When it reach to its minimum value, the gain will stop from reducing and remain steady. c. PT4432 will stop gain adjustment after the oneshot duration to avoid gain fluctuation during a payload transmission The calculations of ONESHOT/UP/DOWN are as follows, is internal RC oscillator period which controlled by CAGC ONESHOT is oneshot duration = 2048 * , UP is gain up timing = 32 * , DOWN is gain down timing = 4 * PRE1.0 4 August 2015 PT4432 ABSOLUTE MAXIMUM RATINGS VEE = LVSS = 0 V Parameter Symbol VCCH/VCC LVDD Rating 30 6 Unit V V TJ 160 ℃ Operating Temperature Range TOPR –40 to 125 ℃ Storage Temperature Range TSTG –40 to 150 ℃ Soldering Temperature Range TSLD 255 ℃ Soldering Time Range tSLD 10 s Analog Supply Voltage Logic Supply Voltage Maximum Junction Temperature (Operating Range -40oC to 125oC) RECOMMENDED OPERATING CONDITIONS VEE = LVSS = 0 V Parameter Symbol Analog Supply Voltage Logic Supply Voltage VCCH/VCC LVDD Min. 6 3 Operating Temperature TA -40 PRE1.0 5 Rating Typ. 3.3 Max. 24 5 50 125 Unit V V ℃ August 2015 PT4432 ELECTRICAL CHARACTERISTICS Nominal conditions: VCC = 12.0 V, VEE = LVSS = 0 V, LVDD=3.3 V, EN = “High”, TA = +27℃ Parameter Symbol Conditions Min. Typ. Max. Unit Best Operation Condition 8 6 15 12 15 8 24 V Power Supply Analog Supply Voltage VCC Less Performance THD> 5% OVP triggered, IC don’t burn-out Logic Supply Voltage Consumption DC Current Total DC Current (stand-by mode) LVDD ICC Istandby EN = “High” EN = “Low” 24 30 3 15 200 3.3 20 5 24 500 V mA μA +/- 1 -50 0.1 +/- 3 +/-10 -45 1 mV dB nA Vcc-3 70 V dB 75 MHz V/μS 0.35 % 1 1 V V pF 25 -55 1 45 -45 10 mV dB nA 0.1 40 Vcc-3 50 V dB 120 MHz V/μS 0.45 % Input Operational Amplifier (OP Amp A) Offset Voltage Input Offset Voltage Offset vs. Power Supply Input Bias Current Input Voltage Range Common Mode Voltage Range Open Loop Gain Frequency Response Full Power Bandwidth Slew Rate Vos PSRR Ib Vcm RL=500 Ω BW FP SR Total Harmonic Distortion + Noise THD+N Voltage Output Swing from Rail @ 100KHz VOH VOL CLOAD Capacitive Load Drive VCC=12V, VEE=0V VCC=12V, VEE=0V G=5, Vout=9Vpp G=1, RL=50Ω, Vout=8Vpp, f=100KHz, Cin=220μF, Cout=330μF Output RL=500Ω@VCC/2 0 50 0.2 45 60 1 0.1 0.1 0.1 0.3 0.3 100 Output Operational Amplifier (OP Amp B) Offset Voltage Input Offset Voltage Offset vs. Power Supply Input Bias Current Input Voltage Range Common Mode Voltage Range Open Loop Gain Frequency Response Full Power Bandwidth Slew Rate Total Harmonic Distortion + Noise PRE1.0 Vos PSRR Ib VCC=12V, VEE=0V VCC=12V, VEE=0V Vcm RL=5Ω BW FP SR THD+N G=2, Vout=9Vpp G=1, RL=50Ω, Vout=7Vpp, f=100KHz, Cin=220μF, Cout=330μF 6 0.4 70 0.1 1 August 2015 PT4432 Parameter Symbol Conditions Min. Iout=1A to GND 1 1 Typ. Max. Unit 2 2 V V pF 24 V mV V/V Output Voltage Output Swing from Rail @ 100KHz VOH VOL CLOAD Capacitive Load Drive Current Sense Amplifier Common-mode input range VCMR Full-scale sense voltage VSENSE Gain GCSA Detection Circuit Pull-up Resistor at pin RUV RUV Output Resistor at pin CCSA ROUTCSA Feedback Resistor between AmpARFPGA /AmpA Out PRE1.0 500 6 VSENSE = VCCH - VCC Refer to VCC CCSA to VEE 7 500 7 40K 55K Ω Ω 10K 113K Ω 100K August 2015 PT4432 PACKAGE INFORMATION 20 Pins, QFN Symbol A A1 A3 b D E e D2 E2 L Dimensions Nom. 0.85 0.02 0.203 REF. 0.25 4.00 BSC. 4.00 BSC. 0.50 BSC. 2.50 2.50 0.45 Min. 0.80 0.00 0.20 2.40 2.40 0.35 Max. 0.90 0.05 0.30 2.55 2.55 0.55 Notes: 1. Refer to JEDEC MO-220VGGD-1 2. Unit: mm PRE1.0 8 August 2015 PT4432 APPENDIX A: EVALUATION BOARD INFORMATION Schematic Notice: Place 0Ω resistor over VCCH/VCC to stop the ACD and AGC function PCB Layout(not scaled) PRE1.0 9 August 2015 PT4432 Bill of Materials PRE1.0 Component Value Unit Component Value Unit R1 10k Ω C1 100 F R2 - Ω C2 - F R3 10k Ω C3 - F R4 10k Ω C4 - F R5 - Ω C5 - F R6 1.1 Ω C6 20p F R7 - Ω C7 100n F R8 - Ω C8 100n F R9 10k Ω C9 10μ F R10 - Ω C10 - F R11 0 Ω C11 - F R12 0 Ω C12 100n F R13 - Ω C13 100n F R14 0 Ω C14 100n F R15 - Ω C15 - F R16 - Ω C16 - F R17 0 Ω C17 - F R18 0 Ω C18 4.7μ F R19 - Ω C19 - F R20 - Ω C20 51p F R21 - Ω C21 2700p F R22 - Ω D1 - Diode R23 - Ω D2 - Diode R24 - Ω D3 - TVS R25 0 Ω L1 0 H R26 0 Ω R27 1k Ω R28 - Ω R29 - Ω 10 August 2015 PT4432 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw PRE1.0 11 August 2015