AN825 Vishay Siliconix The Solderability of the PowerPAKr SO-8 and PowerPAK 1212-8 When Using Different Solder Pastes and Profiles Jess Brown and Kandarp Pandya INTRODUCTION Next-generation PowerPAK packages from Vishay Siliconix feature very low thermal resistances, enabling higher power dissipation with the added benefit of reduced board space and increased available die area. With any new MOSFET packaging technology, concerns about manufacturability will arise, in particular with respect to yield figures, failure rates, solderability, short circuits caused by solder bridging, and drifting of the part during the mounting process. These concerns often relate to the solder profile, the pin layout, and the size of the package. However, in the case of the PowerPAK, the three major concerns are the shift in the position of the part during manufacturing, the possibility of solder bridging across the small pads and large pads, and the possibility of solder voids. To a certain extent, the first two issues can be resolved through visual inspection. The presence of voids, however, cannot be determined visually due to the nature of the package. As a result, the possible presence of solder voids is the greatest concern for manufacturers using the product. PowerPAK SO−8 Single PowerPAK SO−8 Dual a) SO-8 PCB PowerPAK SO−8 Single PowerPAK SO−8 Dual Size: 6.1x 5.1mm Pitch: 1.27mm Plating:SnPb b) SO-8 Packages The aim of this application note is to alleviate concerns about the use of these packages by illustrating through practical experimentation the solder joint quality and the voiding of several solder pastes when used with the PowerPAK SO-8 and PowerPAK 1212-8 packages. PACKAGE TYPES Four types of packages were chosen for investigation: the PowerPAK SO-8 single, the PowerPAK SO-8 dual, the PowerPAK 1212-8 single and the PowerPAK 1212-8 dual. The recommended landing patterns were used as described in Application Note AN826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286). Two separate boards, with an HASL surface finish, were built for the PowerPAK SO-8 and the PowerPAK 1212-8, with each board consisting of ten single devices and five dual devices are shown in Figure 1. Examples of the devices used for solderability study are also shown in Figure 1. PowerPAK 1212 Single PowerPAK 1212 Dual c) 1212-8 PCB PowerPAK 1212 Single PowerPAK 1212 Dual Size: 3.3x 3.3mm Pitch: 0.65mm Plating: SnPb d) 1212-8 Packages FIGURE 1. PowerPAK PCBs and Packages Used in the Investigations Document Number: 72116 15-Dec-03 www.vishay.com 1 AN825 Vishay Siliconix a) Dek Horizon Printer b) Siemens F5 SMT Machine c) Heller 1800EXL Oven d) Optek X-Ray Inspection System FIGURE 2. Equipment Used for Solder Tests PLACEMENT, SOLDERING, HEATING AND INSPECTION EQUIPMENT The pick-and-place machine used was a Siemens F5 (Figure 2), configured with a six-nozzle collect-and-place head with a DCA vision module. The placement pressure was 2N (204 grams) with placement accuracy of 45 microns, and the components were picked from tape-and-reel. The stencil printing was achieved with a Dek Horizon printer (Figure 3) at 4-mil thickness, laser-cut 29 in. by 29 in. The print pressure was 10 kg front and rear, and the print speed was 20 mm/s front and rear. The oven reflow was a Heller 1800EXL oven with nine heating and two cooling zones. The solder and void inspections were achieved using an Optek X-ray machine. SOLDER PASTES Several solder paste types, including lead-free, water-soluble, and no-clean, were used. Details are provided in Table 1. TABLE 1 Details Of Solder Pastes Used In The Investigations Cat.# Type Data In Appendix Manufacturer UP78 No Clean Ultraprint 1 Omnix 5000 No Clean Alpha-Fry Corp. 2 NC-SMQ92J No Clean Indium Corp. 3 TLF-206-19 Lead Free Tamura, Japan 4 NC73 No Clean Loctite (Multicore) 5 RP15 No Clean Loctite (Multicore) 6 WS22 Water Soluble Loctite (Multicore) 7 CR39 Lead Free Loctite (Multicore) 8 CR36 No Clean Loctite (Multicore) 9 MP200 No Clean Loctite (Multicore) 10 SOLDER PROFILE To account for these different solders, three different oven profiles were required. These can be found in Figures 3, 4, and 5. Zone Upper _C Lower _C entrance 0 0 Z1 210 210 Z2 130 130 Z3 155 155 Z4 180 180 Z5 180 180 Z6 180 180 Z7 205 205 Z8 240 240 Z9 255 255 cool 0 0 FIGURE 3. Oven Profile for CR39 and TLF-206-19 Solders www.vishay.com 2 Document Number: 72116 15-Dec-03 AN825 Vishay Siliconix Zone Upper _C Lower _C entrance 0 0 Z1 240 240 Z2 175 175 Z3 170 170 Z4 155 155 Z5 155 155 Z6 155 155 Z7 155 155 Z8 230 230 Z9 250 250 cool 0 0 FIGURE 4. Oven Profile For RP15 Solder Zone Upper _C Lower _C Z1 240 240 Z2 150 150 Z3 150 150 Z4 160 160 Z5 170 170 Z6 180 180 Z7 190 190 Z8 240 240 Z9 250 250 FIGURE 5. Oven profile for UP78, Omnix 5000, NC-SMQ92J, NC73, and WS22 STENCILS Examples of the design stencils used in the investigation of the PowerPAK SO-8 and 1212-8 are shown in Figure 6 and Figure 7, respectively. INVESTIGATIONS INTO PACKAGE SHIFTING AND POSSIBLE SOLDER BRIDGING The basic layout of the PowerPAK packages consists of small leads with a fine pitch located on one side of the device and a large lead on the other side of the package. This means that Document Number: 72116 15-Dec-03 the lead frame is asymmetrical, resulting in two dissimilar metal masses, which could cause the device to move during mounting and soldering due to the different tensions exerted by the different metal masses. This is because the surface tension resulting from a large quantity of molten solder under the large leads and pads can produce a lateral shift of the part, possibly causing an electrical short circuit. This lateral shift and the packages’ lead frame design could cause solder bridging between the small and the large leads of the device, and the solder pads on the PC board, and also between the solder pads themselves. www.vishay.com 3 AN825 Vishay Siliconix FIGURE 6. Stencil for PowerPAK SO-8 Therefore, the PowerPAK devices were examined for solder bridging in three areas: between two consecutive leads, lead-to-pad, and pad-to-pad. The manufacture was achieved using the recommended pad patterns, described earlier, with a stencil controlling the thickness and its openings. The operating pressure for the squeegee and pick-and-place machine was selected to ensure that an adequate amount of solder paste was spread under the part. PowerPAK SO-8 Figure 8 shows first the shifting of the part to the left during placement (b and c), and then the self-alignment of the part after reflow (d and e). The X-ray (c) shows the shift of the lead frame with respect to the pads and solder paste. The X-ray of the part after reflow (e) shows that the part has self-aligned to the pads and that there are no short circuits due to solder bridging. It also shows the solder spreading is limited to the pad size. This is confirmed by the Metcal APR 5000 visual inspection shown in Figure 8 (f). PowerPAK 1212-8 Figure 9 shows the photographs and X-rays of the 1212-8 package during placement and reflow. Figure 9 (b and c) show that the part has shifted during placement, and the X-ray shows potential solder bridging concerns. However, during the reflow process, the part realigns itself (d and e) to the pads, and as such the solder spreading is again limited to the pads. This is confirmed by the optical visual inspection, where the gap between the two drain pads and pins 2 and 3 can be seen. www.vishay.com 4 FIGURE 7. Stencil for PowerPAK 1212-8 This investigation has shown that the PowerPAK SO-8 and PowerPAK 1212-8 packages are suitable for SMD assembly using industry-standard reflow procedures and processes. The results show that there are no solder bridges on the fine-pitch gaps between consecutive leads, or even from lead-to-pad or pad-to-pad. The results also show no electrical shorts as the part self-aligns on the pad pattern. The way to achieve this result is to use the recommended pad patterns and solder mask. SOLDER VOIDS One of the issues with the PowerPAK package is the lack of visibility of the solder joint between the printed circuit board and the leads of the package, and also the lack of visibility of any possible solder voids in larger pin-pad solder joints. The reason for these voids could be due to the large lead and pads, which have a high metal mass and use a large amount of molten solder. The latter can entrap hot air and gases from the solder paste, resulting in solder voids. Therefore, to ensure that the PowerPAK device performs well in terms of solderability, the investigation included the use of several solder pastes in mounting the PowerPAK devices. The results are provided below. A variety of solder pastes were used to determine solder paste suitability. These pastes included no-clean, water-soluble, and lead-free pastes from a number of different manufacturers, including Ultraprint, Alpha, Indium, Tamura and Loctite. Through the joint expertise of a solder manufacturer (Loctite) and a contract manufacturer (Flextronics), the reflow profile was modified to minimize voids. Document Number: 72116 15-Dec-03 AN825 Vishay Siliconix a) Solder Paste Application d) Part Placement After Reflow b) Part Placement c) X-Ray of Part Placement e) X-Ray After Reflow f) Optical Visual Inspection FIGURE 8. Example Of The Lateral Shift and Then Self-Centering and Realignment Of The PowerPAK SO-8 a) Solder Paste Application d) Part Placement After Reflow b) Part Placement e) X-Ray After Reflow c) X-Ray of Part Placement f) Optical Visual Inspection FIGURE 9. Example Of The Lateral Shift and Then Self-Centering and Realignment Of The 1212-8 PowerPAK Document Number: 72116 15-Dec-03 www.vishay.com 5 AN825 Vishay Siliconix UP-78 SOLDER PASTE Figures 10 shows the solder voids using UP-78 solder paste. The worst-Case parts showed voids of greater than 30%. An improved solder profile, Figure 11, showed improvements, but a) Best-Case (<20%) b) Worst-Case (>30%) Single PowerPAK SO-8 the voiding for this solder paste is still classified as between 20% and 50%. c) Best-Case (<20%) d) Worst-Case (>30%) Dual PowerPAK SO-8 FIGURE 10. Solder Voids For UP-78 Solder Paste Using Initial Oven Profile a) Voids: <20% Single PowerPAK SO-8 b) Voids: <20% Dual PowerPAK SO-8 c) Voids: <20% Single PowerPAK 1212 d) Voids: <20% Dual PowerPAK 1212 FIGURE 11. Solder Voids For UP-78 Solder Paste Using Improved Oven Profile www.vishay.com 6 Document Number: 72116 15-Dec-03 AN825 Vishay Siliconix OMNIX 5000 SOLDER PASTE The Omnix solder paste performed very well. The solder voids are shown in Figures 12 and 13 for the PowerPAK SO-8 and a) Best-Case b) Worst-Case Single PowerPAK SO-8 Voids: 10% - 20% 1212-8 respectively. The maximum voids in this case were classified as less than 20%. c) Best-Case d) Worst-Case Dual PowerPAK SO-8 Voids: 10% - 20% FIGURE 12. Solder Voids For Omnix 5000 Solder Paste a) Best-Case b) Worst-Case Single PowerPAK 1212-8 Voids: 10% - 20% c) Best-Case d) Worst-Case Dual PowerPAK 1212-8 Voids: 10% - 20% FIGURE 13. Solder Voids For Omnix 500 Solder Paste Document Number: 72116 15-Dec-03 www.vishay.com 7 AN825 Vishay Siliconix INDIUM SOLDER PASTE The Indium solder paste was also a success, with all the boards having voids of less than 20%, as shown in Figures 14 and 15. a) Best-Case b) Worst-Case Single PowerPAK SO-8 Voids: 10% - 20% c) Best-Case d) Worst-Case Dual PowerPAK SO-8 Voids: 10% - 20% FIGURE 14. Solder Voids For Indium Solder Paste a) Best-Case b) Worst-Case Single PowerPAK 1212-8 Voids: 10% - 20% c) Best-Case d) Worst-Case Dual PowerPAK 1212-8 Voids: 10% - 20% FIGURE 15. Solder Voids For Indium Solder Paste www.vishay.com 8 Document Number: 72116 15-Dec-03 AN825 Vishay Siliconix TAMURA SOLDER PASTE Tamura solder paste did not perform as well as some of the other solder pastes under the reflow conditions specified. As a) Best-Case b) Worst-Case Single PowerPAK SO-8 Voids: 10% - 20% such, the Tamura solder paste was classified as having 20% to 50% voiding, as shown in Figures 16 and 17. c) Best-Case d) Worst-Case Dual PowerPAK SO-8 Voids: 10% - 20% FIGURE 16. Solder Voids For Tamura Solder Paste a) Best-Case b) Worst-Case Single PowerPAK 1212-8 Voids: 10% - 20% c) Best-Case d) Worst-Case Dual PowerPAK 1212-8 Voids: 10% - 20% FIGURE 17. Solder Voids For Tamura Solder Paste Document Number: 72116 15-Dec-03 www.vishay.com 9 AN825 Vishay Siliconix NC-73 SOLDER PASTE The NC-73 solder paste did not perform very well, as shown in Figures 18 and 19, with the majority of parts having a greater than 40% voiding. The PowerPAK SO-8 devices were a) Best-Case voids <20% (very few) b) Worst-Case >40% (majority) classified as having a greater than 50% void, whereas the PowerPAK 1212-8 devices were classified as having a void of 20% to 50%. c) Best-Case voids <20% (very few) Single PowerPAK SO−8 d) Worst-Case >40% (majority) Dual PowerPAK SO−8 FIGURE 18. Solder Voids For NC-73 Solder Paste a) Best-Case voids <20% (very few) b) Worst-Case >40% (majority) c) Best-Case voids <20% (very few) Single PowerPAK 1212-8 d) Worst-Case >40% (majority) Dual PowerPAK 1212 FIGURE 19. Solder Voids For NC-73 Solder Paste www.vishay.com 10 Document Number: 72116 15-Dec-03 AN825 Vishay Siliconix RP−15 SOLDER PASTE The RP-15 solder paste resulted in a high percentage of voiding, even with a suggested low voiding oven profile (Figure 20). As with the NC-73 solder paste, the voiding for the PowerPAK SO-8 was classified as being greater than 50%, whereas the PowerPAK 1212-8 MOSFETs had a 20% to 50% voiding level. See Figures 21 and 22. 250 Temp (Deg C) 200 150 100 50 0 0 50 100 150 Time (s) 200 250 300 FIGURE 20. Suggested Improved Low Voiding Oven Profile for RP15 a) Best-Case Voids b) Worst-Case Single PowerPAK SO-8 Voids: 50% c) Best-Case Voids d) Worst-Case Dual PowerPAK SO-8 Voids: 50% FIGURE 21. Solder Voids For RP-15 Solder Paste a) Best-Case Voids b) Worst-Case Single PowerPAK 1212-8 Voids: 20% -50% c) Best-Case Voids d) Worst-Case Dual PowerPAK 1212-8 Voids: 20% -50% FIGURE 22. Solder Voids For RP-15 Solder Paste Document Number: 72116 15-Dec-03 www.vishay.com 11 AN825 Vishay Siliconix WS-22 SOLDER PASTE The WS-22 solder paste resulted in successful placement of both the PowerPAK SO-8 and 1212-8. The voiding level was a) Best-Case Voids b) Worst-Case Single PowerPAK SO-8 Voids: 10-20% very good and classified as being 10% to 20%, as shown in Figures 23 and 24. c) Best-Case Voids d) Worst-Case Dual PowerPAK SO-8 Voids: 10-20% FIGURE 23. Solder Voids For WS-22 Solder Paste a) Best-Case Voids b) Worst-Case Single PowerPAK 1212-8 Voids: 10% - 20% c) Best-Case Voids d) Worst-Case Dual PowerPAK 1212-8 Voids: 10% - 20% FIGURE 24. Solder Voids For WS-22 Solder Paste www.vishay.com 12 Document Number: 72116 15-Dec-03 AN825 Vishay Siliconix CR-39 SOLDER PASTE CR-39 solder paste exhibited void levels for the PowerPAK 1212-8 of greater than 50% (Figure 26), whereas a) Best-Case Voids b) Worst-Case Single PowerPAK SO-8 Voids: 20% - 50% the PowerPAK SO-8 parts had voiding levels of 20 to 50% (Figure 25). c) Best-Case Voids d) Worst-Case Dual PowerPAK SO-8 voids 20% - 50% FIGURE 25. Solder Voids For CR-39 Solder Paste a) Best-Case Voids b) Worst-Case Single PowerPAK 1212-8 Voids: >50% c) Best-Case Voids d) Worst-Case Dual PowerPAK 1212-8 Voids: >50% FIGURE 26. Solder Voids For CR-39 Solder Paste Document Number: 72116 15-Dec-03 www.vishay.com 13 AN825 Vishay Siliconix A summary of all the solder paste void tests is given in Table 2, which shows results for single and dual versions of the PowerPAK SO-8 and PowerPAK 1212-8. Four boards of each package type were evaluated for each variety of solder paste. Each PC board contained five single-channel and five dual-channel devices. TABLE 2 Summary of Solder Paste Voids UP78 1 X X (no clean) 2 X X 3 X X 4 X 50+% 20−50% Voids PK1212-8 10−20% 50+% Board # 20−50% Solder Paste 10−20% Voids PKSO-8 1 X X (no clean) 2 X X 3 X X 4 X X Indium 1 X X (no clean) 2 X X 3 X X 4 X X 1 X X (no clean) 2 X X 3 X X 4 X X 1 X X (no clean) 2 X X 3 X X 4 X 1 X X (no clean) 2 X X 3 X X 4 X X Loctite CR39 1 X X (Lead−free) 2 X X 3 X X 4 X X 1 (Lead−free) 2 www.vishay.com 14 X X X The pick-and-place machine caused spreading of the solder paste before reflow, which in turn reduced the pad-to-pad gap, albeit temporarily. Before the reflow process, the MOSFET can shift off-center as a result of operating pressure during part placement. The specifics of how this happens also depend on the tolerances of the pick-and-place machine. But the PowerPAK devices realign themselves during the reflow process. No solder bridges were observed during these movements and realignments. Therefore, it has been shown that the PowerPAK SO-8 and PowerPAK 1212-8 packages are suitable for surface mounting assembly using industry standard re-flow procedure and process. To investigate the possibility of solder voids, a variety of solder pastes were used to mount the PowerPAK SO-8 and 1212-8 MOSFETs. The manufacturers’ recommended oven profiles were used for the reflow process. For the solder pastes which generated large voids, the reflow profile was varied to try and minimize the solder voids. Only marginal improvements were noticed in the results, although solder paste manufacturers are attempting to produce an oven reflow profile that will improve the voiding of some of these solder pastes. X Loctite RP15 Tamura Solder Bridging and Part Movement During Placement Solder Voids Multicore NC73 Multicore WS22 This note effectively considers two issues: the movement of the part during placement and any associated solder bridging, and the solder voids beneath the mounted part. Nor did the results show any solder bridges on the fine gaps between two consecutive leads, or on the gaps between the lead and pad, or between the pads themselves. There were also no electrical shorts on the mounted device as the part aligned itself on the pad pattern during the re-flow period. To ensure that there are no solder bridges or shorts, the recommended pad patterns must be used in conjunction with the corresponding solder masks. Use of the recommended pad pattern greatly reduces pad-to-pad solder-bridging and shift or pull of the part due to surface tension. X Omnix 5000 CONCLUSIONS X 3 X X 4 X X The contract manufacturer specified that a solder void of less than 20% was acceptable. It was also noted that an adequate amount of paste, by means of a good stencil design, is important for fault-free soldering, and an appropriate selection of pressure and speed parameters on the solder paste printing machine and pick-place machine are also critical in obtaining good results. Typically, the solder profiles are recommended by the solder manufacturers, but marginal variance is applied to improve upon solder voids. However, an excessive increase in the reflow temperature can lead to burnt (dry) solder, whereas decreasing the reflow temperature can lead to an incomplete solder joint. The study showed that by using the correct solder paste, oven profile, and solder mask, it was possible to obtain solder joints with less than 20% voiding. Document Number: 72116 15-Dec-03