INTERSIL ICL3244CB

ICL3244
TM
Data Sheet
June 2000
1Microamp, +3V to +5.5V, 250kbps,
RS-232 Transceiver with Enhanced
Automatic Powerdown
The ICL3244 is a 3 driver, 5 receiver device that provides a
complete serial port suitable for laptop or notebook
computers. It also includes a noninverting always-active
receiver for “wake-up” capability.
This device, features an enhanced automatic powerdown
function which powers down the on-chip power-supply and
driver circuits. This occurs when all receiver and transmitter
inputs detect no signal transitions for a period of 30s. The
ICL3244 powers back up, automatically, whenever it senses
a transition on any transmitter or receiver input.
•
•
•
•
•
•
•
•
•
•
•
Manual and Enhanced Automatic Powerdown Features
Drop in Replacement for MAX3244
Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
Latch-Up Free
On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
Guaranteed Mouse Driveability
Receiver Hysteresis For Improved Noise Immunity
Guaranteed Minimum Data Rate . . . . . . . . . . . . 250kbps
Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
Wide Power Supply Range. . . . . . . . Single +3V to +5.5V
Low Supply Current in Powerdown State . . . . . . . . . . 1µA
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Cellular/Mobile Phones
• Related Literature
- Application Note AN9863, “3V to +5.5V, 250k-1Mbps,
RS-232 Transmitters/Receivers”
Pinout
ICL3244 (SOIC, SSOP)
TOP VIEW
Table 1 summarizes the features of the device represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL3244 3V family.
ICL3244CA
ICL3244CB
0 to 70
PACKAGE
28 Ld SSOP
0 to 70
PKG. NO.
M28.209
28 Ld SOIC
C2+ 1
28 C1+
C2- 2
27 V+
3
26 VCC
R1IN 4
25 GND
R2IN 5
24 C1-
R3IN 6
23 FORCEON
R4IN 7
22 FORCEOFF
R5IN 8
21 INVALID
T1OUT 9
20 R2OUTB
T2OUT 10
19 R1OUT
T3OUT 11
18 R2OUT
T3IN 12
17 R3OUT
T2IN 13
16 R4OUT
T1IN 14
15 R5OUT
V-
Ordering Information
PART NO.
4876
Features
The Intersil ICL32XX devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at VCC = 3.0V. Targeted
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with manual and enhanced
automatic powerdown functions, reduce the standby supply
current to a 1µA trickle. Small footprint packaging, and the
use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. This family is fully
compatible with 3.3V only systems, mixed 3.3V and 5.0V
systems, and 5.0V only systems.
TEMP.
RANGE (oC)
File Number
M28.3
NOTE: Most surface mount devices are available on tape and reel;
add “-T” to suffix.
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
ICL3244
NO. OF NO. OF
Tx.
Rx.
3
5
4-1
NO. OF
MONITOR Rx.
(ROUTB)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
1
250
No
READY
OUTPUT?
MANUAL
POWERDOWN?
ENHANCED
AUTOMATIC
POWERDOWN
FUNCTION?
No
Yes
Yes
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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ICL3244
Pin Descriptions
PIN
VCC
FUNCTION
System Power Supply Input (3.0V to 5.5V).
V+
Internally Generated Positive Transmitter Supply (+5.5V).
V-
Internally Generated Negative Transmitter Supply (-5.5V).
GND
Ground Connection.
C1+
External Capacitor (Voltage Doubler) is connected to this lead.
C1-
External Capacitor (Voltage Doubler) is connected to this lead.
C2+
External Capacitor (Voltage Inverter) is connected to this lead.
C2-
External Capacitor (Voltage Inverter) is connected to this lead.
TIN
TTL/CMOS Compatible Transmitter Inputs.
TOUT
RS-232 Level (Nominally ±5.5V) Transmitter Outputs.
RIN
RS-232 Compatible Receiver Inputs.
ROUT
TTL/CMOS Level Receiver Outputs.
ROUTB
TTL/CMOS Level, Noninverting, Always Enabled Receiver Outputs.
INVALID
Active Low Output that indicates if no valid RS-232 levels are present on any receiver input.
FORCEOFF Active Low to Shut Down Transmitters and On-Chip Power Supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON
Active High Input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
Typical Operating Circuit
ICL3244
+3.3V
+
26
0.1µF
28
C1
0.1µF
+
C2
0.1µF
C11
C2+
+
2
C2-
C1+
VCC
24
27
+
V+
C3
0.1µF
ICL3244
VT1
14
9
T1IN
T2
13
3
C4
0.1µF
+
T1OUT
10
T2IN
T2OUT
T3
12
RS-232
LEVELS
11
T3IN
T3OUT
20
R2OUTB
19
4
R1OUT
R1IN
R1
TTL/CMOS
LOGIC LEVELS
5kΩ
18
5
R2OUT
R2IN
R2
5kΩ
R3
5kΩ
17
6
R3OUT
16
7
R4OUT
R4IN
R4
5kΩ
15
8
R5OUT
R5IN
23
5kΩ
R5
FORCEON
VCC
TO POWER
CONTROL LOGIC
22
FORCEOFF
21
INVALID
GND
25
4-2
R3IN
RS-232
LEVELS
ICL3244
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON. . . . . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
100
Moisture Sensitivity (see Technical Brief TB363)
All Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC, SSOP- Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25oC
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All RIN Open, FORCEON = GND, FORCEOFF = VCC
25
-
1.0
10
µA
Supply Current, Powerdown
FORCEOFF = GND
25
-
1.0
10
µA
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded, FORCEON = FORCEOFF = VCC
25
-
0.3
1.0
mA
Full
-
-
0.8
V
VCC = 3.3V
Full
2.0
-
-
V
VCC = 5.0V
Full
2.4
-
-
V
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
TIN, FORCEON, FORCEOFF
Input Logic Threshold High
TIN, FORCEON, FORCEOFF
Input Leakage Current
TIN, FORCEON, FORCEOFF
Full
-
±0.01
±1.0
µA
Output Leakage Current
FORCEOFF = GND
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC -0.6 VCC -0.1
RECEIVER INPUTS
Input Voltage Range
Full
-25
-
25
V
VCC = 3.3V
25
0.6
1.2
-
V
VCC = 5.0V
25
0.8
1.5
-
V
VCC = 3.3V
25
-
1.5
2.4
V
VCC = 5.0V
25
-
1.8
2.4
V
Input Hysteresis
25
-
0.5
-
V
Input Resistance
25
3
5
7
kΩ
Full
±5.0
±5.4
-
V
Input Threshold Low
Input Threshold High
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
4-3
ICL3244
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25oC (Continued)
TEMP
(oC)
MIN
TYP
MAX
UNITS
Full
300
10M
-
Ω
Full
-
±35
±60
mA
VOUT = ±12V, VCC = 0V or 3V to 5.5V,
Automatic Powerdown or FORCEOFF = GND
Full
-
-
±25
µA
T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded with 3kΩ to
GND, T1OUT and T2OUT Loaded with 2.5mA Each
Full
±5
-
-
V
PARAMETER
TEST CONDITIONS
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Output Resistance
Output Short-Circuit Current
Output Leakage Current
MOUSE DRIVEABILITY
Transmitter Output Voltage
(Figure 11)
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
INVALID High
ICL3244 Powers Up (Figure 6)
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
INVALID Low
ICL3244 Powers Down (Figure 6)
Full
-0.3
-
0.3
V
INVALID Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
INVALID Output Voltage High
IOUT = -1.0mA
Full
VCC-0.6
-
-
V
Receiver Positive or Negative
Threshold to INVALID High Delay
(tINVH)
25
-
1
-
µs
Receiver Positive or Negative
Threshold to INVALID Low Delay
(tINVL)
25
-
30
-
µs
Receiver or Transmitter Edge to
Transmitters Enabled Delay (tWU)
Note 2
25
-
100
-
µs
Receiver or Transmitter Edge to
Transmitters Enabled Delay
(tAUTOPWDN)
Note 2
Full
15
30
60
s
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
tPHL
25
-
0.15
-
µs
tPLH
25
-
0.15
-
µs
TIMING CHARACTERISTICS
Receiver Output Enable Time
Normal Operation
25
-
200
-
ns
Receiver Output Disable Time
Normal Operation
25
-
200
-
ns
Transmitter Skew
tPHL - tPLH
25
-
100
-
ns
Receiver Skew
tPHL - tPLH
25
-
50
-
ns
Transition Region Slew Rate
VCC = 3.3V,
RL = 3kΩ to 7kΩ,
Measured From 3V to -3V or -3V
to 3V
CL = 150pF to 1000pF
25
6
-
30
V/µs
CL = 150pF to 2500pF
25
4
8
30
V/µs
Human Body Model
25
-
>±8
-
kV
IEC1000-4-2 Contact Discharge
25
-
±8
-
kV
IEC1000-4-2 Air Gap Discharge
25
-
±8
-
kV
Human Body Model
25
-
±3
-
kV
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
All Other Pins
NOTE:
2. An “edge” is defined as a transition through the transmitter or receiver input thresholds.
4-4
ICL3244
Detailed Description
ICL32XX interface ICs operate from a single +3V to +5.5V
supply, guarantee a 250kbps minimum data rate, require
only four small external 0.1µF capacitors, feature low power
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil’s new ICL32XX family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a VCC supply as
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions at VCC = 3.3V. See
the “Capacitor Selection” section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Transmitter outputs disable and assume a high impedance
state when the device enters the powerdown mode (see
Table 2). These outputs may be driven to ±12V when
disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 1Mbps.
Transmitter inputs float if left unconnected, and may cause
ICC increases. Connect unused inputs to GND for the best
performance.
Receivers
The ICL3244 contains both standard inverting, tri-stable
receivers, and a single noninverting (monitor) receiver
(denoted by the ROUTB label) that is always active,
regardless of the state of any control lines. Both receiver
types convert RS-232 signals to CMOS output levels and
accept inputs up to ±25V while presenting the required 3kΩ
to 7kΩ input impedance (see Figure 1) even if the power is
off (VCC = 0V). The receivers’ Schmitt trigger input stage
uses hysteresis to increase noise immunity and decrease
errors due to slow input signal transitions.
The inverting receivers disable during forced (manual)
powerdown, but not during automatic powerdown (see Table
2). Conversely, the monitor receiver remains active even
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RCVR OR
XMTR
EDGE
WITHIN 30
SEC?
FORCEOFF FORCEON TRANSMITTER RECEIVER
ROUTB
INPUT
INPUT
OUTPUTS
OUTPUTS OUTPUTS
RS-232
LEVEL
PRESENT
AT
RECEIVER
INPUT?
INVALID
OUTPUT
MODE OF OPERATION
ICL3244
NO
H
H
Active
Active
Active
No
L
NO
H
H
Active
Active
Active
Yes
H
YES
H
L
Active
Active
Active
No
L
YES
H
L
Active
Active
Active
Yes
H
NO
H
L
High-Z
Active
Active
No
L
NO
H
L
High-Z
Active
Active
Yes
H
X
L
X
High-Z
High-Z
Active
No
L
X
L
X
High-Z
High-Z
Active
Yes
H
Normal Operation (Enhanced
Auto Powerdown Disabled)
Normal Operation (Enhanced
Auto Powerdown Enabled)
Powerdown Due to Enhanced
Auto Powerdown Logic
Manual Powerdown
ICL3244 - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
Note 3
Note 3
Active
Active
Active
Yes
H
Normal Operation
X
Note 3
Note 3
High-Z
High-Z
Active
No
L
Forced Auto Powerdown
NOTE:
3. Input is connected to INVALID Output.
4-5
ICL3244
during manual powerdown making it extremely useful for
Ring Indicator monitoring. Standard receivers driving
powered down peripherals must be disabled to prevent
current flow through the peripheral’s protection diodes (see
Figures 2 and 3). This renders them useless for wake up
functions, but the corresponding monitor receiver can be
dedicated to this task as shown in Figure 3.
VCC
RXIN
Software Controlled (Manual) Powerdown
RXOUT
-25V ≤ VRIN ≤ +25V
5kΩ
GND ≤ VROUT ≤ VCC
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
VCC
VCC
CURRENT
FLOW
VCC
VOUT = VCC
Rx
POWERED
DOWN
UART
Tx
SHDN = GND
GND
current required of 5V RS-232 devices. The already low
current requirement drops significantly when the device
enters powerdown mode. In powerdown, supply current
drops to 1µA, because the on-chip charge pump turns off
(V+ collapses to VCC, V- collapses to GND), and the
transmitter outputs three-state. Inverting receiver outputs
may or may not disable in powerdown; refer to Table 2 for
details. This micro-power mode makes this device ideal for
battery powered and portable applications.
The ICL3244 allows the user to force the IC into the low
power, standby state, and utilizes a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
ICL3244 inverting (standard) receiver outputs also disable
when the device is in powerdown, thereby eliminating the
possible current path through a shutdown peripheral’s input
protection diode (see Figures 2 and 3).
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 4).
OLD
RS-232 CHIP
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
FORCEOFF
PWR
MGT
LOGIC
FORCEON
VCC
INVALID
ICL3244
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
ICL3244
I/O
UART
VCC
CPU
R2OUTB
RX
POWERED
DOWN
UART
VOUT = HI-Z
R2OUT
TX
R2IN
T1IN
T1OUT
FORCEOFF = GND
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
Powerdown Functionality
This 3V RS-232 interface device requires a nominal supply
current of 0.3mA during normal operation (not in powerdown
mode). This is considerably less than the 5mA to 11mA
4-6
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100µs.
When using both manual and enhanced automatic
powerdown (FORCEON = 0), the ICL3244 won’t power up
from manual powerdown until both FORCEOFF and
FORCEON are driven high, or until a transition occurs on a
receiver or transmitter input. Figure 5 illustrates a circuit for
ICL3244
ensuring that the ICL3244 powers up as soon as
FORCEOFF switches high. The rising edge of the Master
Powerdown signal forces the device to power up, and the
ICL3244 returns to enhanced automatic powerdown mode
an RC time constant after this rising edge. The time constant
isn’t critical, because the ICL3244 remains powered up for
30 seconds after the FORCEON falling edge, even if there
are no signal transitions. This gives slow-to-wake systems
(e.g., a mouse) plenty of time to start transmitting, and as
long as it starts transmitting within 30 seconds both systems
remain enabled.
POWER
MANAGEMENT
UNIT
MASTER POWERDOWN LINE
0.1µF
FORCEOFF
1MΩ
FORCEON
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
block. INVALID can also be used to indicate the DTR or
RING INDICATOR signal, as long as the other receiver
inputs are floating, or driven to GND (as in the case of a
powered down driver).
Enhanced Automatic Powerdown
Even greater power savings is available by using this device
which features an enhanced automatic powerdown function.
When the enhanced powerdown logic determines that no
transitions have occurred on any of the transmitter nor
receiver inputs for 30 seconds, the charge pump and
transmitters powerdown, thereby reducing supply current to
1µA. The ICL3244 automatically powers back up whenever it
detects a transition on one of these inputs. This automatic
powerdown feature provides additional system power
savings without changes to the existing operating system.
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
FORCEOFF
INVALID Output
T_IN
The INVALID output always indicates (see Table 2) whether
or not 30µs have elapsed with invalid RS-232 signals (see
Figures 6 and 8) persisting on all of the receiver inputs,
VALID RS-232 LEVEL - INVALID = 1
2.7V
EDGE
DETECT
S
30s
TIMER
R_IN
AUTOSHDN
R
EDGE
DETECT
INDETERMINATE
FORCEON
0.3V
INVALID LEVEL - INVALID = 0
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
-0.3V
INDETERMINATE
-2.7V
VALID RS-232 LEVEL - INVALID = 1
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
giving the user an easy way to determine when the interface
block should power down. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. In the case of a disconnected interface cable
where all the receiver inputs are floating (but pulled to GND
by the internal receiver pull down resistors), the INVALID
logic detects the invalid levels and drives the output low. The
power management logic then uses this indicator to power
down the interface block. Reconnecting the cable restores
valid levels at the receiver inputs, INVALID switches high,
and the power management logic wakes up the interface
4-7
Figure 7 illustrates the enhanced powerdown control logic.
Note that once the ICL3244 enters powerdown (manually or
automatically), the 30 second timer remains timed out (set),
keeping the ICL3244 powered down until FORCEON
transitions high, or until a transition occurs on a receiver or
transmitter input.
The INVALID output signal switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 30µs (see Figure 8), but this has no direct effect
on the state of the ICL3244 (see the next sections for
methods of utilizing INVALID to power down the device).
INVALID switches high 1µs after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
The time to recover from automatic powerdown mode is
typically 100µs.
ICL3244
RECEIVER
INPUTS
} INVALID
REGION
TRANSMITTER
INPUTS
TRANSMITTER
OUTPUTS
tINVH
INVALID
OUTPUT
tINVL
tAUTOPWDN
tAUTOPWDN
tWU
tWU
V+
VCC
0
V-
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, AND INVALID TIMING DIAGRAMS
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with FORCEON
= 0) may be a desirable configuration. While the cable is
attached INVALID and FORCEOFF remain high, so the
enhanced automatic powerdown logic powers down the RS232 device whenever there is 30 seconds of inactivity on the
receiver and transmitter inputs. Detaching the cable allows
the receiver inputs to drop to an invalid level (GND), so
INVALID switches low and forces the RS-232 device to
power down. The ICL3244 remains powered down until the
cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 7). For immediate power up when the cable is
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 5.
FORCEOFF
If enhanced automatic powerdown isn’t desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221/23/43) by connecting
the INVALID output to the FORCEON and FORCEOFF
inputs, as shown in Figure 9. After 30µs of invalid receiver
levels, INVALID switches low and drives the ICL3244 into a
forced powerdown condition. INVALID switches high as soon
as a receiver input senses a valid RS-232 level, forcing the
ICL3244 to power on. See the “INVALID DRIVING
FORCEON AND FORCEOFF” section of Table 2 for an
operational summary. This operational mode is perfect for
handheld devices that communicate with another computer
via a detachable cable. Detaching the cable allows the
internal receiver pull-down resistors to pull the inputs to GND
(an invalid RS-232 level), causing the 30µs timer to time-out
and drive the IC into powerdown. Reconnecting the cable
restores valid levels, causing the IC to power back up.
FORCEON
Hybrid Automatic Powerdown Options
INVALID
Emulating Standard Automatic Powerdown
ICL3244
I/O
UART
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V
operation. For other supply voltages refer to Table 3 for
capacitor values. Do not use values smaller than those listed
in Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
reduces power consumption. C2, C3, and C4 can be
increased without increasing C1’s value, however, do not
increase C1 without also increasing C2, C3, and C4 to
maintain the proper ratios (C1 to the other capacitors).
TABLE 3. REQUIRED CAPACITOR VALUES
CPU
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
4-8
VCC (V)
C1 (µF)
C2, C3, C4 (µF)
3.0 to 3.6
0.1
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.1
0.47
ICL3244
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
5
VOUT+
4
3
VCC = 3.0V
2
1
T1
0
VOUT+
-1
T2
-2
ICL3244
-3
VCC
-4
VOUT -
T3
VOUT -
-5
-6
1
0
3
2
5
4
7
6
8
9
10
LOAD CURRENT PER TRANSMITTER (mA)
Transmitter Outputs when Exiting
Powerdown
Figure 10 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
5V/DIV
6
TRANSMITTER OUTPUT VOLTAGE (V)
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
FORCEOFF
T1
2V/DIV
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e., DOUBLE
CURRENT AXIS FOR TOTAL VOUT+ CURRENT)
High Data Rates
The ICL3244 maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 12
details a transmitter loopback test circuit, and Figure 13
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 14 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
VCC
+
0.1µF
T2
+
C1+
VCC
V+
C1
VCC = +3.3V
C1 - C4 = 0.1µF
C1-
+
C3
ICL3244
TIME (20µs/DIV.)
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
+
C2
Mouse Driveability
ROUT
4-9
C4
+
C2TIN
The ICL3244 is specifically designed to power a serial
mouse while operating from low voltage supplies. Figure 11
shows the transmitter output voltages under increasing load
current. The on-chip switching regulator ensures the
transmitters will supply at least ±5V during worst case
conditions (15mA for paralleled V+ transmitters, 7.3mA for
single V- transmitter).
V-
C2+
EN
VCC
TOUT
RIN
1000pF
5k
SHDN OR
FORCEOFF
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT
ICL3244
5V/DIV.
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
5µs/DIV.
FIGURE 13. LOOPBACK TEST AT 120kbps
5V/DIV.
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 14. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
The ICL3244 directly interfaces with most 5V logic families,
including ACT and HCT CMOS. See Table 4 for more
information on possible combinations of interconnections.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE (V)
VCC
SUPPLY
VOLTAGE
(V)
3.3
3.3
5
5
5
3.3
COMPATIBILITY
Compatible with all CMOS
families.
Compatible with all TTL and
CMOS logic families.
Compatible with ACT and HCT
CMOS, and with TTL.
Incompatible with AC, HC, or
CD4000 CMOS.
4-10
ICL3244
Typical Performance Curves
VCC = 3.3V, TA = 25oC
25
VOUT+
4
+SLEW
20
SLEW RATE (V/µs)
TRANSMITTER OUTPUT VOLTAGE (V)
6
2
1 TRANSMITTER AT 250kbps
1 OR 2 TRANSMITTERS AT 30kbps
0
-2
15
-SLEW
10
-4
VOUT +SLEW
-6
0
1000
2000
3000
4000
5
5000
0
1000
2000
3000
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
3.5
NO LOAD
ALL OUTPUTS STATIC
3.0
SUPPLY CURRENT (mA)
40
SUPPLY CURRENT (mA)
5000
FIGURE 16. SLEW RATE vs LOAD CAPACITANCE
45
250kbps
35
4000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
30
25
120kbps
20
2.5
2.0
1.5
1.0
0.5
15
20kbps
10
0
1000
2000
3000
4000
5000
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 18. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
100 mils x 127 mils (2550µm x 3230µm)
METALLIZATION:
Type: Metal 1: AISi (1%)
Thickness: Metal 1: 8kÅ
Type: Metal 2: AISi (1%)
Thickness: Metal 2: 10kÅ
Type: Silox
Thickness: 13kÅ
TRANSISTOR COUNT:
1109
PROCESS:
Si Gate CMOS
SUBSTRATE POTENTIAL (POWERED UP):
GND
4-11
6.0
ICL3244
Shrink Small Outline Plastic Packages (SSOP)
M28.209 (JEDEC MO-150-AH ISSUE B)
N
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
GAUGE
PLANE
-B1
2
3
L
0.25
0.010
SEATING PLANE
-A-
A
D
-C-
α
e
B
0.25(0.010) M
C
0.10(0.004)
C A M
B S
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
4-12
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
e
A2
A1
MILLIMETERS
0.026 BSC
H
0.292
L
0.022
N
α
0.65 BSC
0.322
7.40
0.037
0.55
28
0o
-
0.95
6
28
8o
0o
-
8.20
7
8o
Rev. 1 3/95
ICL3244
Small Outline Plastic Packages (SOIC)
M28.3 (JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
B S
MILLIMETERS
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.6969
0.7125
17.70
18.10
3
E
0.2914
0.2992
7.40
7.60
4
0.05 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.01
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
MAX
A1
e
α
MIN
α
28
0o
28
7
8o
Rev. 0 12/93
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4-13
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