ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 ® Data Sheet December 14, 2006 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability The ISL88011 through ISL88015 family of devices offer both fixed and/or adjustable voltage-monitoring that combine popular functions such as Power On Reset control, Watchdog Timer, Supply Voltage Supervision, and Manual Reset assertion in a small 5 Ld SOT-23 package. FN8093.1 Features • Single/Dual Voltage Monitoring Supervisors • Fixed-Voltage Options Allow Precise Monitoring of +2.5V, +3.0V, +3.3V, and +5.0V Power Supplies • Dual Supervisor Has One Fixed Voltage Input and Another That is User-Adjustable Down to 0.6V. • Both RST and RST Outputs Available Unique features on the ISL88013 and ISL88015 include a watchdog timer with a 51s startup timeout and a 1.6s normal timeout duration. On the ISL88011 and ISL88014, users can increase the nominal 200ms Power On Reset timeout delay by adding an external capacitor to the CPOR pin. Both fixed and adjustable voltage monitors are provided by the ISL88012. Complementary active-low and active-high reset outputs are available on the ISL88011, ISL88012 and ISL88013 devices. All devices provide manual reset capability (see “Product Features Table” on page 4). • Adjustable POR Timeout Delay Options Seven preprogrammed reset threshold voltages accurate to ±1.5% over temperature are offered (see “Ordering Information” on page 3). The ISL88012, ISL88014 and ISL88015 have a user-adjustable voltage input available for custom monitoring of any voltage down to 0.6V. All parts are specifically designed for low power consumption and high threshold accuracy. • Small 5 Ld SOT-23 Pb-Free Package • Watchdog Timer With 1.6s Normal and 51s Startup Timeout Durations • Manual Reset Input on All Devices • Reset Signal Valid Down to VDD = 1V • Accurate ±1.5% Voltage Threshold • Immune to Power-Supply Transients • Ultra Low 5.5µA Supply Current • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Process Control Systems • Intelligent Instruments • Embedded Control Systems • Computer Systems • Critical µP and µC Power Monitoring • Portable/Battery-Powered Equipment • PDA and Handheld PC Devices 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Pinouts ISL88012 (5 LD SOT-23) TOP VIEW ISL88011 (5 LD SOT-23) TOP VIEW RST/MR 1 GND 2 RST 3 5 4 VDD CPOR RST/MR 1 GND 2 RST 3 1 GND 2 RST 3 VDD 4 VMON ISL88014 (5 LD SOT-23) TOP VIEW ISL88013 (5 LD SOT-23) TOP VIEW RST/MR 5 5 VDD 4 WDI 5 VDD 4 WDI RST/MR 1 GND 2 VMON 3 5 VDD 4 CPOR ISL88015 (5 LD SOT-23) TOP VIEW RST/MR 1 GND 2 VMON 3 2 FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Ordering Information PART NUMBER (Notes 1, 2) PART MARKING VTHVDD VTHVMON (V) (V) TEMPERATURE RANGE (°C) PACKAGE TAPE AND REEL (Pb-free) PKG. DWG. # ISL88011IH546Z-TK AGU 4.64 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88011IH544Z-TK AGV 4.38 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88011IH531Z-TK AGW 3.09 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88011IH529Z-TK AGX 2.92 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88011IH526Z-TK AGY 2.63 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88011IH523Z-TK AGZ 2.32 N/A -40 to +85 5 Ld SOT-23) P5.064 ISL88011IH522Z-TK AHE 2.19 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH546Z-TK AHF 4.64 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH544Z-TK AHG 4.38 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH531Z-TK AHH 3.09 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH529Z-TK AHI 2.92 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH526Z-TK AHJ 2.63 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH523Z-TK AHK 2.32 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88012IH522Z-TK AHL 2.19 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH546Z-TK AHM 4.64 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH544Z-TK AHN 4.38 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH531Z-TK AHO 3.09 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH529Z-TK AHP 2.92 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH526Z-TK AHQ 2.63 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH523Z-TK AHR 2.32 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88013IH522Z-TK AHS 2.19 N/A -40 to +85 5 Ld SOT-23 P5.064 ISL88014IH5Z-TK AHT N/A 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 ISL88015IH5Z-TK AHU N/A 0.6 (Note 2) -40 to +85 5 Ld SOT-23 P5.064 NOTES: 1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 2. The voltage trip point can be adjusted to be greater than 0.6V using 2 external resistors. By default, the VTHVMON trip point is 0.6V if no external resistors are used. 3 FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Functional Block Diagrams VDD VDD VDD RST/MR RST/MR POR ± VTHMON RST/MR POR PB VDD POR PB ± VTHMON OSC VMON RST CPOR PB ± VTHMON RST RST OSC WDI ± VREF GND WDT GND ISL88011 GND ISL88012 ISL88013 VDD VDD R1 R1 RST/MR VMON R2 ± VTHMON R2 PB VDD RST/MR VMON POR POR PB ± VTHMON OSC CPOR OSC GND WDI WDT ISL88014 GND ISL88015 Product Features Table FUNCTION ISL88011 ISL88012 ISL88013 ISL88014 ISL88015 Active-Low Reset (RST) x x x x x Active-High Reset (RST) x x x Watchdog Timer (WDI) x Dual Voltage Supervision x x Adjustable POR Timeout (CPOR) x Manual Reset Input (MR) x x x Fixed Trip Point Voltage x x x Adjustable Trip Point Voltage x x x x x x Pin Descriptions PIN ISL88011 ISL88012 ISL88013 ISL88014 ISL88015 NAME 1 1 1 1 1 RST/MR 2 2 2 2 2 GND 3 3 VMON 4 3 3 3 RST 4 4 4 5 5 5 5 4 CPOR FUNCTION Combined Active-Low Reset Output and Manual Reset Input Ground Adjustable Threshold Voltage Input Active-High Reset Output Adjustable POR Timeout Delay Input 4 WDI Watchdog Timer Input 5 VDD Supply Voltage and Monitored Input FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Absolute Maximum Ratings Recommended Operating Conditions Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on any pin with respect to GND . . . . . . . . . . . . -1.0V to +7V D.C. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . +300°C Thermal Resistance (Typical, Note 3) θJA (°C/W) 5 Ld SOT-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 Maximum Junction Temperature (Plastic Package) . . . . . . . +125°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C (SOT-23 Lead Tips Only) Recommended Operating Conditions Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C Pull-up Resistance (RPU) . . . . . . . . . . . . . . . . . . . . . 5kΩ to 100kΩ CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. NOTE: 3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Over the recommended operating conditions unless otherwise specified, RPU = 10kΩ. Electrical Specifications SYMBOL PARAMETER TEST CONDITIONS MIN TYP 2.0 MAX UNITS 5.5 V VDD Supply Voltage Range IDD Supply Current for ISL88011, ISL88012, ISL88013 VDD = 5.0V 8 11.5 µA VDD = 3.3V 7 10 µA VDD = 2.5V 5.5 9 µA Supply Current for ISL88014, ISL88015 VDD = 3.3V 4.5 8 µA ILI Input Leakage Current (VMON) 100 nA ILO Output Leakage Current (VMON) 100 nA VOLTAGE THRESHOLDS VTHVDD VTHVDD Fixed VDD Voltage Trip Point Hysteresis at VDD Input HYST ISL88011, 88012, 88013IH546 4.57 4.64 4.71 V ISL88011, 88012, 88013IH544 4.31 4.38 4.45 V ISL88011, 88012, 88013IH531 3.04 3.09 3.14 V ISL88011, 88012, 88013IH529 2.88 2.92 2.96 V ISL88011, 88012, 88013IH526 2.59 2.63 2.67 V ISL88011, 88012, 88013IH523 2.29 2.32 2.35 V ISL88011, 88012, 88013IH522 2.16 2.19 2.22 V VTHVDD = 4.64V 46 mV VTHVDD = 4.38V 44 mV VTHVDD = 3.09V 31 mV VTHVDD = 2.92V 29 mV VTHVDD= 2.63V 26 mV VTHVDD = 2.32V 23 mV VTHVDD = 2.19V 22 mV VTHVMON Adj. Reset Voltage Trip Point (Note 4) VTHVDD = 4.64V 599 605 611 mV VTHVDD = 4.38V 597 603 609 mV VTHVDD = 3.09V 589 595 601 mV VTHVDD = 2.92V 589 595 601 mV VTHVDD= 2.63V 589 595 601 mV VTHVDD = 2.32V 597 603 609 mV VTHVDD = 2.19V VTHVMON Adj. Reset Voltage Trip Point (Note 5) 5 597 603 609 mV 594 600 606 mV FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Over the recommended operating conditions unless otherwise specified, RPU = 10kΩ. (Continued) Electrical Specifications SYMBOL PARAMETER TEST CONDITIONS MIN VTHVMON Hysteresis Voltage (Notes 4, 5) TYP MAX 3 UNITS mV HYST RESET VOL VOH Reset Output Voltage Low Reset Output Voltage High tRPD VTH to Reset Asserted Delay tPOR POR Timeout Delay CLOAD Load Capacitance on Reset Pins VDD ≥ 3.3V, Sinking 0.5mA 0.05 0.40 V VDD < 3.3V, Sinking 0.5mA 0.05 0.40 V VDD ≥ 3.3V, Sourcing 0.4mA VDD-0.6 VDD-0.4 V VDD < 3.3V, Sourcing 0.4mA VDD-0.6 VDD-0.4 V ISL88012, ISL88013, ISL88015 140 200 ISL88011, ISL88014 with CPOR = OPEN 200 250 ms 5 pF 60 µs 260 ms MANUAL RESET VMR MR Input Voltage 0 tMR MR Minimum Pulse Width 1 100 mV µs WATCHDOG TIMER (Note 6) Start tWDT Startup Watchdog Timeout Period 32 51 64 sec tWDT Normal Watchdog Timeout Period 1.0 1.6 2.0 sec tWDPS WDI Minimum Pulse Width 100 VIL Watchdog Input Voltage Low VIH Watchdog Input Voltage High IWDT Watchdog Input Current ns 0.3 x VDD V 100 nA 0.85 x VDD V NOTES: 4. Applies to ISL88012 5. Applies to ISL88014 and ISL88015. 6. Applies to ISL88013 and ISL88015. Pin Description The device is designed with hysteresis to help prevent chattering due to noise. RST The push-pull RST output is set to VDD (HIGH) whenever 1) the device is first powered up, 2) either VDD or the voltage on VMON falls below their respective minimum voltage sense levels, 3) MR is asserted or 4) the watchdog timeout expires. RST/MR This pin functions as both a reset output and a manual reset input. The RST output functions identically to the complementary RST output but is an open drain output that is pulled to GND (LOW) when reset is asserted. The MR input is an active-low debounced input to which a user can connect a push-button to add manual reset capability or drive with active low signal from a controller. VDD The VDD pin is the power supply terminal. It is monitored by the ISL88011, ISL88012 and ISL88013. For these devices, the voltage at this pin is compared against an internal factory-programmed voltage trip point, VTHVDD. A reset is first asserted when the device is initially powered up to ensure that the power supply has stabilized. Thereafter, reset is again asserted whenever VDD falls below VTHVDD. 6 VMON The VMON pin on the ISL88012, ISL88014 and ISL88015 is a monitored input voltage that is user-adjustable. The voltage at this pin is compared against an internal 600mV reference voltage (VTHVMON) and a reset is asserted whenever the monitored voltage falls below this trip point. WDI The Watchdog Input takes an input from a microprocessor and ensures that it periodically toggles the WDI pin, otherwise the internal watchdog timer runs out and reset is asserted. The internal Watchdog Timer is cleared whenever the WDI input pin sees a rising or falling edge or the device is manually reset. CPOR The CPOR input pin lets users increase the Power On Reset timeout delay (tPOR) by connecting a capacitor between CPOR and ground. (See Figure 3) FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 VTHVDD VDD 1V VTHVMON VMON >tMR MR tPOR tRPD tPOR tRPD tPOR tPOR RST RST FIGURE 1. VOLTAGE MONITORING TIMING DIAGRAM Principles of Operation The ISL88011 through ISL88015 devices provide those functions needed for critical voltage monitoring. These features include Power On Reset control, customizable supply voltage supervision, Watchdog Timer capability, and manual reset assertion. By integrating all of these features into a small 5 Ld SOT-23 package and using only 5.5µA of supply current, the ISL88011 through ISL88015 devices can assist in lowering system cost, reducing board space requirements, and increasing the reliability of a system. The ISL88012, ISL88014 and ISL88015 allow users to customize the minimum voltage sense level on the VMON input pin. To do this, connect an external resistor divider network to the VMON pin in order to set the trip point to some voltage above 600mV according to the following equation (See Figure 2): ( R1 + R2 ) V INTRIP = 0.6 × --------------------------R2 (EQ. 1) Low Voltage Monitoring During normal operation, these supervisors monitor both the voltage level of VDD (ISL88011, ISL88012, ISL88013) and/or VMON (ISL88012, ISL88014, ISL88015). The device asserts a reset if any of these voltages falls below their respective trip points. The reset signal effectively prevents the system from operating during a power failure or brownout condition. This reset signal remains asserted until VDD and the voltage on VMON exceed their voltage threshold setting for the reset time delay period tPOR of 200ms (See Figure 1). R1 VMON VIN R2 ISL88012 ISL88014 ISL88015 FIGURE 2. USING VMON TO MONITOR VIN VIA RESISTORS 7 FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Power On Reset (POR) Manual Reset Applying at least 1V to the VDD pin activates a POR circuit which asserts reset (i.e. RST goes HIGH while RST goes LOW). The reset signals remain asserted until the voltage at VDD and/or VMON rise above the minimum voltage sense level for time period tPOR. This ensures that the voltages have stabilized. The manual reset input (MR) allows the user to trigger a reset by using a push-button switch. The MR input is an active-low debounced input. By connecting a push-button directly from MR to ground, the designer adds manual system reset capability (see Figure 4). Reset is asserted if the MR pin is pulled low to less than 100mV for 1µs or longer while the push-button is closed. After MR is released, the reset outputs remain asserted for tPOR (200ms) and then released. These reset signals provide several benefits: • It prevents the system microprocessor from starting to operate with insufficient voltage. VDD • It prevents the processor from operating prior to stabilization of the oscillator. ISL88011 • It ensures that the monitored device is held out of operation until internal registers are properly loaded. ISL88012 ISL88013 • It allows time for an FPGA to download its configuration prior to initialization of the circuit. Rpu RST/MR ISL88014 ISL88015 PB Adjusting POR Timeout via CPOR Pin On the ISL88011 and ISL88014, users can adjust the Power On Reset timeout delay (tPOR) up to many times the normal tPOR of 250ms. To do this, connect a capacitor between CPOR and ground (see Figure 3). For example, connecting a 30pF capacitor to CPOR will increase tPOR from a typical 250ms to about 2.5s. NOTE: Care should be taken in PCB layout and capacitor placement in order to reduce stray capacitance as much as possible, which lengthens the tPOR timeout period. FIGURE 4. CONNECTING A MANUAL RESET PUSH-BUTTON Watchdog Timer The Watchdog Timer circuit checks microprocessor activity by monitoring the WDI input pin. The microprocessor must periodically toggle the WDI pin within tWDT (1.6s nominal), otherwise the reset signal is asserted (see Figure 5). Internally, the 1.6s timer is cleared by either a reset or by toggling the WDI input. Besides the 1.6s default timeout during normal operation, these devices also have a longer 51s timeout for startup. During this time, a reset cannot be asserted due to the WDI not being toggled. The longer delay at power-on allows an operating system to boot, an FPGA to initialize, or the system software to initialize without the burden of dealing with the Watchdog. CPOR ISL88011 ISL88014 Symbol Table 6 WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from LOW to HIGH Will change from LOW to HIGH May change from HIGH to LOW Will change from HIGH to LOW Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance 5 tPOR (s) 4 3 2 1 0 0 10 20 40 30 50 60 70 80 CPOR (pF) FIGURE 3. ADJUSTING tPOR WITH A CAPACITOR 8 FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 VTHVDD VDD 1V START tWDT <tWDT <tWDT STARTtWDT tWDT WDI >tWDPS RST tPOR tPOR RST FIGURE 5. WATCHDOG TIMING DIAGRAM Typical Parametric Performance Curves 4.70 11 4.65 10 VTHVDD (V) I DD (µA) 9 4.60 VDD = 5V 8 VDD = 3.3V 7 VDD = 2.5V 4.55 4.50 4.45 4.40 6 5 4.35 -45 -35 -25 -15 0 15 25 35 45 55 Vth_VDD = 4.64V 4.30 65 75 85 95 Vth_VDD = 4.38V -45 -35 -25 -15 TEMPERATURE (°C) 3.20 2.40 3.10 VTH_VDD = 2.92V 2.70 2.60 2.50 2.40 Vth_VDD = 4.38V 2.63V VTH_VDD = VTHVDD (V) VTHVDD (V) 2.35 VTH_VDD = 3.09V 2.90 2.80 15 25 35 45 55 65 75 85 95 FIGURE 7. VTHVDD, VDD = 5V vs TEMPERATURE FIGURE 6. IDD (ISL88011, ISL88012, ISL88013) vs TEMPERATURE 3.00 0 TEMPERATURE (°C) 2.30 Vth_VDD = 2.32V 2.25 2.20 2.15 Vth_VDD = 2.19V 2.10 -45 -35 -25 -15 0 15 25 35 45 55 65 75 85 95 TEMPERATURE (°C) FIGURE 8. VTHVDD, VDD = 3.3V vs TEMPERATURE 9 -45 -35 -25 -15 0 15 25 35 45 55 65 75 85 95 TEMPERATURE (°C) FIGURE 9. VTHVDD, VDD = 2.5V vs. TEMPERATURE FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Typical Parametric Performance Curves (Continued) 230 0.606 225 VTHVMON (V) 0.608 220 tPOR (ms) 0.604 0.602 0.600 0.598 215 210 205 0.596 200 -45 -35 -25 -15 0 15 25 35 45 55 65 75 85 95 -45 -35 -25 -15 0 TEMPERATURE (°C) 15 25 35 45 55 65 75 85 95 TEMPERATURE (°C) FIGURE 11. tPOR (CPOR OPEN) vs TEMPERATURE FIGURE 10. VTHVMON vs TEMPERATURE Typical Application Circuits 12V 12V 12V SUPPLY 10k 180k 100k VDD VMON 44k RESET RST 4.7V RST PGOOD @ 10.8V 10k VTH @ 11.4V ISL88014 / ISL88015 ISL88011IH531Z FIGURE 13. 12V SUPPLY PGOOD or PGOOD FIGURE 12. HIGH ACCURACY 12V SUPPLY MONITOR 12V PGOOD @ 10.8V VDD 0.1µF 10k RST +5V 5V 100k 100k PGOOD 180k 100k VDD RST VTH @ 11.4V RST RST VTH2 @ 4.4V 6.81k ISL88012 VDD 100k VMON 10k 100k -5V V2MON -5V GND ISL88012IH546Z PGOOD = HIGH IF -V < -4.6V AND -V + +V > 9.4 (abs) FIGURE 14. MONITOR 5V AND 12V SUPPLIES 10 FIGURE 15. +5V AND -5V MONITOR FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Typical Application Circuits (Continued) 3.3V 3.3V VTHL @ 3.09V VDD 100k PGOOD RST 50k ISL8801X-31 3.3V VDD VTHH @ 3.6V VMON 100k RST 10K ISL88014/ISL88015 VOLTAGE OUT OF RANGE = PGOOD LOW FIGURE 16. OVER/UNDERVOLTAGE MONITOR 11 FN8093.1 December 14, 2006 ISL88011, ISL88012, ISL88013, ISL88014, ISL88015 Small Outline Transistor Plastic Packages (SOT23-5) P5.064 D VIEW C e1 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES 5 SYMBOL 4 E CL 1 2 CL 3 e E1 b CL α 0.20 (0.008) M C C CL A A2 SEATING PLANE A1 -C- WITH b PLATING b1 c c1 MILLIMETERS MAX MIN MAX NOTES A 0.036 0.057 0.90 1.45 - A1 0.000 0.0059 0.00 0.15 - A2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 D 0.111 0.118 2.80 3.00 3 E 0.103 0.118 2.60 3.00 - E1 0.060 0.067 1.50 1.70 3 e 0.0374 Ref 0.95 Ref - e1 0.0748 Ref 1.90 Ref - L 0.10 (0.004) C MIN 0.014 0.022 0.35 0.55 L1 0.024 Ref. 0.60 Ref. L2 0.010 Ref. 0.25 Ref. N 5 5 4 5 R 0.004 - 0.10 - R1 0.004 0.010 0.10 0.25 α 0o 8o 0o 8o Rev. 2 9/03 NOTES: BASE METAL 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 4X θ1 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. R1 4. Footlength L measured at reference to gauge plane. 5. “N” is the number of terminal positions. R GAUGE PLANE SEATING PLANE L C L1 α L2 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. 4X θ1 VIEW C All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 FN8093.1 December 14, 2006