ANP002: The Protection of USB 2.0 Applications

APPLICATION NOTE
The Protection of USB 2.0 Applications
ANP002 B BY J OCHEN B AIER
1. ESD-confi rm USB Interfaces ___________________________________
The USB-Interface might be the most distributed PC interface in the world. The usage in industry-applications
is more and more common. Let’s have a closer look to the special environmental conditions of industry
applications.
That there are real concerns regarding the robustness against EMI and ESD is written in Intel’s “High Speed
USB Platform Design Guidelines”. Intel recommends the usage of a common mode choke for EMI
suppressions and another component for protection against ESD pulses.
Würth Elektronik offers all these types of products.
-
The WE-CNSW common mode choke was developed for EMI suppression on high speed signal
lines
-
For ESD suppression the TVS diode arrays WE-TVS with very low capacitances (<2pF) or the
ESD Suppressors WE-VE (capacitances down to 0.05pF) are your preferred choice.
But for outstanding EMI behaviour it is absolutely necessary to protect the power supply (Vbus) as well. A lot of
design engineers forget this important point and wonder themselves when their product don’t pass all the tests
in EMI lab.
Two typical schematics for optimized protection of one or two USB ports are shown below:
Chip Bead Ferrite
VBUS
D+
Rt
D+
D-
Rt
D-
Ct
Common Mode
Choke
Ct
GND
WE-TVS
VBUS
D+
D-
Ct
Ct
Rt
Common Mode
Choke
Rt
D+
DGND
GND
USB Port 2
USB Controller
VBUS
USB Port 1
With one TVS diode array WE-TVS you can fully protect two USB lines. All four signal lines as well as the
common power supply are well protected.
Figure 1: Two-Port-USB-Interface with ESD-Protection
ANP002b, 2015-03-13, JB
Page 1 of 11
APPLICATION NOTE
The Protection of USB 2.0 Applications
For further optimization, i.e. to filter incoming common mode noise as well as differential mode noise from USB
line, a LC filter is built with the common mode choke WE-CNSW and the capacitors.
For power supply lines very good noise suppressions can be reached with a chip bead ferrite, like the Würth
Elektronik WE-CBF series.
Chip Bead Ferrite
VBUS
D+
Rt
D+
D-
Rt
D-
Ct
Ct
Common Mode
Choke
ESD Suppressor
GND
USB Port
USB Controller
VBUS
Varistor
Figure 2: In contrast to the shielding of the dataline no low capacitive ESD suppressor is necessary at the power
supply
Single line protection components like ESD suppressors series WE-VE also have to be connected from signal
line to GND. For power line protection it is not necessary to use a low cap ESD suppressor, you might prefer
a standard SMD varistor which can withstand higher surges and higher transient energies.
2. About T VS Diodes ___________________________________________
Würth Elektronik launched the TVS diodes array series called WE-TVS. These TVS diodes arrays include
three main functions:
-
protection against ESD pulses according to EN 61000-4-2
protection against surge pulses according to EN 61000-4-5
protection against EFT pulses according to EN 61000-4-4
WE-TVS series are high performance designed TVS diode arrays which include surge rated diodes. They are
the best choice to protect high speed data lines like USB 2.0, DVI or LAN from over-voltages. The WE-TVS
series exceeds the requirements outlined in EN 61000-4-2. Due to their ultra-low capacitance (<2.0 pF) they
are nearly invisible on the signal lines.
3. About ESD Suppressor _______________________________________
The ESD suppressors are special raised varistors with a low and defined intrinsic capacitance. Würth
Elektronik has three different series:
-
WE-VE standard series: Capacitances of 1pF to 120pF and voltages from 5V to 24V
WE-VE “ULC” series: Capacitance of 0.2pF, suitable for signal lines up to 12V
WE-VE femtoF series: Capacitance of 0.05pF and rated voltages of 6V, 14V and 26V
For the first two series are also four-fold array packages available.
ANP002b, 2015-03-13, JB
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APPLICATION NOTE
The Protection of USB 2.0 Applications
3.1.
Why ESD Protection?
Since the first electronic developments, all the parts are subjected to electrostatic discharge. ESD events have
peak voltages up to 30kV and therewith they are very dangerous for all kind of integrated circuits. However,
some state-of-the-art ICs are protected against ESD pulses but real world conditions show daily that an
additional protection device is indispensable. On the one hand to have the whole board ESD free and on the
other hand to develop more reliable products to satisfy the needs of your customers.
3.2.
Why EMI Suppression?
With the increase in electronic/electrical products and the need to have wireless connectivity in today’s global
markets, there is an increased requirement to ensure that your product is immune to the impacts caused by
both the intentional and un-intentional RF environment. Only if you consider now which EMI phenomena
impacts on the product, will you be able to design in the appropriate protection and reduce time to market.
In addition, the product must not generate excessive levels of EMI and this is typically assessed by an EMC
Test Laboratory, and should the product fail then costs to implement remedial work will increase aggressively.
4. Different Protection De vices for Different Req uire me nts ___________
Es sind vier verschiedene TVS Dioden Arrays und fünf verschiedene ESD Suppressor erhältlich:
Order Code
Package
Pin
I/O / VDD
Conf.
Lines
VRWM
CIN
IPP
VESD
VCl ESD
2,0 pF
12 A
20 kV
13 V
VDD can
float
824 011
SOT23-5L
1
2/1
5V
824 002 74
SC70-6L
2
4/1
5V
824 015
SOT23-6L
2
4/1
5V
2,0 pF
12 A
20 kV
13 V
No
824 001
SOT23-6L
2
4/1
5V
1,0 pF
5A
15 kV
14 V
No
824 014
SOT23-6L
3
4/1
5V
0,5 pF
4A
16 kV
12 V
Yes
824 014 44
MSOP-10L
823 07 050 029
0402
4
1
5V
0,2 pF
-
8 kV
17 V
-
823 06 050 029
0603
4
1
5V
0,2 pF
-
8 kV
30 V
-
ANP002b, 2015-03-13, JB
No
No
Yes
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APPLICATION NOTE
The Protection of USB 2.0 Applications
VDD
I/O 2
I/O 4
VDD
I/O 3
I/O 4
VDD
I/O 3
5
4
6
5
4
6
5
4
Pin Configuration 4
1
2
3
1
2
3
1
2
3
NC
GND
I/O 1
I/O 1
GND
I/O 2
I/O 1
GND
I/O 2
Pin Configuration 1
Pin Configuration 2
Pin Configuration 3
Pin Configuration 5
Figure 3: Several Pin-Configurations of WE-TVS series
4.1.
How to find the Suitable Part ?
-
You have supply voltage to connect for rail-to-rail clamping
 take TVS diode
-
You don’t have supply voltage or do prefer ceramic components
 take TVS diode where VDD pin can float or take WE-VE ESD suppressor
-
Which maximum capacitance can you add to your data lines to pass the eye pattern test?
 For USB 2.0 line capacitances up to 5pF shouldn’t cause any trouble
-
What’s the maximum expected ESD voltage that can occur?
-
Do you want to protect one or two USB lines? However, connecting one USB data line with two
I/Oports of TVS diode lets you get a better performance?
 select array type
Answer all these questions and you will find the most suitable part for you.
We recommend for one USB 2.0 port WE-TVS 824 011 and for two USB 2.0 ports 824 015.
Designers preferring single line components may choose WE-VE ULC 823 07 050 029 or 823 06 050 029.
ANP002b, 2015-03-13, JB
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APPLICATION NOTE
The Protection of USB 2.0 Applications
5. Eye Pattern T est _____________________________________________
After making a choice of protection element you have to ensure that your whole interface design meets the
requirements of USB specification. Therefore you can use our protection devices with a small capacitance
which is nearly invisible on the signal lines.
Figure 4: Eye pattern test without any protection component placed on two USB 2.0 differential signal lines
Figure 5: Eye pattern test with TVS diode WE-TVS 824 015
The eye pattern test shows that the WE-TVS do not disturb the USB 2.0 signal. You would get the same result
with our other here listed TVS diodes and with the ESD suppressors as well.
The following table shows the cutting edge ultra-low capacitance technology of Würth Elektronik. This new
technology enables a channel to channel capacitance which is almost invisible at normal operating conditions.
Order Code
Package
I/O
VRWM
CIN
CX
824 015
SOT23-6L
4
5
2 pF
0.1 pF
Competitor S
SOT23-6L
4
5
3 pF
1.5 pF
824 001
SOT23-6L
4
5
1 pF
0.1 pF
Competitor P
SOT23-6L
4
5
3 pF
1.5 pF
I/O
VRWM
Number of I/O lines the TVS-Diode can protect
Max. reverse working voltage
CIN
Input capacitance at I/O pin via. GND (VIN = 2,5V, VDD=5V)
CX
Input capacitance between I/O pins (VIN = 2,5V, VDD=5V)
Table 1: Comparison of Parts for Capacitance
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APPLICATION NOTE
The Protection of USB 2.0 Applications
6. T esting the Protection Level of ESD Protection De vices ___________
The easiest way to measure the protection level is to apply an ESD pulse to your electronic circuit with the
ESD protection device and measure the peak voltage of this ESD pulse before and after the protection device.
But this way carries out different problems.
Due to high frequency and wide range of ESD pulse (few MHz to some GHZ) high frequency refractions will
occur during the measurement. The absolute peak voltage and the spike voltages during the refractions are
an indicator for better and worse protection, but you cannot indicate the definitive clamping voltage. And by
the way, this is not a reliable and repeatable measurement!
Engineers being familiar with semiconductor products do know the TLP measuring method. The TLP
(transmission line pulsing) method is an accurate measurement system which allows - due to all
measurements are done in a 50-System - repeatable and very accurate measurements.
A defined current impulse (left) is charged into the protection component and the resulting voltage across it is
measured (middle). This procedure is repeated with increasing TLP currents. As a result you get the TLP curve
(right).
100ns
1
4
6
ITLP
7
DUT
2
3
5
ITLP
7
6
VTLP
5
4
3
2
1
VTLP
Figure 6: TLP measurement system with corresponding TLP curve
This measurement can be done for VDD and I/O pins. The lower the voltage you measure, the better is the
protection device and therewith the reliability of your electronic circuit.
Thanks to the built in snap-back technology, Würth Elektronik TVS diodes have the lowest ESD clamping
voltage on the market. Compared to competitors’ products, the WE-TVS do outperform them clearly! This you
can see with a short view at the TLP curves.
ANP002b, 2015-03-13, JB
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APPLICATION NOTE
The Protection of USB 2.0 Applications
Order Code
Package
I/O
VRWM
VCl,IO
VCl,VDD
VESD
CIN
IPP
824 015
SOT23-6L
4
5
12
7,5
12 kV
2 pF
12 A
Competitor S
SOT23-6L
4
5
22
15,5
15 kV
3 pF
12 A
824 001
SOT23-6L
4
5
14
9
8 kV
1 pF
5A
Competitor P
SOT23-6L
4
5
28
19
8 kV
3 pF
6A
I/O
Number of I/O lines the TVS-Diode can protect
VRWM
Max. reverse working voltage
VCl,IO
ESD clamping voltage at I/O pin (IEC 61000-4-2, contact mode at 6kV)
VCl,VDD
ESD clamping voltage at VDD pin (IEC 61000-4-2, contact mode at 6kV)
VESD
Max. withstanding ESD pulse (IEC 61000-4-2, contact mode)
CIN
Input capacitance at I/O pin via. GND (VIN = 2,5V, VDD=5V)
IPP
Max. Withstanding surge current (8/20µs)
Table 2: Comparison of Parts for VDD
VDD vs GND TLP (Transmission Line Pulsing)
16
16
14
14
12
10
8
824 015
6
824 001
4
12
10
8
824 015
6
824 001
4
Competitor S
2
I/O vs GND TLP (Transmission Line Pulsing)
18
TLP Current [A]
TLP Current [A]
18
Competitor S
2
Competitor P
0
Competitor P
0
0
5
10
15
20
TLP Voltage [V]
Figure 7: TLP Curve of different parts for VDD
ANP002b, 2015-03-13, JB
25
30
0
5
10
15
20
25
30
TLP Voltage [V]
Figure 8: TLP Curve of different parts for I/O lines
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APPLICATION NOTE
The Protection of USB 2.0 Applications
7. Recomme nded Layout for Si ngle USB Port _______________________
The two differential signal lines (D+ and D-) are routed from connector to TVS-Diode (WE-TVS 824 011) and
via a common mode choke (WE-CNSW 744 232 090) to the USB controller as shown on the left picture below.
This results in an awesome ESD protection and EMI suppression of both data lines.
VBUS is routed like the signal line, but instead of the common mode choke a chip bead ferrite (WE-CBF
742 792 641) is used. After the chip bead you may add a capacitor and a second chip bead as well to get the
highest possible EMI suppression effect.
Figure 9: Protection of single USB port
For very sensible IC’s and / or high reliable applications you can get an optimized ESD suppression effect if
you double contact a four-fold TVS array (WE-TVS 824 015) like shown on picture.
Figure 10: Double Protection of single USB port
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APPLICATION NOTE
The Protection of USB 2.0 Applications
Designers preferring single channel components can also use the ESD Suppressors WE-VE. The connection
has to be carried out from D+ / D- to GND.
The other parts are connected in same way as above.
Figure 11: Protection of single USB port
7.1.
Recomme nded Layout for Double USB Port
According to single USB port protection the routing is very similar. Use here exactly the same parts as for
single port protection and the protection level will also be the same.
Figure 12: Protection of double USB port
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APPLICATION NOTE
The Protection of USB 2.0 Applications
8. Interface Desig n Kit __________________________________________
For an easy design of interfaces Würth Elektronik has launched a special Interface Design Kit. This design kit
includes a design guide for USB 1.0 to USB 2.0, CAN, Ethernet, VGA, DVI, RS232 and RS485 interfaces and
all the components used. These are ESD Suppressors, SMD Common Mode Chokes, Chip Bead Ferrites,
LAN Transformers and the corresponding Connectors.
In total are 35 different passive components with 235 parts and 4 evaluations boards in.
The colour scheme makes it easy to locate the suitable parts for your application. Just follow the specific
application colour and arrange your needed parts.
For each application you find a simple block schematic where you see how to place the different components
to get the best result. Try it - it’s worth each penny!!
ANP002b, 2015-03-13, JB
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APPLICATION NOTE
The Protection of USB 2.0 Applications
IMPORT ANT NOTICE
The Application Note is based on our knowledge and experience of typical requirements concerning these areas. It serves
as general guidance and should not be construed as a commitment for the suitability for customer applications by Würth
Elektronik eiSos GmbH & Co. KG. The information in the Application Note is subject to change without notice. This
document and parts thereof must not be reproduced or copied without written permission, and contents thereof must not
be imparted to a third party nor be used for any unauthorized purpose.
Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance of
any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The
responsibility for the applicability and use of WE Products in a particular customer design is always solely within the
authority of the customer. Due to this fact it is up to the customer to evaluate and investigate, where appropriate, and
decide whether the device with the specific product characteristics described in the product specification is valid and
suitable for the respective customer application or not.
The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the
data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at
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ANP002b, 2015-03-13, JB
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