Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UCSR3651S
Preliminary
CMOS IC
HIGH PRECISION CC/CV
PRIMARY-SIDE PWM POWER
SWITCH

DIP-7A
DESCRIPTION
The UTC UCSR3651S is a primary control switch mode charger
and adapter applications. The controlled variable is transferred by
an auxiliary winding from the secondary to the primary side. The
device integrates PWM controller to enhance the performance of
discontinuous conduction mode (DCM) flyback converters.
The UTC UCSR3651S operates in primary-side sensing and
regulation. Opto-coupler and TL431 could be eliminated. It also
provides off-time modulation to linearly decrease PWM frequency
under light-load conditions so that low standby power can be
achieved.
The UTC UCSR3651S achieves high precision CV/CC
regulation and high power efficiency. It offers comprehensive
protection coverage with auto-recovery features including
Cycle-by-cycle current limiting, VDD over voltage protection, VDD
clamp, OTP, leading edge blanking, VDD under voltage lockout, etc.

FEATURES
* High Voltage startup circuit
* Built-in 650V Power MOSFET
* ±5% constant voltage regulation at universal AC input
* High precision constant current regulation at universal AC input
* Primary side control without TL431 and opto-coupler
* Programmable CV and CC regulation
* Programmable cable compensation in CV mode
* Flyback topology in DCM operation
* Frequency hopping to reduce system EMI

SOP-8
* Built-in leading edge blanking
* Built-in primary winding inductance
compensation
* Power on soft start
* Gate Output Maximum Voltage Clamped at
15V
* Cycle-by-cycle current limiting
* Over voltage protection
* VDD under-voltage lockout
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UCSR3651SL-D07A-T
UCSR3651SG-D07A-T
UCSR3651SG-S08-R
Package
Packing
DIP-7A
SOP-8
Tube
Tape Reel
UCSR3651SL-D07A-T
(1)Packing Type
(1) T: Tube, R: Tape Reel
(2)Package Type
(2) D07A: DIP-7A, S08: SOP-8
(3)Green Package
(3) L: Lead Free, G: Halogen Free and Lead Free
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UCSR3651S
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Preliminary
CMOS IC
MARKING
DIP-7A
SOP-8

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
DIP-7A
1
2
3
4
5, 6
7
SOP-8
1
2
3
4
5, 6
7, 8
PIN NAME
VDD
COMP
INV
CS
DRAIN
GND
DESCRIPTION
Power supply
Loop compensation
The voltage feedback from the auxiliary winding
Current sense input
Power MOSFET Drain Pin
Ground
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UCSR3651S

Preliminary
CMOS IC
BLOCK DIAGRAM
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UCSR3651S

Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
Drain Voltage (Off State)
BVDSS
-0.3~Bvdss
V
VDD Zener Clamp Continuous Current
IDD
10
mA
COMP Voltage
VCOMP
-0.3~7
V
CS Input Voltage
VCS
-0.3~7
V
INV Input Voltage
VINV
-0.3~7
V
Operating Junction Temperature
TJ
-20~150
°C
Storage Temperature
TSTG
-55~150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

THERMAL CHARACTERISTICS
PARAMETER
Junction to Ambient

SYMBOL
DIP-7A
SOP-8
θJA
RATINGS
75
90
UNIT
°C/W
°C/W
RATINGS
10
8
UNIT
W
W
OUTPUT POWER TABLE
Adapter (Note 1)
PARAMETER
230VAC±15%
85-264VAC
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Preliminary
CMOS IC
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=15V, unless otherwise specified)
PARAMETER
STARTUP SECTION
Startup Voltage
Startup Current
SUPPLY SECTION
Turn-on Threshold Voltage
Turn-off Threshold Voltage
VDD OVP Protection
Operating Current
Green-Mode Operating Current
OSCILLATOR SECTION
Maximum Frequency
Minimum Frequency at CCM
Minimum Frequency at No-load
Frequency Hopping Range
SYMBOL
VST
IST
VTH(ON)
VTH(OFF)
VDD_OVP
IDD-OP
IDD-GREEN
fOSC
fOSC-CM-MIN
fOSC-N-MIN
∆f
freq
TEST CONDITIONS
VDD<VTH(ON)
VDD<VTH(ON)
MIN TYP MAX UNIT
25
700
V
μA
13.5 14.5 16
8.2
9
10.5
28
1.6
2
1.3
V
V
V
mA
mA
55
65
17
300
±5.0
75
kHz
kHz
Hz
%
Frequency Hopping Period
tFHR
3
ms
INV SECTION
Reference Voltage for EA
VVR
1.97 2.00 2.03
V
Reference Voltage for CCM
VVR_CCM
0.5
V
Max. Cable Compensation Current
ICABLE_MAX
37
μA
CURRENT SENSE SECTION
Current Sense Threshold Voltage
VCS
870 900 930
mV
OCP Propagation Delay
tD_OC
90 200
nS
Leading Edge Blank Time
tLEB
900
nS
Soft Start Time
tSS
10
mS
POWER MOSFET SECTION
MOSFET DS Breakdown Voltage
BVDSS
650
V
On Resistance
RDS(ON)
3
Ω
OTP SECTION
Threshold Temperature of OTP (Note 2)
TOTP
+140
°C
Notes: 1. Maximum practical continuous power in an Adapter design with sufficient drain pattern as a heat sink, at
50°C ambient.
2. When the over-temperature protection is activated, the power system enters auto restart mode and output
is disabled.
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Preliminary
CMOS IC
OPERATION DESCRIPTION
The UTC UCSR3651S is a primary control switch mode charger and adapter applications. It operates in
primary-side sensing and regulation. Opto-coupler and TL431 could be eliminated. Proprietary built-in CV and CC
control can achieve high precision CV/CC performance. The device integrates PWM controller to enhance the
performance of discontinuous conduction mode (DCM) flyback converters.
Startup control
The VDD pin of UTC UCSR3651S is connected to the line input through a resistor. A large value startup resistor
can be used to minimize the power loss in application because the start current of UTC UCSR3651S is very low.
When the VDD voltage reaches VTH(ON), the internal startup circuit is disabled and the IC turns on.
Operating Current
The Operating current of UTC UCSR3651S is as low as 1.6mA. Good efficiency and very low standby power can
be achieved.
Constant Voltage Operation
The output voltage is defined by the transmission ratio between the secondary and auxiliary winding. The UTC
UCSR3651S captures the auxiliary winding feedback voltage at INV pin and operates in constant-voltage (CV) mode
to regulate the output voltage. The auxiliary voltage reflects the output voltage is given by:
VAUX =
NA
×(VO + ∆V)
NS
(1)
Where △V indicates the drop voltage of the output diode.
Figure 2. Auxiliary voltage waveform
Via a resistor divider connected between the auxiliary winding and INV, the VAUX is sampled at the Tsampling end
and it is hold until the next sampling. The sampled voltage is compared with 2.0V reference voltage and the error is
amplified. The error amplifier output reflects the load condition and controls the TOFF time and the Ipk to regulate the
output voltage, thus constant output voltage can be achieved.
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UCSR3651S
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Preliminary
CMOS IC
OPERATION DESCRIPTION (Cont.)
Constant Current Operation
When the sampled voltage is below 2.0V reference voltage and the error amplifier output reaches its maximum,
thus UTC UCSR3651S operates in constant-current (CC) mode. The CC point and maximum output power can be
externally adjusted by external current sense resistor Rcs. The larger Rcs, the smaller CC point is, and the smaller
output power becomes.
Large
Rcs
VOUT
Small
Rcs
IOUT
Figure 3. Adjustable output power by changing RCS
Figure 4. Secondary current waveform
In CC operation, the CC loop control function of UTC UCSR3651S will keep a fixed proportion between secondary
inductance de-magnetization time (Tdemag) and switching cycle time (Tsw). The fixed proportion is
Tdemag 1
=
Tsw
2
(2)
Thus the output current is given by:
IOUT 
N
Tdemag 1 NP
 P  IPK 
 
 IPK
2 NS
Tsw
4 NS
1
(3)
Programmable Cable Drop Compensation
UTC UCSR3651S has a built-in cable voltage drop compensation to achieve good load regulation. An offset
voltage is generated at INV pin by an internal current flowing into the resistor divider. The current is inversely
proportional to the voltage of COMP pin. As a result, it is inversely proportional to the output load current. The
voltage drop across the cable is compensated by this offset voltage at INV pin. It can also be programmed by
adjusting the resistance of the divider to compensate the drop for various cable lines used.
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UCSR3651S
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Preliminary
CMOS IC
OPERATION DESCRIPTION (Cont.)
Current Sensing and Leading Edge Blanking
Cycle-by-cycle current limiting is offered in UTC UCSR3651S. The switch current is detected by a sense resistor
into the CS pin. When the power switch is turned on, a turn-on spike will occur on this resistor. A 900ns leading-edge
blanking is built in to avoid false-termination of the switching pulse so that the external RC filtering is no longer
needed.
Protection Control
Good power supply system reliability is achieved with its comprehensive protection features including VDD
over-voltage protection, VDD Clamp, GATE Clamp, Power on soft start, Cycle-by-cycle current limiting, short circuit
protection, leading edge blanking, OTP and UVLO, etc.
VDD is supplied by transformer auxiliary winding output. The output of UTC UCSR3651S is shutdown when VDD
drops below VTH(OFF) and the power converter enters power on start-up sequence thereafter.
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Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT (5V, 1A)
BOM
Reference
BD1
L1
C1
C2
C3
C4
C5
C6
D1,D2
D3
Component
BD 1A/650V
1m H 6x8mm
EC 4.7u F 400V 105°C
EC 4.7u F 400V 105°C
EC 4.7u F 50V 105°C
CC 1n F 1000V 1206
CC 0.1u F 50V 0805
EC 1000u F 10V 105°C
Diode UTC 1N4007G
Diode UTC SB340
Reference
R1
R4
R5
R6
R7
R8
T1
F1
CY1
Component
R 2.4KΩ 1206 ±5%
R 200KΩ 1206 ±5%
R 18KΩ 0805 ±1%
R 3.3KΩ 0805 ±1%
R 1.8Ω 1206 ±5%
R 3.3KΩ 1206 ±5%
EE-16
FUSE 1A 250VAC
Y/C 1000p F 250V
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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