IDT IDT74FCT374ADB

IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL
D REGISTERS (3-STATE)
FEATURES:
•
•
•
•
•
•
•
•
•
IDT54/74FCT374A/C
DESCRIPTION:
IDT54/74FCT374A up to 30% faster than FAST
IDT54/74FCT374C up to 50% faster than FAST
IOL = 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
Edge-triggered master/slave, D-type flip-flops
Buffered common clock and buffered common 3-state control
MIlitary product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC, CERPACK
The FCT374 is an 8-bit register built using an advanced dual metal CMOS
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the OE input is high, the
outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT374 has non-inverting outputs with respect to the data at the D
inputs.
FUNCTIONAL BLOCK DIAGRAM
D0
D2
D1
D3
D4
D6
D5
D7
CP
CP
D
CP
D
CP
D
CP
D
D
CP
D
CP
CP
D
D
CP
Q
Q
Q
Q
Q
Q
Q
Q
O0
O1
O2
O3
O4
O5
O6
O7
OE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MAY 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5423/1
IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
3
18
D7
D1
4
17
D6
O1
5
16
O6
O2
6
15
O5
D2
7
14
D5
D3
8
13
D4
O3
9
12
O4
10
11
CP
GND
D1
4
O1
3
2
1
Rating
Terminal Voltage
D7
5
17
D6
O2
6
16
O6
D2
7
15
O5
D3
8
14
D5
9
10
Terminal Voltage
Operating Temperature
Unit
Pin Names
–0.5 to +7
–0.5 to +7
V
Dx
D flip-flop data inputs
CP
Clock Pulse for the register. Enters data on LOW-toHIGH transition.
Description
–0.5 to VCC
–0.5 to VCC
V
Ox
3-State Outputs (TRUE)
0 to +70
–55 to +125
°C
Ox
3-State Outputs (INVERTED)
OE
Active LOW 3-State Output Enable Input
Temperature under BIAS
–55 to +125
–65 to +135
°C
TSTG
Storage Temperature
–55 to +125
–65 to +150
°C
PT
Power Dissipation
0.5
0.5
W
IOUT
DC Output Current
120
120
mA
FUNCTION TABLE(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
Function
High-Z
Load
Register
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
10
pF
COUT
Output Capacitance
VOUT = 0V
8
12
pF
OE
H
H
L
L
H
H
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
NC = No Change
↑ = LOW-to-HIGH transition
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
13
Military
TBIAS
Symbol
12
Commercial
with Respect to GND
TA
11
PIN DESCRIPTION
with Respect to GND
VTERM(3)
19
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
VTERM(2)
20
18
CERDIP/ SOIC/ CERPACK
TOP VIEW
Symbol
O7
D0
D4
O7
VCC
19
O4
2
OE
O0
INDEX
CP
VCC
O0
20
GND
1
O3
OE
D0
PIN CONFIGURATION
NOTE:
1. This parameter is measured at characterization but not tested.
2
Inputs
CP
L
H
↑
↑
↑
↑
Dx
X
X
L
H
L
H
Outputs
Qx
Z
Z
L
H
Z
Z
Internal
Qx
NC
NC
H
L
H
L
IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ±5%, Military: TA = -55°C to +125°C, VCC = 5.0V ±10%
Symbol
Test Conditions(1)
Parameter
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
VIL
Input LOW Level
Guaranteed Logic LOW Level
IIH
Input HIGH Current
VCC = Max.
IIL
Input LOW Current
IOZH
VCC = Max.
IOZL
Off State (High Impedance)
Output Current
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
IOS
VOH
VOL
Short Circuit Current
Output HIGH Voltage
Output LOW Voltage
GND(3)
Min.
Typ.(2)
Max.
Unit
2
—
—
V
V
—
—
0.8
VI = VCC
—
—
5
VI = 2.7V
—
—
5(4)
VI = 0.5V
—
—
–5(4)
VI = GND
—
—
–5
VO = VCC
VO = 2.7V
VO = 0.5V
VO = GND
—
—
—
—
—
—
—
—
—
–0.7
10
10(4)
–10(4)
–10
–1.2
–60
VHC
VHC
2.4
2.4
—
—
—
—
–120
VCC
VCC
4.3
4.3
GND
GND
0.3
0.3
—
—
—
—
—
VLC
VLC(4)
0.5
0.5
VCC = Max., VO =
VCC = 3V, VIN = VLC or VHC, IOH = –32µA
VCC = Min
IOH = –300µA
VIN = VIH or VIL
IOH = –12mA MIL
IOH = –15mA COM'L
VCC = 3V, VIN = VLC or VHC, IOL = 300µA
VCC = Min
IOL = 300µA
VIN = VIH or VIL
IOL = 32mA MIL
IOL = 48mA COM'L
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
3
µA
µA
V
mA
V
V
IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Min.
Typ.(2)
Max.
Unit
VCC = Max.
VIN ≥ VHC; VIN ≤ VLC
—
0.2
1.5
mA
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
OE = GND
VIN ≥ VHC
VIN ≤ VLC
—
0.15
0.25
mA/
MHz
VCC = Max.
Outputs Open
fCP = 10MHz
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
1.7
4
mA
50% Duty Cycle
OE = GND
VIN = 3.4V
VIN = GND
—
2.2
6
VCC = Max.
Outputs Open
fCP = 10MHz
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
4
7.8(5)
50% Duty Cycle
OE = GND
VIN = 3.4V
VIN = GND
—
6.2
16.8(5)
Symbol
Parameter
ICC
Quiescent Power Supply Current
∆ICC
ICCD
Test Conditions(1)
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
fi = 5MHz
One Bit Toggling
fi = 2.5MHz
Eight Bits Toggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for register devices (zero for non-register devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
Parameter
Propagation Delay
CP to Qx
Output Enable Time
Condition(1)
CL = 50pF
RL = 500Ω
Output Disable Time
Set-up Time HIGH or LOW
Dx to CP
Hold Time HIGH or LOW
Dx to CP
CP Pulse Width HIGH or LOW(3)
FCT374A
Min.(2)
Max.
2
6.5
FCT374C
Min.(2)
Max.
2
5.2
Unit
ns
1.5
6.5
1.5
5.5
ns
1.5
5.5
1.5
5
ns
2
—
2
—
ns
1.5
—
1.5
—
ns
5
—
5
—
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
Parameter
Propagation Delay
CP to Qx
Output Enable Time
Condition(1)
CL = 50pF
RL = 500Ω
Output Disable Time
Set-up Time HIGH or LOW
Dx to CP
Hold Time HIGH or LOW
Dx to CP
CP Pulse Width HIGH or LOW(3)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
5
FCT374A
Min.(2)
Max.
2
7.2
FCT374C
Min.(2)
Max.
2
6.2
Unit
ns
1.5
7.5
1.5
6.2
ns
1.5
6.5
1.5
5.7
ns
2
—
2
—
ns
1.5
—
1.5
—
ns
6
—
6
—
ns
IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
V CC
SWITCH POSITION
7.0V
500Ω
V OUT
VIN
Pulse
Generator
D.U.T
.
50pF
RT
500Ω
CL
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
3V
1.5V
0V
tREM
tSU
LOW-HIGH-LOW
PULSE
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
3V
1.5V
0V
tH
1.5V
1.5V
Octal link
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
OUTPUT
NORMALLY
HIGH
Octal link
Propagation Delay
SWITCH
CLOSED
tPZH
SWITCH
OPEN
tPLZ
3.5V
3.5V
1.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
Enable and Disable Times
VOH
0V
Octal link
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; ZO ≤ 50Ω; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT374A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
FCT
IDT
XX
XXXX
Temp. Range
Device Type
XX
Package
X
Process
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
Blank
B
Commercial
MIL-STD-883, Class B
SO
Commercial Options
Small Outline IC
D
E
L
Military Options
CERDIP
CERPACK
Leadless Chip Carrier
374A
374C
Fast CMOS Octal D Register (3-State)
54
74
– 55°C to +125°C
– 0°C to +70°C
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com
7
for Tech Support:
[email protected]
(408) 654-6459