EL5524, EL5624, EL5724, EL5824 ® Data Sheet May 23, 2005 Integrated Buffers with VCOM Features The EL5524, EL5624, EL5724, and EL5824 integrate a number of gamma reference buffers with a single VCOM amplifier. The EL5524 contains 4 gamma buffers, the EL5624 contains 6, the EL5724 contains 8, and the EL5824 contains 10. Each gamma buffer has a bandwidth of 12MHz and features a slew rate of 15V/µs. The output current is rated at 30mA continuous, 140mA peak. • 4 x gamma buffers (EL5524) The VCOM amplifiers are rated for 60mA continuous output current and 200mA peak. They also feature higher slew rate and bandwidth for use in error cancellation circuits. • 140mA max VCOM output current The EL5524 is available in the 14-pin HTSSOP package, the EL5624 in the 20-pin HTSSOP package, the EL5724 in the 24-pin HTSSOP package, and the EL5824 in the 28-pin HTSSOP package. All are specified for operation over the -40°C to +85°C temperature range. FN7346.1 • 6 x gamma buffers (EL5624) • 8 x gamma buffers (EL5724) • 10 x gamma buffers (EL5824) • Single VCOM amplifier • Low power - 5.4mA (EL5524) - 6.8mA (EL5624) - 8.3mA (EL5724) - 9.5mA (EL5824) • Pb-Free plus Anneal available (RoHS compliant) Applications • TFT-LCD displays • Flat panel monitors • Notebook displays • LCD-TVs Ordering Information (Continued) Ordering Information PART NUMBER PACKAGE TAPE & REEL PKG. DWG. # PART NUMBER PACKAGE TAPE & REEL PKG. DWG. # 24-Pin HTSSOP 13" MDP0048 EL5524IRE 14-Pin HTSSOP - MDP0048 EL5724IRE-T13 EL5524IRE-T7 14-Pin HTSSOP 7" MDP0048 MDP0048 14-Pin HTSSOP 13" MDP0048 24-Pin HTSSOP (Pb-free) - EL5524IRE-T13 EL5724IREZ (See Note) EL5524IREZ (See Note) 14-Pin HTSSOP (Pb-free) - MDP0048 EL5724IREZ-T7 (See Note) 24-Pin HTSSOP (Pb-free) 7" MDP0048 EL5524IREZ-T7 (See Note) 14-Pin HTSSOP (Pb-free) 7" MDP0048 EL5724IREZ-T13 (See Note) 24-Pin HTSSOP (Pb-free) 13" MDP0048 EL5524IREZ-T13 (See Note) 14-Pin HTSSOP (Pb-free) 13" MDP0048 EL5824IRE 28-Pin HTSSOP - MDP0048 EL5824IRE-T7 28-Pin HTSSOP 7" MDP0048 EL5624IRE 20-Pin HTSSOP - MDP0048 EL5824IRE-T13 28-Pin HTSSOP 13" MDP0048 EL5824IREZ (See Note) 28-Pin HTSSOP (Pb-free) - MDP0048 EL5624IRE-T7 20-Pin HTSSOP 7" MDP0048 EL5624IRE-T13 20-Pin HTSSOP 13" MDP0048 EL5624IREZ (See Note) 20-Pin HTSSOP (Pb-free) - MDP0048 EL5824IREZ-T7 (See Note) 28-Pin HTSSOP (Pb-free) 7" MDP0048 EL5624IREZ-T7 (See Note) 20-Pin HTSSOP (Pb-free) 7" MDP0048 EL5824IREZ-T13 (See Note) 28-Pin HTSSOP (Pb-free) 13" MDP0048 EL5624IREZ-T13 (See Note) 20-Pin HTSSOP (Pb-free) 13" MDP0048 EL5724IRE 24-Pin HTSSOP - MDP0048 EL5724IRE-T7 24-Pin HTSSOP 7" MDP0048 1 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL5524, EL5624, EL5724, EL5824 Pinouts EL5524 (14-PIN HTSSOP) TOP VIEW EL5624 (20-PIN HTSSOP) TOP VIEW VIN1 1 14 VOUT1 VIN1 1 20 VOUT1 VIN2 2 13 VOUT2 VIN2 2 19 VOUT2 12 VOUT3 VIN3 3 18 VOUT3 11 VOUT4 VIN4 4 17 VOUT4 VIN3 3 VIN4 4 THERMAL PAD 10 VS- VS+ 5 VINP 6 9 VOUT VS+ 6 VINN 7 8 NC VS+ 5 EL5724 (24-PIN HTSSOP) TOP VIEW THERMAL PAD 16 VS15 VS- VIN5 7 14 VOUT5 VIN6 8 13 VOUT6 VINP 9 12 VOUT VINN 10 11 NC EL5824 (28-PIN HTSSOP) TOP VIEW VIN1 1 24 VOUT1 VIN1 1 28 VOUT1 VIN2 2 23 VOUT2 VIN2 2 27 VOUT2 VIN3 3 22 VOUT3 VIN3 3 26 VOUT3 VIN4 4 21 VOUT4 VIN4 4 25 VOUT4 VIN5 5 20 VOUT5 VIN5 5 24 VOUT5 19 VS- VIN6 6 23 VOUT6 18 VS- VS+ 7 VIN6 8 17 VOUT6 VS+ 8 VIN7 9 16 VOUT7 VIN7 9 20 VOUT7 VIN8 10 15 VOUT8 VIN8 10 19 VOUT8 VINP 11 14 VOUT VIN9 11 18 VOUT9 VINN 12 13 NC VIN10 12 17 VOUT10 VS+ 6 VS+ 7 THERMAL PAD 2 THERMAL PAD 22 VS21 VS- VINP 13 16 VOUT VINN 14 15 NC EL5524, EL5624, EL5724, EL5824 Absolute Maximum Ratings (TA = 25°C) Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V, VS+ +0.5V Maximum Continuous Output Current (Buffer) . . . . . . . . . . . . 30mA Maximum Continuous Output Current (VCOM) . . . . . . . . . . . . 60mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications VS+ = +15V, VS- = 0, RL = 10kΩ, CL = 10pF to 0V, Gain of VCOM = 1, RLVCM = 1kΩ and TA = 25°C Unless Otherwise Specified PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT 14 mV INPUT CHARACTERISTICS (REFERENCE BUFFERS) VOS Input Offset Voltage VCM = 0V 2 TCVOS Average Offset Voltage Drift (Note 1) 5 IB Input Bias Current VCM = 0V 2 RIN Input Impedance CIN Input Capacitance AV Voltage Gain µV/°C 50 1 GΩ 1.35 1V ≤ VOUT ≤ 14V 0.992 nA pF 1.008 V/V 15 mV INPUT CHARACTERISTICS (VCOM AMPLIFIER) VOS Input Offset Voltage VCM = 7.5V 1 TCVOS Average Offset Voltage Drift (Note 1) 5 IB Input Bias Current VCM = 7.5V 2 RIN Input Impedance 1 GΩ CIN Input Capacitance 1.35 pF VREG Load Regulation VCOM = 1.5V, -60mA < IL < 60mA -20 AVOL Open Loop Gain RL = 1kΩ 55 75 dB CMRR Common Rejection Ratio 45 70 dB µV/°C 50 +20 nA mV OUTPUT CHARACTERISTICS (REFERENCE BUFFERS) VOL Output Swing Low IL = 7.5mA 50 150 mV VOH Output Swing High IL = 7.5mA 14.85 14.95 V ISC Short Circuit Current RL = 10Ω ±120 ±140 mA OUTPUT CHARACTERISTICS (VCOM AMPLIFIER) VOL Output Swing Low IL = -7.5mA VOH Output Swing High IL = +7.5mA 14.85 14.95 50 150 mV V ISC Short Circuit Current RL = 10Ω ±180 ±200 mA Reference buffer VS from 4.5V to 15.5V 55 80 dB VCOM buffer, VS from 4.5V to 15.5V 55 80 dB POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Total Supply Current 3 EL5524 (no load) 5.4 7 mA EL5624 (no load) 6.8 8.5 mA EL5724 (no load) 8.3 11 mA EL5824 (no load) 9.5 12.5 mA EL5524, EL5624, EL5724, EL5824 Electrical Specifications VS+ = +15V, VS- = 0, RL = 10kΩ, CL = 10pF to 0V, Gain of VCOM = 1, RLVCM = 1kΩ and TA = 25°C Unless Otherwise Specified (Continued) PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT 7 15 V/µs DYNAMIC PERFORMANCE (BUFFER AMPLIFIERS) SR Slew Rate (Note 2) -4V ≤ VOUT ≤ 4V, 20% to 80% tS Settling to +0.1% (AV = +1) (AV = +1), VO = 2V step 250 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz GBWP Gain-Bandwidth Product RL = 10kΩ, CL = 10pF 8 MHz PM Phase Margin RL = 10kΩ, CL = 10pF 50 ° CS Channel Separation f = 5MHz 75 dB 90 V/µs DYNAMIC PERFORMANCE (VCOM AMPLIFIERS) SR Slew Rate (Note 2) -4V ≤ VOUT ≤ 4V, 20% to 80% tS Settling to +0.1% (AV = +1) (AV = +1), VO = 6V step 150 ns BW -3dB Bandwidth RL = 1kΩ, CL = 2pF 35 MHz GBWP Gain-Bandwidth Product RL = 1kΩ, CL = 2pF 20 MHz PM Phase Margin RL = 1kΩ, CL = 2pF 50 ° NOTES: 1. Measured over operating temperature range 2. Slew rate is measured on rising and falling edges 4 65 EL5524, EL5624, EL5724, EL5824 Pin Descriptions EL5524 EL5624 EL5724 EL5824 PIN NAME PIN FUNCTION 1 1 1 1 VIN1 Input 2 2 2 2 VIN2 Input 3 3 3 3 VIN3 Input 4 4 4 4 VIN4 Input 5 5, 6 6, 7 7, 8 VS+ Positive supply 6 9 11 13 VINP Positive input - VCOM 7 10 12 14 VINN Negative input - VCOM 8 11 13 15 NC 9 12 14 16 VOUT 10 15, 16 18, 19 21, 22 VS- 11 17 21 25 VOUT4 Output 12 18 22 26 VOUT3 Output 13 19 23 27 VOUT2 Output 14 20 24 28 VOUT1 Output 7 5 5 VIN5 Input 8 8 6 VIN6 Input 14 20 24 VOUT5 Output 13 17 23 VOUT6 Output 9 9 VIN7 Input 10 10 VIN8 Input 16 20 VOUT7 Output 15 19 VOUT8 Output 11 VIN9 Input 12 VIN10 Input 18 VOUT9 Output 17 VONT10 Output Not connected Output for VCOM Negative supply Test Circuits VOUT VIN 10kΩ 50Ω FOR BUFFERS 5 VIN 10pF + - VOUT 1kΩ 50Ω FOR VCOM 2pF EL5524, EL5624, EL5724, EL5824 Typical Performance Curves 10 20 VS=±7.5V CL=10pF NORMALIZED MAGNITUDE (dB) NORMALIZED MAGNITUDE (dB) 20 10kΩ 1kΩ 0 -10 150Ω 562Ω -20 -30 100K 1M 10M 10 VS=±7.5V RL=10kΩ 100pF 0 -20 FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS RL (BUFFER) 600 OUTPUT IMPEDANCE (Ω) PSRR (dB) 80 60 PSRR- 40 20 0 1K 10K 100K 100M 1M 480 VS=±7.5V TA=25°C 360 240 120 0 100K 10M 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 3. PSRR vs FREQUENCY (BUFFER) FIGURE 4. OUTPUT IMPEDANCE vs FREQUENCY (BUFFER) 80 70 100 OVERSHOOT (%) VOLTAGE NOISE (nV/√Hz) 10M FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS CL (BUFFER) VS=±7.5V PSRR+ 1M FREQUENCY (Hz) FREQUENCY (Hz) 100 12pF 47pF -10 -30 100K 100M 1000pF 10 60 VS=±7.5V RL=10kΩ VIN=100mV 50 40 30 20 10 1 10K 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 5. INPUT NOISE SPECIAL DENSITY vs FREQUENCY (BUFFER) 6 0 10 100 1K CAPACITANCE (pF) FIGURE 6. OVERSHOOT vs LOAD CAPACITANCE (BUFFER) EL5524, EL5624, EL5724, EL5824 Typical Performance Curves (Continued) 8 6 0.018 VS=±7.5V RL=10kΩ CL=12pF 0.016 THD + NOISE (%) 10 STEP SIZE (V) 4 2 0 -2 -4 -6 VS=±5V RL=10kΩ VIN=2VP-P 0.014 0.012 0.01 0.008 -8 -10 200 250 300 350 400 450 500 550 600 650 0.006 1K 10K SETTLING TIME (ns) FIGURE 7. SETTLING TIME vs STEP SIZE (BUFFER) FIGURE 8. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY (BUFFER) 4 NORMALIZED MAGNITUDE (dB) 12 10 VOP-P (V) 8 6 4 2 VS=±5V RL=10kΩ 0 10K 100K 1M AV=1 2 0 AV=2 -2 AV=10 AV=5 -4 VS=±7.5V RL=1kΩ CL=2pF -6 100K 10M GAIN (dB) PHASE 30 5mA GAIN 10 -216 VS=±5V RF=1kΩ RL=1kΩ CL=1.5pF -288 100K 1M 10M 5mA/DIV 0mA -72 -144 10K 100M M=1µs/DIV, VS=±7.5V, VIN=0V 0 PHASE (°) 70 -30 1K 10M FIGURE 10. FREQUENCY RESPONSE (VCOM) FIGURE 9. OUTPUT SWING vs FREQUENCY (BUFFER) 50 1M FREQUENCY (Hz) FREQUENCY (Hz) -10 100K FREQUENCY (Hz) RS=0Ω CL=200pF 0V 500mV/DIV RS=10Ω CL=4.7nF RS=10Ω CL=1nF -360 100M FREQUENCY (Hz) FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY 7 FIGURE 12. TRANSIENT LOAD REGULATION - SOURCING (BUFFER) EL5524, EL5624, EL5724, EL5824 Typical Performance Curves (Continued) VS=±7.5V, RL=200Ω, CL=150pF M=1µs/DIV, VS=±7.5V, VIN=0V 5mA 50mA 5mA/DIV 0mA 0mA RS=10Ω CL=1nF 0V -50mA 500mV/DIV RS=0Ω CL=200pF RS=10Ω CL=4.7nF FIGURE 14. TRANSIENT LOAD REGULATION (VCOM) FIGURE 13. TRANSIENT LOAD REGULATION - SINKING (BUFFER) VS=±7.5V VS=±7.5V, RL=10kΩ, CL=12pF 1V/DIV 50mV/DIV 1µs/DIV 200ns/DIV FIGURE 16. LARGE SIGNAL TRANSIENT RESPONSE (BUFFER) FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE (BUFFER) 1 VS=±7.5V, RL=1kΩ, CL=2pF 100mV/DIV VS=±7.5V, RL=1kΩ, CL=2pF 1V/DIV 100ns/DIV FIGURE 17. SMALL SIGNAL TRANSIENT RESPONSE (VCOM) 8 100ns/DIV FIGURE 18. LARGE SIGNAL TRANSIENT REPONSE (VCOM) EL5524, EL5624, EL5724, EL5824 Typical Performance Curves (Continued) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD POWER DISSIPATION (W) 833mW 0.8 800mW 0.7 HTSSOP28 θJA=110°C/W 694mW 0.6 0.5 HTSSOP24 θJA=120°C/W HTSSOP20 θJA=125°C/W 0.4 0.3 0.2 HTSSOP14 θJA=144°C/W 0.1 0 3.5 909mW 0.9 POWER DISSIPATION (W) 1 JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD HTSSOP EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 0 25 50 75 85 100 125 150 3.333W 3 2.857W HTSSOP24 θJA=33°C/W 2.5 2.632W 2 HTSSOP28 θJA=30°C/W HTSSOP20 θJA=35°C/W 1.5 3.030W 1 HTSSOP14 θJA=38°C/W 0.5 0 0 25 AMBIENT TEMPERATURE (°C) 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Description of Operation and Application Information Choice of Feedback Resistor and Gain Bandwidth Product for VCOM Amplifier Product Description The EL5524, EL5624, EL5724, and EL5824 are fabricated using a high voltage CMOS process. They exhibit rail to rail input and output capability and have very low power consumption. When driving a load of 10K and 12pF, the buffers have a -3dB bandwidth of 12MHz and exhibit 18V/µs slew rate. The VCOM amplifier has a -3dB bandwidth of 35MHz and exhibit 80V/µs slew rate. Input, Output, and Supply Voltage Range The EL5524, EL5624, EL5724, and EL5824 are specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range from 4.5V to 16.5V. The input common-mode voltage range of the EL5524, EL5624, EL5724, and EL5824 extends 500mV beyond the supply rails. The output swings of the buffers and VCOM amplifier typically extend to within 100mV of the positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage even closer to each supply rails. Output Phase Reversal The EL5524, EL5624, EL5724, and EL5824 are immune to phase reversal as long as the input voltage is limited from VS- -0.5V to VS+ +0.5V. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diode placed in the input stage of the device begin to conduct and overvoltage damage could occur. 9 For applications that require a gain of +1, no feedback resistor is required. Just short the output pin to the inverting input pin. For gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value that should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. As far as the output stage of the amplifier is concerned, the output stage is also a gain stage with the load. RF and RG appear in parallel with RL for gains other than +1. As this combination gets smaller, the bandwidth falls off. Consequently, RF also has a minimum value that should not be exceeded for optimum performance. For gain of +1, RF = 0 is optimum. For the gains other than +1, optimum response is obtained with RF between 1kΩ to 5kΩ. The VCOM amplifier has a gain bandwidth product of 20MHz. For gains ≥5, its bandwidth can be predicted by the following equation: Gain × BW = 20MHz Output Drive Capability The EL5524, EL5624, EL5724, and EL5824 do not have internal short-circuit protection circuitry. The buffers will limit the short circuit current to ±120mA and the VCOM amplifier EL5524, EL5624, EL5724, EL5824 will limit the short circuit current to ±200mA if the outputs are directly shorted to the positive or the negative supply. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output continuous current never exceeds ±30mA for the buffers and ±60mA for the VCOM amplifier. These limits are set by the design of the internal metal interconnections. where: • i = 1 to total number of buffers • VS = Total supply voltage of buffer and VCOM • ISMAX = Total quiescent current • VOUTi = Maximum output voltage of the application • VOUT = Maximum output voltage of VCOM The Unused Buffers • ILOADi = Load current of buffer It is recommended that any unused buffers should have their inputs tied to ground plane. • ILA = Load current of VCOM Power Dissipation With the high-output drive capability of the EL5524, EL5624, EL5724, and EL5824, it is possible to exceed the 125°C “absolute-maximum junction temperature” under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the buffer to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to: T JMAX - T AMAX P DMAX = -------------------------------------------Θ JA where: • TJMAX = Maximum junction temperature • TAMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: P DMAX = V S × I S + Σi × [ ( V S + – V OUT i ) × I LOAD i ] + ( V S + – V OUT ) × I LA when sourcing, and: P DMAX = V S × I S + Σi × [ ( V OUT i – V S - ) × I LOAD i ] + ( V OUT – V S - ) × I LA when sinking. 10 If we set the two PDMAX equations equal to each other, we can solve for the RLOAD's to avoid device overheat. The package power dissipation curves provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves. Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible, and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, one 0.1µF ceramic capacitor should be placed from the VS+ pin to ground. A 4.7µF tantalum capacitor should then be connected from the VS+ pin to ground. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. Important Note: The metal plane used for heat sinking of the device is electrically connected to the negative supply potential (VS-). If VS- is tied to ground, the thermal pad can be connected to ground. Otherwise, the thermal pad must be isolated from any other power planes. EL5524, EL5624, EL5724, EL5824 HTSSOP Package Outline Drawing NOTE: The package drawings shown here may not be the latest versions. For the latest revisions, please refer to the Intersil website at www.intersil.com/design/packages/elantec All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11