Data Sheet 27609.10b 3197 PROTECTED, HIGH-TEMPERATURE, OPEN-COLLECTOR HALL-EFFECT LATCH X These open-collector Hall-effect latches are capable of sensing magnetic fields while using an unprotected power supply. The A3197LLT and A3197LU can provide position and speed information by providing a digital output for magnetic fields that exceed their predefined switch points. These devices operate down to zero speed and have switch points that are designed to be extremely stable over a wide operating temperature and voltage range. The latching characteristics make them ideal for use in pulse counting applications when used with a multi-pole ring magnet. Thermal and output short-circuit protection allow an increased wiring harness fault tolerance. The temperature compensated switch points, the wide operating voltage range, and the integrated protection make these devices ideal for use in automotive applications such as transmission speed sensors and integrated wheel bearing speed sensors. PTCT T C CC 2 U D Y L O 3 Each monolithic device contains an integrated Hall-effect transducer, a temperature-compensated comparator, a voltage regulator, and a buffered 35 mA output sink stage. Supply protection is made possible by the integration of overvoltage and undervoltage shutdown circuitry that monitor supply fault conditions and shut down the IC. Noise shutdown circuitry (patent applied for) prevents the propagation of supply transients to the logic load. Output protection circuitry includes a current limit loop that limits the maximum output sink current, and thermal protection circuitry that shuts down the device during an over-heating condition such as with a shorted load. N R O P OUTPUT SUPPLY 1 GROUND V Dwg. PH-003-2 ABSOLUTE MAXIMUM RATINGS D E N U E The A3197LLT and A3197LU are rated for operation over an extended temperature range of -40°C to +150°C. They are supplied in a three-lead SIP (suffix ‘U’) or a surface-mount SOT-89 (suffix ‘LT’). R N I E T F Supply Voltage, VCC (100 ms) ................................... 115 V* (continuous) ............................... 28 V* Reverse Battery Voltage, VRCC (100 ms) ................................... -100 V (continuous) ............................... -35 V Magnetic Flux Density, B .......... Unlimited Output OFF Voltage, VOUT ................. 26 V Reverse Output Voltage VOUT ......... -0.5 V Continuous Output Current, IOUT .......................................... 35 mA* Reverse Output Current, IOUT ........................................ -100 mA Package Power Dissipation, PD ....................................... See Graph Junction Temperature, TJ ................. 170°C Operating Temperature Range, TA .......................................... -40°C to +150°C Storage Temperature, TS .................. 170°C E C E N O R R C IS FO D — *Fault condition, internal overvoltage shutdown above 28 V; output current limited above 35 mA. FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Internal Protection For Automotive (ISO/DIN) Transients Operation From Unregulated Supply Reverse Battery Protection Undervoltage Lockout Supply Noise-Suppression Circuitry Output Short-Circuit Protection Output Zener Clamp Thermal Protection Symmetrical Latching Switch Points Operable with Multipole Ring Magnets Always order by complete part number, e.g., A3197LU . 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH FUNCTIONAL BLOCK DIAGRAM 1 VCC OVERVOLT. LOCKOUT POWER UP & TRANSIENT PROTECTION REG. 3 OUTPUT 2 GROUND CONTROL X THERMAL SHUTDOWN CURRENT LIMIT <1Ω Dwg. FH-012A ALLOWABLE PACKAGE POWER DISSIPATION IN MILLIWATTS 800 700 Suffix "–LT" RθJA = 180°C/W 600 Suffix "–U" RθJA = 183°C/W 500 NOTE – Permitted duty cycle will be less than 100% at maximum ambient temperature with high supply voltages, i.e., TA ≥ 140°C, VCC ≥ 12 V, and the “LT” package. The thermal shutdown circuitry does not protect the device from these stresses (see Internal Protective Features). 400 300 200 Suffix "E–" 100 Suffix "L–" 0 20 40 60 80 100 120 AMBIENT TEMPERATURE IN °C 2 140 160 180 Dwg. GH-054B 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1995, 2004 Allegro MicroSystems, Inc. 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH ELECTRICAL CHARACTERISTICS over operating voltage and temperature range (unless otherwise specified). Limits Characteristic Symbol Supply Voltage VCC Test Conditions Operating (but VCC x ICC vs TA limited) Min. Typ. Max. Units VCC(UV) 12 26 V Overvoltage Shutdown* VCC(OV) B > BOP 28 — 55 V Undervoltage Shutdown* VCC(UV) B > BOP 3.7 — 4.5 V B > BOP, IOUT = 30 mA, VCC = 16 V — 0.2 0.5 V VOUT = 26 V — — 5.0 µA B < BRP, VCC = 115 V*, IOUT = 0 28 32 40 V B > BOP, VOUT = 12 V 35 50 70 mA Output Voltage, On Output Leakage Current Output Clamp Voltage Output Current Limit VOUT(SAT) IOFF VOUT(CLMP) IOUTMAX Supply Current ICC B < BRP, VCC = 24 V, IOUT = 0 B > BOP, VCC = 24 V, IOUT = 20 mA VCC = +115 V* — — — 5.2 7.8 8.0 9.0 12 17 mA mA mA Reverse Battery Current* IRCC VRCC = -35 V* VRCC = -100 V* — — -0.5 -2.0 -5.0 -10 mA mA Output Rise Time tr CL = 20 pF, RL = 330 Ω, VBB = 12 V — 0.05 2.0 µs Output Fall Time tf CL = 20 pF, RL = 330 Ω, VBB = 12 V — 0.30 5.0 µs Thermal Shutdown Temp.* TJ 165 — 190 °C — — 258 183 — — °C/W °C/W Package Thermal Resist. RθJA “LT” Package “U” Package MAGNETIC CHARACTERISTICS over operating voltage range (unless otherwise specified). Limits Characteristic Symbol Operate Point BOP Release Point Hysteresis (BOP - BRP) Test Conditions Min. Typ. Max. Units TA = -40°C TA = +25°C TA = +150°C 60 50 40 130 110 105 200 160 150 G G G BRP TA = -40°C TA = +25°C TA = +150°C -200 -160 -150 -140 -120 -100 -60 -50 -40 G G G Bhys TA = -40°C TA = +25°C TA = +150°C 150 130 110 270 230 205 — — — G G G NOTES:BOP = magnetic operate point (output turns ON); BRP = magnetic release point (output turns OFF). As used here, negative flux densities are defined as less than zero (algebraic convention). Typical values are at TA = +25°C and VCC = 12 V (unless otherwise specified). * Fault condition. Device is shut down and operation is not possible. www.allegromicro.com 3 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH TYPICAL OPERATING CHARACTERISTICS Switch Points Output Saturation Voltage 500 200 400 OPERATE POINT 0 SATURATION VOLTAGE IN mV SWITCH POINTS IN GAUSS 100 VCC = 5 V–24 V -100 RELEASE POINT VCC = 12 V B ≥ BOP 300 IOUT = 30 mA 200 100 I OUT = 5 mA -200 -50 -25 0 25 50 75 100 0 -50 150 125 -25 0 25 Dwg. GH-052-2 8.0 VCC = 24 V SUPPLY CURRENT IN mA B ≥ B OP V CC= 5 V 6.0 VCC = 24 V 5.0 B ≤ B RP VCC = 5 V 4.0 -50 -25 0 25 50 75 100 125 150 AMBIENT TEMPERATURE IN °C Dwg. GH-028-3 4 75 100 125 150 Dwg. GH-040-3 Supply Current 7.0 50 AMBIENT TEMPERATURE IN °C AMBIENT TEMPERATURE IN ° C 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH OPERATION In operation, the output transistor is OFF until the strength of the magnetic field perpendicular to the surface of the chip exceeds the threshold or operate point (BOP). When the field strength exceeds BOP, the output transistor switches ON (a logic low) and is capable of sinking 35 mA of current. TEST CIRCUIT AND TYPICAL APPLICATION VCC(UV) TO 26 V WITH TRANSIENTS VBB VCC 1 RL TO µP 3 The output transistor switches OFF (a logic high) when magnetic field reversal results in a magnetic flux density below the OFF threshold (BRP). This is illustrated in the transfer characteristics graph. Note that the device latches; that is, a south pole of sufficient strength will turn the device ON. Removal of the south pole will leave the device ON. The presence of a north pole of sufficient strength is required to turn the device OFF. X CBYPASS CL 2 Dwg. EH-006A 26 V MAX OUTPUT VOLTAGE IN VOLTS The switch points increase in sensitivity with increasing temperature to compensate for the typical ferrite magnet temperature characteristic. The simplest form of magnet that will operate these devices is a ring magnet. Other methods of operation are possible. REGULATED < 26 V VBB B RP B OP VOUT(SAT) 0 -B 0 FLUX DENSITY www.allegromicro.com +B Dwg. GH-034-2A 5 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH Power Up Reset. These devices are designed to power up with the output OFF without regard to any magnetic field applied. The output will remain OFF until the flux is reduced to below BRP (S-N transition) and then BOP is exceeded, depending on the turn-on state of the internal latches. +B BOP 0 -B BRP VCC 0 FIRST BOP AFTER POWER UP VOUT VOUT(SAT) Dwg. WH-006 Power Supply Transients (Noise); Overvoltage and Undervoltage Lockout. Even in protected devices, positive and negative power supply transients that would not normally cause physical damage can cause logic errors in control systems. The A3197LT and A3197LU include noise suppression features to prevent this. BOP 0 BRP VCC 0 FIRST BOP AFTER TRANSIENT(S) VOUT In a typical application, where the output is externally pulled up to a regulated voltage <28 V, the effects of power supply transients on the device output are suppressed by turning the output driver OFF during the first undervoltage, VCC(UV), (or negative) condition, or first overvoltage (positive) condition, VCC(OV), and maintaining a power up reset mode until normal power is restored. Note that after the initial transient, the output does not change logic state during subsequent power supply noise pulses. An external 0.1 µF to 0.5 µF capacitor, with good high-frequency characteristics, should be connected between terminals 1 and 2 to bypass high-voltage noise and reduce EMI susceptibility. CLASSICAL OUTPUT RESPONSE VOUT A3197– OUTPUT RESPONSE Dwg. WH-007-2A BOP 0 BRP VCC 0 FIRST BOP AFTER TRANSIENT(S) VOUT CLASSICAL OUTPUT RESPONSE VOUT A3197– OUTPUT RESPONSE Dwg. WH-007-1A 6 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH INTERNAL PROTECTIVE FEATURES ISO Pulse No. Test Test Conditions (over operating temperature range) 1 Inductive Turn Off (Negative) VS = -100 V, RS = 10 Ω, tr = 1 µs, td = 2 ms 2 Inductive Turn Off (Positive) VS = 100 V, RS = 10 Ω, tr = 1 µs, td = 50 µs 3a Capacitive/Inductive Coupling (Neg) VS = -150 V, RS = 50 Ω, tr = 50 ns, td = 100 ns 3b Capacitive/Inductive Coupling (Pos) VS = 100 V, RS = 50 Ω, tr = 50 ns, td = 100 ns 4 Reverse Battery VS = -14 V, td = 20 s 5 Load Dump (ISO) VS = 86.5 V, RS = 0.5 Ω, tr = 5 ms, td = 400 ms (DIN) VS = 120 V, RS = 0.5 Ω, tr = 100 ns, td = 400 ms 6 Ignition Coil Disconnect EXTERNAL PROTECTION REQ’D VS = -300 V, RS = 30 Ω, tr = 60 µs, td = 300 µs 7 Field Decay (Negative) VS = -80 V, RS = 10 Ω, tr = 5 ms, td = 100 ms 0.9 V S VS 0.1 V S 12 V 0 tr td Dwg. WH-008 Power supply voltage transients, or device output short circuits, may be caused by faulty connectors, crimped wiring harnesses, or service errors. To prevent catastrophic failure, internal protection against overvoltage, reverse voltage, output overloads, and thermal stress have been incorporated to meet the automotive 12 volt system protection requirements of ISO DP7637/1 and DIN 40839-1. A seriesblocking diode or current-limiting resistor is required in order to survive pulse number six. www.allegromicro.com 7 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH Output Overloads. Current through the output transistor is sensed with a low-value on-chip aluminum resistor. The voltage drop across this resistor is fed back to control the base drive of the output stage. This feedback prevents the output transistor from exceeding its maximum current density rating by limiting the output current to between 35 mA and 70 mA. Under short-circuit conditions, the device will dissipate an increased amount of power (PD = VOUT x ILIMIT) and the output transistor will be thermally stressed. Thermal Stress. When thermal stresses (either internal or external) cause the junction temperature to exceed +165°C, thermal shutdown of the output transistor is activated. The thermal shutdown circuitry only provides protection against thermal stresses caused by increased power dissipation of the output transistor. 8 Overvoltage. The device protects itself against highvoltage transients by shutting OFF all supply-referenced active components, reducing the supply current, and minimizing device power dissipation. Overvoltage shutdown can occur anywhere between 28 V and 55 V and device operation above 28 V cannot be recommended. Under a sustained overvoltage, the device may be required to dissipate an increased amount of power (PD = VCC x ICC) and the device may be thermally stressed (see above). Output Voltage. The output is clamped with an on-chip Zener diode to limit the maximum output voltage that can occur during overvoltage faults or when switching an inductive load. When any fault condition is removed, the device returns to normal operating mode. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH ELEMENT LOCATIONS APPLICATIONS INFORMATION SUFFIX “LT” ACTIVE AREA DEPTH 0.0305" 0.775 mm 0.092" 2.35 mm NOM 0.051" 1.30 mm A 1 2 3 Dwg. MH-008-5B SUFFIX “U” ACTIVE AREA DEPTH 0.0165" 0.42 mm 0.094" 2.40 mm NOM 0.073" 1.85 mm The A3197LLT and A3197LU latches have been optimized for use in automotive ring magnet sensing applications. Such applications include transmission speed sensors, motor position encoders, and wheel bearing speed sensors. Special care has been taken to optimize the operation of these devices in automotive subsystems that require ISO DP9637 protection but NOT operation. Undervoltage lockout is included to prevent propagation of false logic pulses during low battery, cold-start conditions. Noise suppression is included to prevent false switching of the device when subjected to ISO transients. Short-circuit protection is included to prevent damage caused by pinched wiring harnesses. A typical application consists of a ferrite ring magnet located on a rotating shaft. Typically, this shaft is attached to the transmission, the device is mounted on a board, with care being taken to keep a tight tolerance on the air gap between the package face and the magnet. The device will provide a change in digital state at the transition of every magnetic pole and, thus, give an indication of the transmission speed. The high magnetic hysteresis allows the device to be immune to vibration of the magnet shaft and relatively good duty cycles can be obtained. Hall effect applications information is available in the “Hall-Effect IC Applications Guide”, which can be found in Application Note 27703, at www.allegromicro.com. A BRANDED SURFACE 1 2 3 Dwg. MH-002-12B Allegro www.allegromicro.com 9 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH A3197LLT Dimensions in Inches (for reference only) 0.181 0.173 0.072 0.064 0.167 0.155 1 2 0.063 0.055 0.102 0.090 3 0.0173 0.0138 0.090 0.084 0.0189 0.0142 0.0221 0.0173 0.047 0.035 0.059 BSC 0.118 BSC Dwg. MA-009-3A in Dimensions in Millimeters (controlling dimensions) 4.60 4.40 1.83 1.62 4.25 3.94 1 2 2.60 2.29 3 0.44 0.35 2.29 2.13 0.48 0.36 1.20 0.89 0.56 0.44 1.50 BSC 1.60 1.40 3.00 BSC Dwg. MA-009-3A mm NOTE — Exact body and lead configuration at vendor’s option within limits shown. 10 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH A3197LU Dimensions in Inches (controlling dimensions) Dimensions in Millimeters (for reference only) 0.183 0.178 4.65 4.52 0.063 0.059 1.60 1.50 0.181 0.176 4.60 4.47 45° 0.086 1 2 45° 0.018 3 2.18 MAX 1 2 0.46 3 MAX 0.0173 0.0138 0.600 0.560 0.44 0.35 15.24 14.23 0.0189 0.0142 0.48 0.36 SEE NOTE SEE NOTE 1.27 0.050 0.100 2.54 Dwg. MH-003E in Dwg. MH-003E mm NOTES:1. Tolerances on package height and width represent allowable mold offsets. Dimensions given are measured at the widest point (parting line). 2. Exact body and lead configuration at vendor’s option within limits shown. 3. Height does not include mold gate flash. 4. Recommended minimum PWB hole diameter to clear transition area is 0.035" (0.89 mm). 5. Where no tolerance is specified, dimension is nominal. www.allegromicro.com 11 3197 PROTECTED, HIGH-TEMP., OPEN-COLLECTOR HALL-EFFECT LATCH The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support appliances, devices, or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties that may result from its use. 12 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000