Data Sheet 29319.1C 3952 FULL-BRIDGE PWM MOTOR DRIVER A3952SB 16 LOAD SUPPLY 2 15 OUTB RC 3 14 MODE GROUND 4 13 GROUND 12 GROUND 11 SENSE 10 OUTA 9 LOAD SUPPLY BRAKE 1 REF VBB LOGIC GROUND 5 LOGIC SUPPLY 6 PHASE 7 ENABLE VCC 8 VBB Dwg. PP-056 Note that the A3952SB (DIP) and the A3952SLB (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS Load Supply Voltage, VBB .................. 50 V Output Current, IOUT (tw ≤ 20 µs) .................................. ±3.5 A (Continuous) ............................... ±2.0 A Logic Supply Voltage, VCC ................. 7.0 V Logic Input Voltage Range, VIN ....................... -0.3 V to VCC + 0.3 V Sense Voltage, VSENSE ...................... 1.5 V Reference Voltage, VREF .................... 15 V Package Power Dissipation, PD ....................................... See Graph Operating Temperature Range, TA ............................... –20°C to +85°C Junction Temperature, TJ ............. +150°C* Storage Temperature Range, TS ............................. –55°C to +150°C Designed for bidirectional pulse-width modulated current control of inductive loads, the A3952S– is capable of continuous output currents to ±2 A and operating voltages to 50 V. Internal fixed off-time PWM current-control circuitry can be used to regulate the maximum load current to a desired value. The peak load current limit is set by the user’s selection of an input reference voltage and external sensing resistor. The fixed OFF-time pulse duration is set by a user-selected external RC timing network. Internal circuit protection includes thermal shutdown with hysteresis, transient suppression diodes, and crossovercurrent protection. Special power-up sequencing is not required. T C With the ENABLE input held low, the PHASE input controls load current polarity by selecting the appropriate source and sink driver pair. The MODE input determines whether the PWM current-control circuitry operates in a slow current-decay mode (only the selected sink driver switching) or in a fast current-decay mode (selected source and sink switching). A user-selectable blanking window prevents false triggering of the PWM current control circuitry. With the ENABLE input held high, all output drivers are disabled. A sleep mode is provided to reduce power consumption when inactive. U D O y R l P n O e D E ce d The A3952S– is supplied in a choice of four power packages. In all package styles, the batwing/power tab is at ground potential and needs no isolation. These devices are also available for operation from -40°C to +125°C. To order, change the suffix from 'S–' to 'K–'. U n IN re e or T f N Re 9 f O C or S I D F FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ s U * Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. w e n ±2 A Continuous Output Current Rating 50 V Output Voltage Rating Internal PWM Current Control Fast and Slow Current-Decay Modes Sleep (Low Current Consumption) Mode Internal Transient Suppression Diodes Under-Voltage Lockout Internal Thermal Shutdown Circuitry Crossover-Current Protection 5 9 3 A e Output current rating may be limited by duty cycle, ambient temperature, heat sinking and/or forced cooling. Under any set of conditions, do not exceed the specified current rating or a junction temperature of +150°C. n g si When a logic low is applied to the BRAKE input, the braking function is enabled. This overrides ENABLE and PHASE to turn OFF both source drivers and turn ON both sink drivers. The brake function can be safely used to dynamically brake brush dc motors. Always order by complete part number: Part Number A3952SB A3952SEB A3952SLB A3952SW Package RθJA RθJT 16-Pin DIP 28-Lead PLCC 16-Lead SOIC 12-Pin Power-Tab SIP 43°C/W 36°C/W 90°C/W 36°C/W 6.0°C/W 6.0°C/W 6.0°C/W 2.0°C/W 3952 FULL-BRIDGE PWM MOTOR DRIVER OUTB VBB SLEEP & STANDBY MODES OUTA LOAD SUPPLY FUNCTIONAL BLOCK DIAGRAM MODE PHASE INPUT LOGIC UVLO & TSD ENABLE EMITTERS 'EB' ONLY BRAKE LOGIC SUPPLY VCC – + R Q REF S BLANKING 1.5 V RS PWM LATCH VCC 9R SENSE 'B' & 'LB' PACKAGES RC + – VTH R GROUND CT RT Dwg. FP-036A TRUTH TABLE BRAKE ENABLE PHASE ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 10 'W' TAB 'B' , 'EB', & 'LB' TAB 8 MODE OUTA OUTB H H H H H L X X H H L H Z Z H Z Z L H L H L H L H L L H L H H L L L L H L X X H L L L X X L L L 6 'W' AMBIENT 4 'B' & 'EB' AMBIENT 'LB' AMBIENT 2 DESCRIPTION Sleep Mode Standby, Note 1 Forward, Fast-Decay Mode Forward, Slow-Decay Mode Reverse, Fast-Decay Mode Reverse, Slow-Decay Mode Brake, Fast-Decay Mode Brake, No Current Control, Note 2 0 25 50 75 100 TEMPERATURE IN °C 125 Dwg. GP-007-1B 150 X = Irrelevant NOTES: Z = High Impedance (source and sink both OFF) 1. Includes active pull-offs for power outputs. 2. Includes internal default Vsense level for over-current protection. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1994, 2004 Allegro MicroSystems, Inc. 3952 FULL-BRIDGE PWM MOTOR DRIVER 25 6 24 GROUND LOGIC MODE NO CONNECTION 26 1 OUT B BRAKE LOAD SUPPLY 2 27 REF 3 28 RC 5 23 7 LOGIC 22 9 21 10 20 11 19 VCC VBB 8 GROUND A3952SW VBB GROUND 4 A3952SEB GROUND 10 11 12 Dwg. PP-057 SENSE 9 OUTA 8 MODE RC 7 ENABLE 6 PHASE 5 LOGIC SUPPLY 4 REF OUTB 3 BRAKE 2 LOAD SUPPLY 18 EMITTERS 1 GROUND 17 15 LOAD SUPPLY SENSE 14 ENABLE 16 13 PHASE OUTA 12 LOGIC SUPPLY VCC Dwg. PP-058 ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VCC = 5.0 V, VBRAKE = 2.0 V, VSENSE = 0 V, RC = 20 kΩ/1000 pF to Ground (unless noted otherwise). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units VCC – 50 V Output Drivers Load Supply Voltage Range VBB Operating, IOUT = ±2.0 A, L = 3 mH Output Leakage Current ICEX VOUT = VBB – <1.0 50 µA VOUT = 0 V – <-1.0 -50 µA Source Driver, IOUT = -0.5 A – 0.9 1.2 V Source Driver, IOUT = -1.0 A – 1.0 1.4 V Source Driver, IOUT = -2.0 A – 1.2 1.8 V Sink Driver, IOUT = +0.5 A – 0.9 1.2 V Sink Driver, IOUT = +1.0 A – 1.0 1.4 V Sink Driver, IOUT = +2.0 A – 1.3 1.8 V IF = 0.5 A – 1.0 1.4 V IF = 1.0 A – 1.1 1.6 V IF = 2.0 A – 1.4 2.0 V Output Saturation Voltage Clamp Diode Forward Voltage VCE(SAT) VF (Source or Sink) Load Supply Current IBB(ON) VENABLE = 0.8 V – 2.9 6.0 mA (No Load) IBB(OFF) VENABLE = 2.0 V, VMODE = 0.8 V – 3.1 6.5 mA VBRAKE = 0.8 V – 3.1 6.5 mA VENABLE = VMODE = 2.0 V – <1.0 50 µA IBB(SLEEP) Continued next page … www.allegromicro.com 3952 FULL-BRIDGE PWM MOTOR DRIVER Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Operating 4.5 5.0 5.5 V Control Logic Logic Supply Voltage Range VCC Logic Input Voltage VIN(1) 2.0 – – V VIN(0) – – 0.8 V IIN(1) VIN = 2.0 V – <1.0 20 µA IIN(0) VIN = 0.8 V – <-2.0 -200 µA Reference Voltage Range VREF Operating 0 – 15 V Reference Input Current IREF VREF = 2.0 V 25 40 55 µA Reference Voltage Divider Ratio – VREF = 15 V 9.5 10.0 10.5 – Comparator Input Offset Voltage VIO VREF = 0 V – ±1.0 ±10 mV PWM RC Fixed OFF Time toff CT = 1000 pF, RT = 20 kΩ 18 20 22 µs ton(min) CT = 820 pF, RT ≥ 12 kΩ – 1.7 3.0 µs CT = 1200 pF, RT ≥ 12 kΩ – 2.5 3.8 µs ENABLE ON to Source ON – 2.9 – µs ENABLE OFF to Source OFF – 0.7 – µs ENABLE ON to Sink ON – 2.4 – µs ENABLE OFF to Sink OFF – 0.7 – µs PHASE Change to Source ON – 2.9 – µs PHASE Change to Source OFF – 0.7 – µs PHASE Change to Sink ON – 2.4 – µs PHASE Change to Sink OFF – 0.7 – µs – 0.8 1.5 µs TJ – 165 – °C ∆TJ – 15 – °C VCC(UVLO) 3.15 3.50 3.85 V ∆VCC(UVLO) 300 400 500 mV Logic Input Current PWM Minimum ON Time Propagation Delay Time tpd tpd(pwm) Thermal Shutdown Temperature Thermal Shutdown Hysteresis UVLO Disable Threshold UVLO Hysteresis IOUT = ±2.0 A, 50% EIN to 90% EOUT Transition: Comparator Trip to Sink OFF Logic Supply Current ICC(ON) VENABLE = 0.8 V, VBRAKE = 2.0 V – 20 30 mA (No Load) ICC(OFF) VENABLE = 2.0 V, VMODE = 0.8 V – 12 18 mA ICC(BRAKE) VBRAKE = 0.8 V – 26 40 mA ICC(SLEEP) VENABLE = VMODE = VBRAKE = 2.0 V – 3.0 5.0 mA NOTES: 1. Typical Data is for design information only. 2. Each driver is tested separately. 3. Negative current is defined as coming out of (sourcing) the specified device terminal. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3952 FULL-BRIDGE PWM MOTOR DRIVER FUNCTIONAL DESCRIPTION INTERNAL PWM CURRENT CONTROL DURING FORWARD AND REVERSE OPERATION The A3952S– contains a fixed OFF-time pulse-width modulated (PWM) current-control circuit that can be used to limit the load current to a desired value. The value of the current limiting (ITRIP) is set by the selection of an external current sensing resistor (RS) and reference input voltage (VREF). The internal circuitry compares the voltage across the external sense resistor to one tenth the voltage on the REF input terminal, resulting in a function approximated by ITRIP = VREF/(10RS). In forward or reverse mode the current-control circuitry limits the load current. When the load current reaches ITRIP, the comparator resets a latch to turn OFF the selected sink driver (in the slow-decay mode) or selected sink and source driver pair (in the fast-decay mode). In slow-decay mode, the selected sink driver is disabled; the load inductance causes the current to recirculate through the source driver and flyback diode (see figure 1). In fastdecay mode, the selected sink and source driver pair are disabled; the load inductance causes the current to flow from ground to the load supply via the ground clamp and flyback diodes. V BB DRIVE CURRENT RECIRCULATION (SLOW-DECAY MODE) RECIRCULATION (FAST-DECAY MODE) ENABLE MODE I TRIP RC LOAD CURRENT RC Dwg. WP-015-1 Figure 2 — Fast and Slow Current-Decay Waveforms INTERNAL PWM CURRENT CONTROL DURING BRAKE MODE OPERATION The brake circuit turns OFF both source drivers and turns ON both sink drivers. For dc motor applications, this has the effect of shorting the motor’s back-EMF voltage, resulting in current flow that brakes the motor dynamically. However, if the back-EMF voltage is large, and there is no PWM current limiting, then the load current can increase to a value that approaches a locked rotor condition. To limit the current, when the ITRIP level is reached, the PWM circuit disables the conducting sink driver. The energy stored in the motor’s inductance is then discharged into the load supply causing the motor current to decay. As in the case of forward/reverse operation, the drivers are re-enabled after a time given by toff = RTCT (see “RC Fixed OFF Time” below). Depending on the back-EMF voltage (proportional to the motor’s decreasing speed), the load current again may increase to ITRIP. If so, the PWM cycle will repeat, limiting the load current to the desired value. Brake Operation - MODE Input High During braking, when the MODE input is high, the current limit can be approximated by RS Dwg. EP-006-2A Figure 1 — Load-Current Paths The user selects an external resistor (RT) and capacitor (CT) to determine the time period (toff = RTCT) during which the drivers remain disabled (see “RC Fixed OFF Time” below). At the end of the RTCT interval, the drivers are re-enabled allowing the load current to increase again. The PWM cycle repeats, maintaining the load current at the desired value (see figure 2). www.allegromicro.com ITRIP = VREF/(10RS). CAUTION: Because the kinetic energy stored in the motor and load inertia is being converted into current, which charges the VBB supply bulk capacitance (power supply output and decoupling capacitance), care must be taken to ensure the capacitance is sufficient to absorb the energy without exceeding the voltage rating of any devices connected to the motor supply. 3952 FULL-BRIDGE PWM MOTOR DRIVER Brake Operation - MODE Input Low During braking, with the MODE input low, the peak current limit defaults internally to a value approximated by ITRIP = 1.5 V/RS. In this mode, the value of RS determines the ITRIP value independent of VREF. This is useful in applications with differing run and brake currents and no practical method of varying VREF. Choosing a small value for RS essentially disables the current limiting during braking. Therefore, care should be taken to ensure that the motor’s current does not exceed the absolute maximum ratings of the device. The braking current can be measured by using an oscilloscope with a current probe connected to one of the motor’s leads. RC Fixed OFF Time The internal PWM current control circuitry uses a one shot to control the time the driver(s) remain(s) OFF. The one shot time, toff (fixed OFF time), is determined by the selection of an external resistor (RT) and capacitor (CT) connected in parallel from the RC terminal to ground. The fixed OFF time, over a range of values of CT = 820 pF to 1500 pF and RT = 12 kΩ to 100 kΩ, is approximated by toff = RTCT. When the PWM latch is reset by the current comparator, the voltage on the RC terminal will begin to decay from approximately 3 volts. When the voltage on the RC terminal reaches approximately 1.1 volt, the PWM latch is set, thereby re-enabling the driver(s). RC Blanking In addition to determining the fixed OFF-time of the PWM control circuit, the CT component sets the comparator blanking time. This function blanks the output of the comparator when the outputs are switched by the internal current control circuitry (or by the PHASE, BRAKE, or ENABLE inputs). The comparator output is blanked to prevent false over-current detections due to reverse recovery currents of the clamp diodes, and/or switching transients related to distributed capacitance in the load. During internal PWM operation, at the end of the toff time, the comparator’s output is blanked and CT begins to be charged from approximately 1.1 V by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3.0 volts. Similarly, when a transition of the PHASE input occurs, CT is discharged to near ground during the crossover delay time (the crossover delay time is present to prevent simultaneous conduction of the source and sink drivers). After the crossover delay, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3.0 volts. Similarly, when the device is disabled via the ENABLE input, CT is discharged to near ground. When the device is re-enabled, CT is charged by the internal current source. The comparator output remains blanked until the voltage on CT reaches approximately 3.0 V. For applications that use the internal fast-decay mode PWM operation, the minimum recommended value is CT = 1200 pF ±5 %. For all other applications, the minimum recommended value is CT = 820 pF ±5 %. These values ensure that the blanking time is sufficient to avoid false trips of the comparator under normal operating conditions. For optimal regulation of the load current, the above values for CT are recommended and the value of RT can be sized to determine toff. For more information regarding load current regulation, see below. LOAD CURRENT REGULATION WITH THE INTERNAL PWM CURRENT-CONTROL CIRCUITRY When the device is operating in slow-decay mode, there is a limit to the lowest level that the PWM currentcontrol circuitry can regulate load current. The limitation is the minimum duty cycle, which is a function of the userselected value of toff and the maxuimum value of the minimum ON-time pulse, ton(min), that occurs each time the PWM latch is reset. If the motor is not rotating, as in the case of a stepper motor in hold/detent mode, or a brush dc motor when stalled or at startup, the worst-case value of current regulation can be approximated by I(AV) ≈ [(VBB – VSAT(source+sink)) • ton(min)max] – [1.05 (VSAT(sink) + VD) • toff] 1.05 (ton(min)max + toff) • RLOAD where toff = RTCT, RLOAD is the series resistance of the load, VBB is the load/motor supply voltage, and ton(min)max is specified in the electrical characteristics table. When the motor is rotating, the back EMF generated will influence the above relationship. For brush dc motor applications, the current regulation is improved. For stepper motor applications when the motor is rotating, the effect is more complex. A discussion of this subject is included in the section on stepper motors under “Applications”. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3952 FULL-BRIDGE PWM MOTOR DRIVER In applications utilizing both fast- and slow-decay internal PWM modes, the performance of the slow-decay current regulation should be evaluated per the above procedure and a ton(min)max of 3.8 µs. This corresponds to a CT value of 1200 pF, which is required to ensure sufficient blanking during fast-decay internal PWM. LOAD CURRENT REGULATION WITH EXTERNAL PWM OF THE PHASE AND ENABLE INPUTS The PHASE and ENABLE inputs can be pulse-width modulated to regulate load current. Typical propagation delays from the PHASE and ENABLE inputs to transitions of the power outputs are specified in the electrical characteristics table. If the internal PWM current control is used, then the comparator blanking function is active during phase and enable transitions. This eliminates false tripping of the over-current comparator caused by switching transients (see “RC Blanking” above). Toggling the PHASE terminal determines/controls which sink/source pair is enabled, producing a load current that varies with the duty cycle and remains continuous at all times. This can have added benefits in bidirectional brush dc servo motor applications as the transfer function between the duty cycle on the phase input and the average voltage applied to the motor is more linear than in the case of ENABLE PWM control (which produces a discontinuous current at low current levels). See also, “DC Motor Applications” below. SYNCHRONOUS FIXED-FREQUENCY PWM The internal PWM current-control circuitry of multiple A3952S– devices can be synchronized by using the simple circuit shown in figure 3. A 555 IC can be used to generate the reset pulse/blanking signal (t1) and the period of the PWM cycle (t2). The value of t1 should be a minimum of 1.5 µs in slow-decay mode and 2 µs in fast-decay mode. When used in this configuration, the RT and CT components should be omitted. The PHASE and ENABLE inputs should not be PWMed with this circuit configuration due to the absence of a blanking function synchronous with their transitions. V CC t2 100 kΩ Set VREF to 0 volts. With the load connected and the PWM current control operating in slow-decay mode, use an oscilloscope to measure the time the output is low (sink ON) for the output that is chopping. This is the typical minimum ON time (ton(min)typ) for the device. CT then should be increased until the measured value of ton(min) is equal to ton(min)max) = 3.0 µs as specified in the electrical characteristics table. When the new value of CT has been set, the value of RT should be decreased so the value for toff = RT•CT (with the artificially increased value of CT) is equal to 105% of the nominal design value. The worstcase load current regulation then can be measured in the system under operating conditions. PHASE Pulse-Width Modulation 20 kΩ The following procedure can be used to evaluate the worst-case slow-decay internal PWM load current regulation in the system: RC 1 1N4001 2N2222 t RC N 1 Dwg. EP-060 ENABLE Pulse-Width Modulation With the MODE input low, toggling the ENABLE input turns ON and OFF the selected source and sink drivers. The corresponding pair of flyback and ground clamp diodes conduct after the drivers are disabled, resulting in fast current decay. When the device is enabled, the internal current control circuitry will be active and can be used to limit the load current in a slow-decay mode. For applications that PWM the ENABLE input, and desire that the internal current limiting circuit function in the fast-decay mode, the ENABLE input signal should be inverted and connected to the MODE input. This prevents the device from being switched into sleep mode when the ENABLE input is low. www.allegromicro.com Figure 3 — Synchronous Fixed-Frequency Control Circuit MISCELLANEOUS INFORMATION A logic high applied to both the ENABLE and MODE terminals puts the device into a sleep mode to minimize current consumption when not in use. An internally generated dead time prevents crossover currents that can occur when switching phase or braking. Thermal protection circuitry turns OFF all drivers should the junction temperature reach 165°C (typical). This is intended only to protect the device from failures due to excessive junction temperatures and should not 3952 FULL-BRIDGE PWM MOTOR DRIVER imply that output short circuits are permitted. The hysteresis of the thermal shutdown circuit is approximately 15°C. If the internal current-control circuitry is not used; the VREF terminal should be connected to VCC, the SENSE terminal should be connected to ground, and the RC terminal should be left floating (no connection). An internal under-voltage lockout circuit prevents simultaneous conduction of the outputs when the device is powered up or powered down. APPLICATION NOTES Current Sensing The actual peak load current (IOUTP) will be greater than the calculated value of ITRIP due to delays in the turn OFF of the drivers. The amount of overshoot can be approximated as (VBB – [(ITRIP • RLOAD) + VBEMF]) • tpd(pwm) IOUTP ≈ LLOAD where VBB is the load/motor supply voltage, VBEMF is the back-EMF voltage of the load, RLOAD and LLOAD are the resistance and inductance of the load respectively, and tpd(pwm) is the propagation delay as specified in the electrical characteristics table. The reference terminal has an equivalent input resistance of 50 kΩ ±30%. This should be taken into account when determining the impedance of the external circuit that sets the reference voltage value. To minimize current-sensing inaccuracies caused by ground trace IR drops, the current-sensing resistor should have a separate return to the ground terminal of the device. For low-value sense resistors, the IR drops in the PCB can be significant and should be taken into account. The use of sockets should be avoided as their contact resistance can cause variations in the effective value of RS. Larger values of RS reduce the aforementioned effects but can result in excessive heating and power loss in the sense resistor. The selected value of RS must not cause the SENSE terminal absolute maximum voltage rating to be exceeded. The recommended value of RS is in the range of RS = (0.375 to 1.125)/ITRIP. The current-sensing comparator functions down to ground allowing the device to be used in microstepping, sinusoidal, and other varying current profile applications. Thermal Considerations For reliable operation, it is recommended that the maximum junction temperature be kept as low as possible, typically 90°C to 125°C. The junction temperature can be measured by attaching a thermocouple to the power tab/ batwing of the device and measuring the tab temperature, TT . The junction temperature can then be approximated by using the formula TJ ≈ TT + (2 VF IOUT RθJT) where VF is the clamp diode forward voltage and can be determined from the electrical specification table for the given level of IOUT. The value for RθJT is given in the package thermal resistance table (page 1) for the appropriate package. The power dissipation of the batwing packages can be improved by 20 to 30% by adding a section of printed circuit board copper (typically 6 to 18 square centimeters) connected to the batwing terminals of the device. See Application Note 29501.5, Improving Batwing Power Dissipation. The thermal performance in applications with high load currents and/or high duty cycles can be improved by adding external diodes in parallel with the internal diodes. In internal PWM slow-decay applications, only the two topside (flyback) diodes need be added. For internal fastdecay PWM, or external PHASE or ENABLE input PWM applications, all four external diodes should be added for maximum junction temperature reduction. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3952 FULL-BRIDGE PWM MOTOR DRIVER This also improves the maximum rate at which the load current can increase (as compared to fast decay) due to the slow rate of decay during toff. When the average load current is decreasing, fast-decay mode is used to regulate the load current to the desired level. This prevents tailing of the current profile caused by the back-EMF voltage of the stepper motor. PCB Layout The load supply terminal, VBB, should be decoupled (>47 µF electrolytic and 0.1 µF ceramic capacitors are recommended) as close to the device as is physically practical. To minimize the effect of system ground I•R drops on the logic and reference input signals, the system ground should have a low-resistance return to the load supply voltage. In stepper motor applications applying a constant current to the load, slow-decay mode PWM is used typically to limit the switching losses in the device and iron losses in the motor. See also “Current Sensing” and “Thermal Considerations” above. Fixed Off-Time Selection DC Motor Applications With increasing values of toff, switching losses decrease, low-level load-current regulation improves, EMI is reduced, the PWM frequency will decrease, and ripple current will increase. The value of toff can be chosen for optimization of these parameters. For applications where audible noise is a concern, typical values of toff are chosen to be in the range of 15 to 35 µs. Stepper Motor Applications In closed-loop systems, the speed of a dc motor can be controlled by PWM of the PHASE or ENABLE inputs, or by varying the REF input voltage (VREF). In digital systems (microprocessor controlled), PWM of the PHASE or ENABLE input is used typically thus avoiding the need to generate a variable analog voltage reference. In this case, a dc voltage on the REF input is used typically to limit the maximum load current. The MODE terminal can be used to optimize the performance of the device in microstepping/sinusoidal stepper motor drive applications. When the average load current is increasing, slow-decay mode is used to limit the switching losses in the device and iron losses in the motor. In dc servo applications that require accurate positioning at low or zero speed, PWM of the PHASE input is selected typically. This simplifies the servo-control loop because the transfer function between the duty cycle on the PHASE input and the average voltage applied to the VBB +5 V 47 µF 10 9 8 PHASE1 0.5 Ω V 5 0.5 Ω REF2 6 7 6 7 ENABLE 1 4 VCC VBB MODE 1 3 LOGIC 2 11 1 12 + REF1 5 820 pF MODE 2 11 2 25 kΩ 4 ENABLE 2 10 3 PHASE2 9 VBB LOGIC 8 V VCC 1 12 25 kΩ 820 pF Dwg. EP-048 Typical Bipolar Stepper Motor Application www.allegromicro.com 3952 FULL-BRIDGE PWM MOTOR DRIVER CAUTION: In fast-decay mode, when the direction of the motor is changed abruptly, the kinetic energy stored in the motor and load inertia will be converted into current that charges the VBB supply bulk capacitance (power supply output and decoupling capacitance). Care must be taken to ensure the capacitance is sufficient to absorb the energy without exceeding the voltage rating of any devices connected to the motor supply. motor is more linear than in the case of ENABLE PWM control (which produces a discontinuous current at lowcurrent levels). With bidirectional dc servo motors, the PHASE terminal can be used for mechanical direction control. Similar to when braking the motor dynamically, abrupt changes in the direction of a rotating motor produce a current generated by the back EMF. The current generated will depend on the mode of operation. If the internal current-control circuitry is not being used, then the maximum load current generated can be approximated by See also, the sections on brake operation under “Functional Description,” above. ILOAD = (VBEMF + VBB)/RLOAD where VBEMF is proportional to the motor’s speed. If the internal slow-decay current-control circuitry is used, then the maximum load current generated can be approximated by ILOAD = VBEMF/RLOAD. For both cases, care must be taken to ensure the maximum ratings of the device are not exceeded. If the internal fast-decay current-control circuitry is used, then the load current will regulate to a value given by ILOAD = VREF/(10•RS). VBB +5 V 16 2 15 3 14 4 47 µF MODE 13 LOGIC 12 5 6 PHASE 7 ENABLE 8 0.5 Ω 25 kΩ 820 pF VBB + 1 BRAKE 11 VCC 10 VBB 9 Dwg. EP-047 Typical DC Servo Motor Application 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3952 FULL-BRIDGE PWM MOTOR DRIVER A3952SB Dimensions in Inches (controlling dimensions) 16 0.020 0.008 9 NOTE 4 0.430 MAX 0.280 0.240 0.300 BSC 1 0.070 0.045 0.100 0.775 0.735 8 0.005 BSC MIN 0.210 MAX 0.015 0.150 0.115 MIN 0.022 0.014 Dwg. MA-001-17A in Dimensions in Millimeters (for reference only) 16 0.508 0.204 9 NOTE 4 10.92 MAX 7.11 6.10 7.62 BSC 1 1.77 1.15 2.54 19.68 18.67 8 BSC 0.13 MIN 5.33 MAX 0.39 3.81 2.93 MIN 0.558 0.356 NOTES: 1. Leads 1, 8, 9, and 16 may be half leads at vendor’s option. 2. Webbed lead frame. Leads indicated are internally one piece. 3. Lead thickness is measured at seating plane or below. 4. Lead spacing tolerance is non-cumulative. 5. Exact body and lead configuration at vendor’s option within limits shown. www.allegromicro.com Dwg. MA-001-17A mm 3952 FULL-BRIDGE PWM MOTOR DRIVER A3952SEB Dimensions in Inches (controlling dimensions) 18 0.013 0.021 12 19 0.219 0.191 11 0.026 0.032 0.456 0.450 INDEX AREA 0.495 0.485 0.050 BSC 0.219 0.191 25 5 26 0.020 28 1 4 0.456 0.450 0.495 0.485 MIN 0.165 0.180 Dwg. MA-005-28A in Dimensions in Millimeters (for reference only) 18 0.331 0.533 12 19 5.56 4.85 11 0.812 0.661 11.58 11.43 12.57 12.32 1.27 INDEX AREA BSC 5.56 4.85 25 5 26 0.51 28 1 4 11.582 11.430 12.57 12.32 MIN 4.57 4.20 Dwg. MA-005-28A mm NOTES: 1. Index is centered on “D” side. 2. Webbed lead frame. Leads indicated are internally one piece. 3. Lead spacing tolerance is non-cumulative. 4. Exact body and lead configuration at vendor’s option within limits shown. 5. Intended to meet new JEDEC Standard when that is approved. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3952 FULL-BRIDGE PWM MOTOR DRIVER A3952SLB Dimensions in Inches (for reference only) 16 9 0.0125 0.0091 0.491 0.394 0.2992 0.2914 0.050 0.016 0.020 0.013 1 2 0.050 BSC 3 0.4133 0.3977 0° TO 8° 0.0926 0.1043 0.0040 MIN. Dwg. MA-008-17 in Dimensions in Millimeters (controlling dimensions) 16 9 0.32 0.23 10.65 10.00 7.60 7.40 1.27 0.40 0.51 0.33 1 2 3 10.50 10.10 1.27 BSC 0° TO 8° 2.65 2.35 0.10 MIN. NOTES: 1. Webbed lead frame. Leads indicated are internally one piece. 2. Lead spacing tolerance is non-cumulative. 3. Exact body and lead configuration at vendor’s option within limits shown. www.allegromicro.com Dwg. MA-008-17A mm 3952 FULL-BRIDGE PWM MOTOR DRIVER A3952SW Dimensions in Inches (controlling dimensions) 0.180 1.260 1.240 0.020 MAX 0.775 0.765 0.245 0.225 0.055 0.045 0.155 ø 0.145 0.140 0.365 INDEX AREA 0.065 0.035 0.570 0.540 0.290 MIN 1 0.030 0.020 12 0.023 0.018 0.100 ±0.010 Dimensions in Millimeters (for reference only) 0.51 0.080 0.070 Dwg. MP-007 in 4.57 32.00 31.49 MAX 19.69 19.45 6.22 5.71 1.40 1.14 3.94 ø 3.68 3.56 9.27 INDEX AREA 1.65 0.89 0.135 0.100 14.48 13.71 3.43 2.54 7.36 MIN 1 0.76 0.51 12 2.54 ±0.254 NOTES: 1. Lead thickness is measured at seating plane or below. 2. Lead spacing tolerance is non-cumulative. 3. Exact body and lead configuration at vendor’s option within limits shown. 4. Lead gauge plane is 0.030” (0.762 mm) below seating plane. 0.59 0.45 2.03 1.77 Dwg. MP-007 mm 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3952 FULL-BRIDGE PWM MOTOR DRIVER Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. www.allegromicro.com