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Fujitsu Microelectronics Europe
Application Note
MCU-AN-300090-E-V10
FR FAMILY
32-BIT MICROCONTROLLER
MB91460
SPI COMMUNICATION TO/FROM
SERIAL EEPROM
(for NM93CS46)
APPLICATION NOTE
SPI COMMUNICATION TO/FROM SERIAL EEPROM
Revision History
Revision History
Date
2008-05-08
Issue
V1.0; MPi initial version
This document contains 24 pages.
MCU-AN-300090-E-V10
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Warranty and Disclaimer
Warranty and Disclaimer
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts
its warranties and its liability for all products delivered free of charge (eg. software include or
header files, application examples, target boards, evaluation boards, engineering samples of IC’s
etc.), its performance and any consequential damages, on the use of the Product in accordance with
(i) the terms of the License Agreement and the Sale and Purchase Agreement under which
agreements the Product has been delivered, (ii) the technical descriptions and (iii) all accompanying
written materials. In addition, to the maximum extent permitted by applicable law, Fujitsu
Microelectronics Europe GmbH disclaims all warranties and liabilities for the performance of the
Product and any consequential damages in cases of unauthorised decompiling and/or reverse
engineering and/or disassembling. Note, all these products are intended and must only be used
in an evaluation laboratory environment.
1.
Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially in
accordance with the accompanying written materials for a period of 90 days form the date of
receipt by the customer. Concerning the hardware components of the Product, Fujitsu
Microelectronics Europe GmbH warrants that the Product will be free from defects in material
and workmanship under use and service as specified in the accompanying written materials
for a duration of 1 year from the date of receipt by the customer.
2.
Should a Product turn out to be defect, Fujitsu Microelectronics Europe GmbH´s entire liability
and the customer´s exclusive remedy shall be, at Fujitsu Microelectronics Europe GmbH´s
sole discretion, either return of the purchase price and the license fee, or replacement of the
Product or parts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in
original packing and without further defects resulting from the customer´s use or the transport.
However, this warranty is excluded if the defect has resulted from an accident not attributable
to Fujitsu Microelectronics Europe GmbH, or abuse or misapplication attributable to the
customer or any other third party not relating to Fujitsu Microelectronics Europe GmbH.
3.
To the maximum extent permitted by applicable law Fujitsu Microelectronics Europe GmbH
disclaims all other warranties, whether expressed or implied, in particular, but not limited to,
warranties of merchantability and fitness for a particular purpose for which the Product is not
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4.
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH´s
and its suppliers´ liability is restricted to intention and gross negligence.
NO LIABILITY FOR CONSEQUENTIAL DAMAGES
To the maximum extent permitted by applicable law, in no event shall Fujitsu
Microelectronics Europe GmbH and its suppliers be liable for any damages whatsoever
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the Product.
Should one of the above stipulations be or become invalid and/or unenforceable, the remaining
stipulations shall stay in full effect
© Fujitsu Microelectronics Europe GmbH
-3-
MCU-AN-300090-E-V10
SPI COMMUNICATION TO/FROM SERIAL EEPROM
Contents
Contents
REVISION HISTORY ............................................................................................................ 2
WARRANTY AND DISCLAIMER ......................................................................................... 3
CONTENTS .......................................................................................................................... 4
0 INTRODUCTION.............................................................................................................. 6
1 NM93CS46....................................................................................................................... 7
1.1
EEPROM................................................................................................................. 7
1.2
Connection to MB91460 .......................................................................................... 8
1.3
Communication Timing............................................................................................ 8
1.3.1
Write Cycle Timing of NM93CS46 ............................................................. 8
1.3.2
Read Cycle Timing of NM93CS46 ............................................................. 9
1.3.3
EEPROM Busy Timing............................................................................... 9
1.3.4
Leading Zeros............................................................................................ 9
1.4
Used EEPROM Commands .................................................................................. 10
1.5
Example Code....................................................................................................... 10
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
Initial Functions and Declarations ............................................................ 11
1.5.1.1
Flowchart ................................................................................. 11
1.5.1.2
C Code .................................................................................... 12
Write Enable and Write Disable ............................................................... 13
1.5.2.1
Flowchart ................................................................................. 13
1.5.2.2
C Code .................................................................................... 14
Write to EEPROM.................................................................................... 15
1.5.3.1
Flowchart ................................................................................. 15
1.5.3.2
C Code .................................................................................... 16
Read from EEPROM ............................................................................... 17
1.5.4.1
Flowchart ................................................................................. 17
1.5.4.2
C Code .................................................................................... 18
Example of usage of EEPROM functions in Main Function...................... 19
1.5.5.1
Flowchart ................................................................................. 19
1.5.5.2
C Code .................................................................................... 20
2 APPENDIX A ................................................................................................................. 21
2.1
Related Documents............................................................................................... 21
3 ADDITIONAL INFORMATION ....................................................................................... 22
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Contents
LIST OF FIGURES ............................................................................................................. 23
LIST OF TABLES............................................................................................................... 24
© Fujitsu Microelectronics Europe GmbH
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Introduction
0 Introduction
This application note describes how to communicate via SPI using the MB91467-USART
with a serial EEPROM. In this note a NM93CS46 EEPROM from National Semiconductor is
used.
Please note that this document only gives a rough overview about the communication. The
described source codes were written for understanding not for code size or speed. Neither
interrupts nor timers were used. Time critical coding is always done by simple flag polling or
wait loop.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1 NM93CS46
THIS CHAPTER DESCRIBES HOW TO COMMUNICATE WITH THE NM93CS46 EEPROM
1.1
EEPROM
The NM93CS46 serial EEPROM from National Semiconductor has 1024-Bit memory size,
organized as 64 16-Bit-Words.
The NM93CS46 has the following pin-out:
•
CS 1
8 Vcc
SK 2
7 PRE
DI 3
6 PE
DO 4
5 GND
Figure 1-1: NM93CS46 Pinout
Pin names:
CS
SK
DI
DO
GND
PE
PRE*
Vcc
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Program Enable
Protect Register Enable
Power Supply (+ 5 volts)
Table 1-1: NM93CS46 Pin Description
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Chapter 1 NM93CS46
1.2
Connection to MB91460
The EEPROM can be connected as shown in the following schematic. Please note that no
power supply pins and other MCU-Pins are drawn than those for the connection to the
EEPROM.
DI
SOT2
DO
SIN2
SK
SCK2
CS
P25_0
PE
P25_1
PRE*
P25_2
NM93CS46
MB91460
* PRE is not used in the code example below
Figure 1-2: Connections between NM93CS46 and MB91460
1.3
Communication Timing
Detailed description of the timing and timing parameters can be found in the corresponding
datasheet of the NM93CS46 EEPROM.
1.3.1 Write Cycle Timing of NM93CS46
A write cycle (write to EEPROM) has the following bit timing (ESCR:SCES = 1, ECCR:SCDE =
1):
CS
SCK
SOT (DI)
D7
D6
D5
D4
D3
D2
D1
D0
Figure 1-3: Write Cycle
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
Data sampling of the EEPROM is performed at the rising edge of the SCK signal.
1.3.2 Read Cycle Timing of NM93CS46
Unfortunately the read cycle has a different timing. The NM93CS46-EEPROM does not
assert the first data bit after CS goes “1”, but on the rising edge of the first serial clock:
CS
SCK
SIN (DO)
D7
D6
D5
D4
D3
D2
D1
D0
Figure 1-4: Read Cycle
The red arrow denotes the sampling time of the USART, if the clock delay by a half cycle is
disabled (ECCR:SCDE = 0).
The workaround, which is presented here, is to disable the clock delay (ECCR:SCDE = 0) just
before reading the EEPROM out. This can be done, because writing to and reading from the
EEPROM does not overlap. After reading the bits, the communication is set back to enable
the clock delay (ECCR:SCDE = 1).
1.3.3 EEPROM Busy Timing
After writing data to the EEPROM it signals a busy state by setting a “0” to the serial output
(DO/SIN). After the busy state the pin goes to “1”.
In the code example below, this busy wait is simply performed by polling the serial input of
the USART (ESCR:SIOP) in two steps. First step is waiting for “0”, the second is waiting for
“1”.
Because the busy state can take up to 10 ms, time critical software should use a timer
interrupt for this, to save CPU performance.
1.3.4 Leading Zeros
The commands to the EEPROM are 9-Bit or 25-Bit wide. This does not fit into the 8-Bit
pattern of the USART synchronous mode.
In the code example below a workaround for this is used. Because the EEPROM ignores
leading Zero-Bits, the first byte is used to adjust the bit stream, using “leading Zeros”.
Example: A WEN (Write enable) command is sent to the EEPROM, which is composed of the
following bit stream: 1 0011 XXXX. These are 9 Bits. The USART sends the following bit
stream instead: 0000 0001 0011 XXXX. The blue “0s” are the “leading Zeros”, which are
ignored by the EEPROM. This bit stream is represented by the bytes 0x01 and 0x3X (MSB
first).
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Chapter 1 NM93CS46
1.4
Used EEPROM Commands
The following EEPROM commands are used in the code example below:
Instr.
Op
Code
Address
READ
110
A5-A0
X
Read data stored in memory
WEN
100
11XXXX
1
Enable programming (write enable)
WRITE
101
A5-A0
D15-D0
1
Write data to address
WDS
100
00XXXX
D15-D0
1
Disable programming (write disable)
Data
PE
Pin
Comments
Table 1-2: EEPROM Commands
Commands which need the PRE-Pin are not used in the code example below.
1.5
Example Code
The following code shows how to establish a communication to and from the EEPROM.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.1
Initial Functions and Declarations
1.5.1.1 Flowchart
InitUSART ()
Set Baud rate
Set clock inversion
(ESCR:SCES = 1)
Set clock delay
(ECCR:SCDE = 1)
InitPorts()
Set Port-Register
25 to “0x00”
Set Port 9_0, 9_1,
9_2 to Output for
CS-, PE- and
PRE-Pin
wait()
Argument: j
Do loop of 4 “NOPS”
from “0” to “j”
Reception and
Transmission enable
Set Mode 2, enable
SCK2, enable SOT2
Set MSB first
Enable SIN2, SOT2,
SCK2 functionality
Figure 1-5: Flowchart: Initialization Functions
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Chapter 1 NM93CS46
1.5.1.2 C Code
#define DATASIZE 64
// EEPROM memory size in words (16 Bit)
unsigned short data[DATASIZE];
unsigned short readbuffer[DATASIZE];
void InitUSART(void)
{
BGR02 = 15;
ESCR02 = 0x01;
ECCR02 = 0x10;
SCR02 = 0x03;
SMR02 = 0x83;
SSR02 = 0x04;
PFR20_D0 = 1;
PFR20_D1 = 1;
EPFR20_D1 = 0;
PFR20_D2 = 1;
EPFR20_D2 = 0;
//
//
//
//
//
//
// data to sent to EEPROM
// data received from EEPROM
1M Bit/s @ 16 MHz
SCES = 1
SCDE = 1
reception and transmission enable
Mode 2, SCLK enable, SOT enable
MSB first, no interrupts
// enable SIN2 input
// enable SOT2 output
// enable SCK2 output
}
void InitPorts(void)
{
// Bit#2: CS, Bit#1: PE, Bit#0: PRE
PDR25 &= ~0x07;
// P25_0 to P25_2 low
DDR25 |= 0x07;
// CS, PE, PRE to output
PDR16 = 0x00;
// LED-Port
DDR16 = 0xFF;
}
void wait(unsigned int j)
{
volatile unsigned short i;
}
for (i = 0; i < j; i++)
{
#pragma asm
NOP
NOP
NOP
NOP
#pragma endasm
}
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.2
Write Enable and Write Disable
1.5.2.1 Flowchart
write_enable()
write_disable()
Set CS=1 (PDR25_D0 =1)
Set CS=1 (PDR25_D0 =1)
Y
TDRE == 0?
TDRE == 0?
N
N
Send Start-Bit with
“leading zeros”
(TDR02 = 0x01)
TDRE == 0?
Send Start-Bit with
“leading zeros”
(TDR02 = 0x01)
Y
TDRE == 0?
N
Y
N
Send WEN command
(TDR02 = 0x30)
Transmission
end?
Y
Send WDS command
(TDR02 = 0x00)
N
Transmission
end?
Y
N
Y
CS = 0 (PDR25_D0 = 0)
CS = 0 (PDR25_D0 = 0)
Figure 1-6: Flowchart: Write Enable/Disable
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Chapter 1 NM93CS46
1.5.2.2 C Code
void write_enable(void)
{
PDR25_D0 = 1;
// CS = 1
while (SSR02_TDRE == 0);
TDR02 = 0x01;
// Start-Bit (with "leading zeros")
while (SSR02_TDRE == 0);
TDR02 = 0x30;
// WEN command
while (ECCR02 & 0x01);
while (!(ECCR02 & 0x01));
// wait for start of transmission
// (or ongoing)
// wait for transmission finished
PDR25_D0 = 0;
// CS = 0
}
void write_disable(void)
{
PDR25_D0 = 1;
// CS = 1
while (SSR02_TDRE == 0);
TDR02 = 0x01;
// Start-Bit (with "leading zeros")
while (SSR02_TDRE == 0);
TDR02 = 0x00;
// WDS command
while (ECCR02 & 0x01);
while (!(ECCR02 & 0x01));
// wait for start of transmission
// (or ongoing)
// wait for transmission finished
PDR25_D0 = 0;
// CS = 0
}
Note that the expression (ECCR02 & 0x01) masks the Transmission Bus Idle Bit (TBI).
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.3
Write to EEPROM
1.5.3.1 Flowchart
write_eeprom()
CS = 1 (PDR25_D0 =1)
Send Least Significant Byte
TDRE == 0?
Y
N
Transmission
end?
Send Start-Bit with “leading
zeros” (TDR02 = 0x01)
N
Y
CS = 0 (PDR25_D0 = 0)
Calculate
Command/Address-Byte
Wait some ms
TDRE == 0?
CS = 1 (PDR25_D0 = 1)
Y
N
Busy?
(SIOP == 1)?
Send Command/AddressByte
N
Y
TDRE == 0?
Y
Ready?
(SIOP == 0)?
N
N
Send Most Significant Byte
Y
CS = 0 (PDR25_D0 = 0)
TDRE == 0?
Y
N
Figure 1-7: Flowchart: Write EEPROM
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Chapter 1 NM93CS46
1.5.3.2 C Code
void write_eeprom(unsigned char adr)
{
unsigned char dout, command;
PDR25_D0 = 1;
// CS = 1
while (SSR02_TDRE == 0);
TDR02 = 0x01;
// Start-Bit (with "leading zeros")
command = (adr & 0x3F) | 0x40; // Address and Write-Instruction
dout = command;
while (SSR02_TDRE == 0);
TDR02 = dout;
dout = (data[adr] >> 8) & 0xFF; // MSB
while (SSR02_TDRE == 0);
TDR02 = dout;
dout = data[adr] & 0xFF;
while (SSR02_TDRE == 0);
TDR02 = dout;
// LSB
while (ECCR02 & 0x01);
while (!(ECCR02 & 0x01));
// wait for start of transmission
//
(or ongoing)
// wait for transmission finished
PDR25_D0 = 0;
// CS = 0
wait(1);
//
Next function (waiting for busy release) is made by
//
polling. Please note, that for the NM93CS46 EEPROM the
//
wait time can take till 10 ms! I. e. the CPU is then
//
also busy. For fast application a timer should be used,
//
which generates an interrupt after 10 ms from here,
//
so that the CPU can perform other jobs in this time.
PDR25_D0 = 1;
// CS = 1
while(ESCR02_SIOP == 1);
// wait for eeprom busy
while(ESCR02_SIOP == 0);
// wait for eeprom busy release
PDR25_D0 = 0;
// CS = 0
}
Note, that the expression (ECCR02 & 0x01) masks the Transmission Bus Idle Bit (TBI).
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.4
Read from EEPROM
1.5.4.1 Flowchart
read_eeprom()
CS = 1 (PDR25_D0 = 1)
Clear possible reception
errors (CRE = 1)
Send Start-Bit with
“leading zeros”
(TDR02 = 0x01)
Disable Clock delay for
reception (SCDE = 0)
Calculate
Command/AddressByte
RDRF == 0 ?
Send dummy data to
produce SCLK
Y
RDRF == 0 ?
N
Y
N
Flush Reception
Register
Read Least Significant Byte
Send
Command/AddressByte
RDRF == 0 ?
Send dummy data to
produce SCLK
Y
RDRF == 0 ?
N
Y
N
Flush Reception
Register
Read Least Significant Byte
Re-enable Clock delay
(SCDE = 1)
CS = 0 (PDR25_D0 = 0)
Figure 1-8: Flowchart: Read EEPROM
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Chapter 1 NM93CS46
1.5.4.2 C Code
void read_eeprom(unsigned char adr)
{
unsigned char din, command, dout;
PDR25_D0 = 1;
// CS = 1
while (SSR02_TDRE == 0);
TDR02 = 0x01;
// Start-Bit (with "leading zeros")
command = (adr & 0x3F) | 0x80; // Address and Write-Instruction
dout = command;
while (SSR02_RDRF == 0);
// transmission finished (via
//
reception)?
din = RDR02;
// flush reception register
TDR02 = dout;
while (SSR0_RDRF == 0);
// transmission finished (via
//
reception)?
// flush reception register
// Clear possible errors, reset
//
reception state machine
din = RDR02;
SCR02_CRE = 1;
// NOTE: Make sure that SCK is "0" while setting SCDE to "0"
//
(ECCR0 = 0x00;)
//
In this case (1M bps) no check is needed. Be careful with
//
slower baud rates!
ECCR02 = 0x00;
// SCDE = 0 Needed
//
for special read timing of
//
used EEPROM (may not be
//
necessary for other EEPROMs)
TDR02 = 0x00;
// set dummy byte to produce SCLK
while (SSR02_RDRF == 0);
din = RDR02;
readbuffer[adr] = (din << 8);
while (SSR02_TDRE == 0);
TDR02 = 0x00;
// transmission finished (via
//
reception)?
// MSB
// set dummy byte to produce SCLK
while (SSR02_RDRF == 0);
din = RDR02;
// LSB
readbuffer[adr] = (readbuffer[adr] | din);
ECCR02 = 0x10;
// SCDE = 1: Set back
//
for write timing
PDR25_D0 = 0;
// CS = 0
}
Note: Because reception is enabled and the USART is synchronous master, the USART
always receives (dummy) data from SIN. Therefore the Reception Data Register Full Flag
(RDRF) can be used to determine transmission end, because USART generates the serial
clock during (dummy) transmission. This is an alternative to using the Transmission Bus Idle
Flag (TBI).
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Chapter 1 NM93CS46
1.5.5
Example of usage of EEPROM functions in Main Function
1.5.5.1 Flowchart
main()
Create data
(not in example)
Flush Reception
Register
PE = 1 (PDR25_D1 = 1)
Clear possible
Reception Errors
Call write_enable()
Read data: Call
read_eeprom()
Write data: Call
write_eeprom()
All data
written?
All data
read?
N
Y
Y
N
READ
PE = 0 (PDR25_D1 = 0)
WRITE
Figure 1-9: Flowchart: Main Function
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Chapter 1 NM93CS46
1.5.5.2 C Code
The code above writes to/reads from all 64 16-Bit-Words of the EEPROM. The functions
void
write_eeprom(unsigned
char
address)
and
void
read_eeprom(unsigned char address) can also be used separately for single
address access.
void main(void)
{
unsigned char i, error, dummy;
InitIrqLevels();
__set_il(31);
__EI();
PORTEN = 0x3;
InitPorts();
InitUSART();
// allow all levels
// globally enable interrupts
// Enable I/O Ports
// Initialize PRE, PE, and CS
// Init USART for SPI communication
// Put code or function call here to produce data for EEPROM
// write data
PDR25_D1 = 1;
// PE = 1 must be set here
write_enable();
for (i = 0; i < DATASIZE; i++)
{
write_eeprom(i);
}
write_disable();
PDR25_D1 = 0;
// PE = 0 must be set here
// Do something else ...
// read data
dummy = RDR02;
// flush read buffer
SCR02_CRE = 1;
// clear possible overruns
for (i = 0; i < DATASIZE; i++)
{
read_eeprom(i);
}
// Add further code here ...
}
It should be noted that the hardware watchdog clearing is not done in the code explained
above and the real application should take care.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 2 APPENDIX A
2 APPENDIX A
THIS CHAPTER NAMES THE RELATED DOCUMENTS
2.1
Related Documents
•
mcu-an-300002-e-spi
Fujitsu Application Note about SPI Modes
•
DS93CS46
National Semiconductor data sheet of NM93CS46
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-300090-E-V10
SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 3 Additional Information
3 Additional Information
Information about FUJITSU Microcontrollers can be found on the following Internet page:
http://mcu.emea.fujitsu.com/
The software example related to this application note is:
91460_spi_eeprom
It can be found on the following Internet page:
http://mcu.emea.fujitsu.com/mcu_product/mcu_all_software.htm
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© Fujitsu Microelectronics Europe GmbH-10
SPI COMMUNICATION TO/FROM SERIAL EEPROM
List of Figures
List of Figures
Figure 1-1: NM93CS46 Pinout ............................................................................................... 7
Figure 1-2: Connections between NM93CS46 and MB91460 ................................................ 8
Figure 1-3: Write Cycle .......................................................................................................... 8
Figure 1-4: Read Cycle .......................................................................................................... 9
Figure 1-5: Flowchart: Initialization Functions ...................................................................... 11
Figure 1-6: Flowchart: Write Enable/Disable ........................................................................ 13
Figure 1-7: Flowchart: Write EEPROM................................................................................. 15
Figure 1-8: Flowchart: Read EEPROM ................................................................................ 17
Figure 1-9: Flowchart: Main Function ................................................................................... 19
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-300090-E-V10
SPI COMMUNICATION TO/FROM SERIAL EEPROM
List of Tables
List of Tables
Table 1-1: NM93CS46 Pin Description................................................................................... 7
Table 1-2: EEPROM Commands ......................................................................................... 10
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© Fujitsu Microelectronics Europe GmbH-10