Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UCD4060B
Preliminary
CMOS IC
CMOS 14-Stage Ripple-Carry
Binary Counter/Divider and
Oscillator
„
SOP-16
DESCRIPTION
UCD4060B consists of an oscillator section and 14 ripple-carry
binary counter stages. The oscillator configuration allows design of
either RC or crystal oscillator circuits. A RESET input is provided
which resets the counter to the all-O’s state and disables the
oscillator. A high level on the RESET line accomplishes the reset
function. All counter stages are master-slave flip-flops. The state of
the counter is advanced one step in binary order on the negative
transition of ФI and ФO. All inputs and outputs are fully buffered.
Schmitt trigger action on the input-pulse line permits unlimited
input-pulse rise and fall times.
„
TSSOP-16
FEATURES
* 12MHz clock rate at 15V
* Common reset
* Fully static operation
* Buffered inputs and outputs
* Schmitt trigger input-pulse line
„
Oscillator Features
* All active components on chip
* RC or crystal oscillator configuration
* RC oscillator frequency of 690 kHz min. at 15V
„
APPLICATIONS
* Control counters
* Timers
* Frequency dividers
* Time-delay circuits
„
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UCD4060BL-S16-R
UCD4060BG-S16-R
UCD4060BL-S16-T
UCD4060BG-S16-T
UCD4060BL-P16-R
UCD4060BG-P16-R
UCD4060BL-P16-T
UCD4060BG-P16-T
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Copyright © 2013 Unisonic Technologies Co., Ltd
Package
Packing
SOP-16
SOP-16
TSSOP-16
TSSOP-16
Tape Reel
Tube
Tape Reel
Tube
1 of 9
QW-R502-866.b
UCD4060B
„
PIN CONFIGURATION
„
LOGIC DIAGRAM
Preliminary
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CMOS IC
2 of 9
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UCD4060B
„
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING (TA=25°C, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VDD
-0.5 ~ 20
V
Input Voltage
VIN
-0.5 ~VCC+0.5
V
Output Voltage
VOUT
-0.5 ~VCC+0.5
V
Input Clamp Current (VIN<0, or VIN>VDD)
IIK
±10
mA
Power Dissipation
TA=-40°C~+85°C
PD
500
mW
Operating Temprature
TOPR
-40~+85
°C
Storage Temperature
TSTG
-65~+150
°C
Notes: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
„
THERMAL DATA
PARAMETER
SOP-16
Junction to Ambient
TSSOP-16
„
SYMBOL
θJA
RATINGS
90
110
UNIT
°C/W
RECOMMENDED OPERATING COMDITIONS
PARAMETER
Supply Voltage
SYMBOL
VDD
Input-Pulse Width
tW
Input-Pulse Frequency
fφI
Input-Pulse Rise and Fall Time
tr / tf
Reset Pulse Width
tW
CONDITIONS
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
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MIN
3
100
40
30
TPY
MAX
18
ns
3.5
8
12
Unlimited
120
60
40
UNIT
V
MHz
μs
ns
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„
Preliminary
ELECTRICAL CHARACTERISTICS (TA=25°C, unless otherwise specified)
PARAMETER
SYMBOL
Quiescent Supply Current
ICC
Output Low (Sink) Current
IOL
Output High (Source) Current
IOH
Output Voltage: Low-Level
VOL
Output Voltage: High-Level
VOH
Input Low Voltage
VIL
Input High Voltage
VIH
Input Leakage Current
„
CMOS IC
II(LEAK)
CONDITIONS
VIN=0, 5V, VDD=5V
VIN=0, 10V, VDD=10V
VIN=0, 15V, VDD=15V
VIN=0, 20V, VDD=20V
VOUT=0.4V, VIN=0, 5V, VDD=5V
VOUT=0.5V, VIN=0, 10V, VDD=10V
VOUT=1.5V, VIN=0, 15V, VDD=15V
VOUT=4.6V, VIN=0, 5V, VDD=5V
VOUT=2.5V, VIN=0, 5V, VDD=5V
VOUT=9.5V, VIN=0, 10V, VDD=10V
VOUT=13.5V, VIN=0, 15V, VDD=15V
VIN= 0, 5V, VDD=5V
VIN= 0, 10V, VDD=10V
VIN= 0, 15V, VDD=15V
VIN= 0, 5V, VDD=5V
VIN= 0, 10V, VDD=10V
VIN= 0, 15V, VDD=15V
VOUT=0.5, 4.5V, VDD=5V
VOUT=1, 9V, VDD=10V
VOUT=1.5, 13.5V, VDD=15V
VOUT=0.5, 4.5V, VDD=5V
VOUT=1, 9V, VDD=10V
VOUT=1.5, 13.5V, VDD=15V
VIN=0, 18V, VDD=18V
MIN
0.51
1.3
3.4
-0.51
-1.6
-1.3
-3.4
4.95
9.95
14.95
TPY
0.04
0.04
0.04
0.08
1
2.6
6.8
-1
-3.2
-2.6
-6.8
0
0
0
5
10
15
MAX
5
10
20
100
UNIT
μA
mA
mA
0.05
0.05
0.05
V
V
1.5
3
4
3.5
7
11
V
V
±10-5
±0.1
μA
TPY
MAX
UNIT
370
150
100
100
50
40
100
50
40
7
16
24
50
20
15
740
300
200
200
100
80
200
100
80
SWITCHING CHARACTERISTICS (TA =25°C, Input tr / tf =20ns, CL =50pF, RL = 200kΩ)
PARAMETER
CLOCKED OPERATION
SYMBOL
Propagation Delay Time,
ФI to Q4
tPLH / tPHL
Propagation Delay Time,
Qn to Qn+1
tPLH / tPHL
Transition Time
tTHL/ tTLH
Maximum Input-Pulse
Frequency
f ФI
Minimum Input-Pulse Width
Input-Pulse Rise and Fall Time
tW
tr Ф/ tf Ф
Average Input Capacitance
CI
CONDITIONS
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15
VDD=5V
VDD=10V
VDD=15V
Any Input
UNISONIC TECHNOLOGIES CO., LTD
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MIN
3.5
8
12
ns
ns
ns
MHz
100
40
30
ns
7.5
pF
Unlimited
5
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Preliminary
CMOS IC
SWITCHING CHARACTERISTICS(Cont.)
PARAMETER
RESET OPERATION
SYMBOL
Propagation Delay Time
tPLH / tPHL
Minimum Reset Pulse Width
tWR
CONDITIONS
MIN
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15
TPY
MAX
180
80
50
60
30
20
360
160
100
120
60
40
UNIT
ns
ns
RC OPERATION
VDD=5V
CX=200pF,
RS=560kΩ,
VDD=10V
RX=50kΩ
VDD=15V
CX=200pF,
VDD=5V~10V
RS=560kΩ,
VDD=10V~15V
RX=50kΩ
CX=10Μf, VDD=5V
CX=50μF, VDD=10V
CX=10μF, VDD=15V
RX=500kΩ, VDD=5V
RX=300kΩ, VDD=10V
RX=300kΩ, VDD=15V
CX=15pF,
VDD=10V
RS=30kΩ,
VDD=15
RX=5kΩ
Variation of Frequency
Variation of Frequency with
voltage change
RX max
CX max
Maximum Oscillator Frequency
IOL
Drive Current at Pin 9
IOH
VO=0.4V, VDD=5V
VO=0.5V, VDD=10V
VO=1.5V, VDD=15
VO=4.6V, VDD=5V
VO=9.5V, VDD=10V
VO=13.5V, VDD=15
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23±10%
24±10%
25±10%
1.5
kHz
kHz
0.5
20
20
10
1000
50
50
530
650
810
690
800
940
0.16
0.42
1
-0.16
-0.42
-1
0.35
0.8
2
-0.35
-0.8
-2
MΩ
μF
kHz
mA
mA
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS
TEST
tPLH/tPHL
S1
GND
Fig. 1 Test Circuit
Inputs
VIN
VCC
tr, tf
20 ns
VM
VLOAD
CL
RL
VCC/2
VCC
50 pF
200 KΩ
90%
Input
VDD
90%
10%
10%
tr
tf
0V
VIN
Input
VM
VM
tPLH
tPHL
0V
90%
Output
VOH
90%
VM
VM
10%
10%
tf
tr
tPHL
VOL
tPLH
90%
90%
Output
VM
VM
10%
tf
VOH
10%
VOL
tr
Notes: 1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤1MHz, ZO = 50Ω.
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
500uF
CL
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VDD
I
CL
PULSE
GENERATOR
Fig. 4 Dynamic Power Dissipation Test Circuit
CX
RX
RS
10
11
9
RESET
12
Fig. 5 Typical RC Circuit
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
VDD
VDD
VSS
INPUTS
I
VSS
Fig. 6 Quiescent device current test circuit
Fig. 7 Input voltage test circuit
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
Fig. 8 Input current test circuit
Note:Measure inputs sequentially, to both VDD and VSS; Connect all unused inputs to either VDD or VSS.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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