266-MHz, 32-bit microcontroller with ARM9EJ-S™ core LPC3180/01 Low-power, ARM9-based microcontroller A USB OTG interface with full host capability lets this high-performance microcontroller connect directly to peripherals. Other options – including seven UARTs, two SPI, two I2C, a real-time clock with separate power domain, and controllers for NAND Flash and SDRAM memory – increase design flexibility. Key features 4266-MHz, 32-bit ARM9EJ-S with AHB/APB interfaces 490-nm technology for operation down to 0.9 V in low-power mode 4Vector floating-point coprocessor 4External memory interface for Flash, SDR, and DDR SDRAM 465 KB of SRAM, 32 K of instruction and data cache 4USB OTG with full-speed host capability 4General-purpose DMA controller and memory management unit 410-bit A/D converter 4Multiple serial interfaces: two I2C, two SPI, seven UART 4Two 32-bit timers and real-time clock with separate clock and power domain 4Secure Digital (SD) memory-card interface 4JTAG interface with emulation-trace buffer 4 Core voltage: 1.35 V (266 MHz) or 1.2 V (208 MHz) & I/O Voltage: 1.8, 2.8 and 3.0 V 4Operating temperature: -40 °C to +85 °C 4Package: LFBGA320 (13 x 13 x 0.9 mm) Applications 4Industrial 4Medical 4Peripheral control: printers, scanners, POS 4Medical devices 4GPS, motors, security devices, servo loops 4Network control The NXP microcontroller LPC3180/01, a 32-bit microcontroller built around a 90-nm ARM9 core, is the industry’s first to provide a vector floating-point co-processor, integrated USB On-The-Go (OTG), and the ability to operate in ultra-low-power mode (down to 0.9 V). The ARM9 core operates at up to 266 MHz and is supported by 32 K of data cache and 32 K of instruction cache. There is an externalmemory interface for NAND Flash and SDRAM memory (at 1.8 V for mobile SDRAM), and a 64-KB block of on-chip SRAM. The on-chip memory management unit (MMU) supports major operating systems, including Linux, the leading OS for embedded applications. Also, the on-chip Java byte-code coprocessor supports basic security and authentication applications. The vector floating-point coprocessor increases the speed of typical calculations by a factor of four to five in scalar mode, and much more in optimized vector mode. Flexible power management enables high peak performance, especially for floating-point calculations, and can be used to shut down the core power domain while retaining real-time-clock and wake-up functionality. Third-Party Development Tools Through third-party suppliers, we offer a range of development tools for our microcontrollers. For the most current listing, please visit www.nxp.com/microcontrollers. External Memory I/F (NAND, SD, and DRAM) E-ICE/RTM Interface Embedded Trace Buffer 64-KB SRAM Interrupt Controller DMA Multiple serial communications interfaces increase design flexibility, provide larger buffer size, and deliver higher processing power. The USB 2.0 device supports On-The-Go (OTG) and has full speed host capabilities. There are seven 16C550 UARTs (one supports IrDA), two Fast I2C-bus (400 Mbps) interfaces, two SPI interfaces, and an automatic keyscan function that supports 8 x 8 keys. MMU Vector Floating–Point Coprocessor 32-bit ARM926EJ-S Bus Matrix 32-K D Cache There is a 10-bit A/D converter with three channels, two 32-bit timers with four capture/compare channels, two PWM channels, a PLL, a real-time clock with separate clock and power domain, a Watchdog timer, and a Secure Digital (SD) memory-card interface. The core voltage supports 1.35 V for 266 MHz or 1.2 V for 208 MHz, while the I/O ports support 1.8, 2.8 and 3.0 V. The operating temperature range is -40 to 85 °C. 32-K I Cache Power Management, Real-time Clock, Watchdog Timer, PLL 10-bit A/D Converter (Three Channels) USB 2.0 Full-speed / Host / OTG Two timers with Capture / Compare 2 x PWM (1 Channel Each) 2 x I2C (Master Only) 2 x SPI (Master Only) UART 1-7 (UART6 supports IrDA) Keyscan For debugging, the LPC3180/01 supports real-time emulation, has an on-chip embedded-trace buffer with a 2K x 24-bit RAM, and an integrated interrupt controller. Also, for compatibility with existing tools, it uses the standard ARM test/debug JTAG interface. I/O ports (55) LPC3180/01 block diagram LPC3180/01 selection guide Type External memory interface SRAM I-cache D-cache 1 64 KB 32 K 32 K LPC3180/01 (1) USB 2.0 Host + Device + OTG 1 I2C SPI 2 2 UARTs ADC channels (10-bit) 6(1) 3 Package LFBGA320 UART6 supports IrDA www.nxp.com © 2008 NXP N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The Date of release: August 2008 information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and Document order number: 9397 750 16606 may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof Printed in the USA does not convey nor imply any license under patent- or other industrial or intellectual property rights.