DESIGN FEATURES Wide Input Range, High Efficiency Step-Down Switching Regulators by Jeff Schenkel Introduction The LT1676 and LT1776 are Linear Technology’s latest offerings for high efficiency step-down switching regulator applications. These two parts are pin-for-pin compatible and virtually identical in operation, the only difference being their internal oscillator frequencies—100kHz for the LT1676 vs 200kHz for the LT1776. They operate in a fixed frequency mode (as opposed to constant offtime or on-time, for instance) and can be externally synchronized to a higher switching frequency. The internal output switch is rated at a nominal peak current of 700mA, which typically accommodates DC output currents of up to 500mA. The input voltage range is 7.4V to 60V. Maintaining acceptable efficiency in the upper half of this input voltage range requires very fast output-switch edge rates. The LT1676/LT1776 contain specialized output circuitry to deliver this performance. Additionally, they contain circuitry to monitor output load level and reduce leadingedge switch rate (turn-on) when the output load is light. This arrangement helps avoid pulse skipping at light load, with its consequent subharmonic behavior. True current mode operation is supported, with all its well known advantages for switching regulator operation. The shutdown pin implements a pair of functions. Pulling it down to near ground turns off the part almost completely and reduces the quiescent current to a few tens of microamperes. The second shutdown pin function acts at a threshold of roughly 1.25V. Below this level, the part operates normally, except that output switching action is inhibited. This allows the implementation of an undervoltage lockout function set by, for instance, an external resistor divider. The LT1676/LT1776 are available in both 8-pin SO and PDIP packages. Theory of Operation The LT1676/LT1776 are current mode switching regulator ICs optimized for high efficiency operation in high input voltage, low output voltage buck topologies. The block diagram in Figure 1 shows an overall view of the system. Several of the blocks are straightforward and similar to those found in traditional designs, including the internal bias regulator, oscillator and feedback amplifier. The novel portion includes an elaborate output switch section and a logic section to provide the control signals required by the switch section. The LT1676/LT1776 operate much the same as traditional current mode switchers, the major difference being their specialized output switch section. Due to space constraints, this discussion will not reiterate the basics of current mode switcher/controllers and the step-down topology. A good source of information on these topics is Linear Technology Application Note 19. VCC 2 R1 5 VIN 3 VSW RSENSE VBG SHDN 1 BIAS VB OSC SYNC 6 LOGIC Q3 I COMP SWDR Q4 SWDR SWON BOOST SWOFF Q2 Q1 D1 GND 4 SWON I BOOST COMP I I VC 8 FB AMP FB 7 gm VTH BOOST I SWOFF Q5 VBG 1776 BD Figure 1. LT1776 block diagram Linear Technology Magazine • November 1998 5 DESIGN FEATURES VIN VIN VSW VSW 0 0 SWDR SWDR SWON SWON BOOST BOOST SWOFF SWOFF 1776 TD01 1776 TD02 Figure 2a. Timing diagram: high dV/dt mode One of the classic problems in delivering low output voltage from a high input voltage at good efficiency is that minimizing AC switching losses requires very fast voltage (dV/dt) and current (dI/dt) transitions at the output device. This is in spite of the fact that in a cost-effective bipolar IC process implementation, slow lateral PNPs must be included in the switching signal path. Fast, positive-going slew rate action is provided by lateral PNP Q3 driving the Darlington arrangement of Q1 and Q2. The extra β available from Q2 greatly reduces the drive requirements of Q3. Although desirable for dynamic reasons, this topology alone will yield a large DC forward voltage drop. A second lateral PNP, Q4, acts directly on the base of Q1 to reduce the voltage drop after the slewing phase has taken place. To achieve the desired high slew rate, PNPs Q3 and Q4 are “force-fed” packets of charge via the current sources controlled by the BOOST signal. Please refer to the timing diagram of Figure 2a. A typical oscillator cycle is as follows: The logic section first generates a SWDR signal, which pow+ C1 39µF 63V ers up the current comparator and allows it time to settle. About 1µs later, the SWON signal is asserted and the BOOST signal is pulsed for a few hundred nanoseconds. After a short delay, the VSW pin slews rapidly to VIN . Later, after the peak switch current, indicated by the control voltage VC, has been reached (current mode control), the SWON and SWDR signals are turned off and SWOFF is pulsed for a few hundred nanoseconds. The use of an explicit turn-off device (Q5) improves turn-off response time and thus aids both controllability and efficiency. The system described previously handles heavy loads (continuous mode) at good efficiency, but is actually counterproductive for light loads. The method of jamming charge into the PNP bases makes it difficult to turn them off rapidly and achieve the very short switch ON times required by light loads in discontinuous mode. Furthermore, the high leading edge dV/dt rate has a similar adverse effect on light load controllability. The solution is to employ a “boost comparator” whose inputs are the VC control voltage and a fixed internal 5 1 C5 100pF 6 VIN SHDN VCC VSW LT1676 FB SYNC VC GND 4 C1: PANASONIC HFQ (201) 348-7522 C2: AVX D CASE TPSD107M010R0080 (803) 946-0362 C4, C5: X7R OR COG/NPO D1: MOTOROLA 100V, 1A, SMD SCHOTTKY (800) 441-2447 L1: COILCRAFT DO3316P-224 (847) 936-6400 90 L1 220µH 2 3 D1 MBRS1100 7 8 C3 2200pF X7R R3 22k 5% + C2 100µF 10V R1 36.5k 1% FOR 3.3V VOUT VERSION: R1: 24.3k, R2: 14.7k L1: 150µH, DO3316P-154 IOUT: 0mA TO 500mA 80 VOUT 5V 0mA to 500mA R2 12.1k 1% C4 100pF Figure 3a. Minimum component-count application 6 threshold reference, VTH. (Remember that in a current mode switching topology, the VC voltage determines the peak switch current.) When the VC signal is above VTH, the previously described “high dV/dt” action is performed. When the VC signal is below VTH, the BOOST pulses are absent, as can be seen in Figure 2b. Now the DC current activated by the SWON signal alone drives Q4 and this transistor drives Q1 by itself. The absence of a BOOST pulse plus the lack of a second NPN driver results in a much lower slew rate, which aids light load controllability. A further aid to overall efficiency is provided by the specialized bias regulator circuit, which has a pair of inputs, VIN and VCC. The VCC pin is normally connected to the switching supply output. During start-up conditions, the LT1676/LT1776 power themselves directly from VIN. However, after the switching supply output voltage reaches about 2.9V, the bias regulator uses this supply as its input. Previous generation step-down controller ICs without this provision typically required hundreds of milliwatts of quiescent power when 1676 F04a 70 EFFICIENCY (%) VIN 12V TO 48V Figure 2b. Timing diagram: low dV/dt mode 60 50 40 VIN = 12V VIN = 24V 30 VIN = 36V VIN = 48V 20 1 10 100 LOAD CURRENT (mA) 1000 1676 F04b Figure 3b. Efficiency of Figure 3a’s circuit Linear Technology Magazine • November 1998 DESIGN FEATURES 90 + C1 15µF 35V 1 5 80 VIN SHDN C5 100pF VCC 3 VSW LT1776 6 SYNC GND C2 100µF 10V L1 68µH 2 + R1 36.5k 1% D1 MBRS1100 7 FB 8 VC C3 2200pF R2 12.1k 1% C4 100pF 4 VOUT 5V 0mA to 400mA 70 EFFICIENCY (%) VIN 10V–30V 60 50 40 VIN = 10V R3 22k 5% VIN = 30V 20 C4, C5: 100pF, X7R OR COG/NPO D1: MOTOROLA 100V, 1A, SMD SCHOTTKY MBRS1100 (800) 441-2447 L1: COILCRAFT DO1608C-683 (847) 936-6400 10 100 LOAD CURRENT (mA) 1 1776 F07a C1: AVX D CASE 15µF 35V TPSD156M035R0300 (803) 946-0362 C2: AVX D CASE 100µF 10V TPSD107M010R0080 C3: 2200pF, X7R VIN = 20V 30 FOR 3.3V VOUT VERSION: IOUT: 0mA TO 500mA L1: 47µH, DO1608C-473 R1: 24.3k, R2: 14.7k 1000 1776 F07b Figure 4b. Efficiency of Figure 4a’s circuit Applications Figure 4a. Minimum PC board area application Minimum Componentoperating at high input voltages. This quency allows for a lower valued and Count Application both degraded efficiency and limited available output current due to internal heating. Choosing Between the LT1676 and LT1776 As previously mentioned, the LT1676 and LT1776 devices are pin-for-pin compatible and, in fact, nearly identical. The only real difference is in their internal oscillator frequencies, nominally 100kHz for the LT1676 and 200kHz for the LT1776. A user must decide which version is best suited for his or her particular application. Generally, the LT1776 is favored, as its higher switching fre- possibly physically smaller and less costly inductor. However, the higher switching frequency of the LT1776 increases AC switching losses, adversely affecting efficiency and internal power dissipation. In fact, certain combinations of high input voltage and output current may yield unacceptable internal power dissipation and consequent thermal rise. In these cases, the slower switching frequency of the LT1676 may yield acceptable operation. (A more thorough treatment of input voltage vs operating frequency considerations can be found in the LT1776 data sheet.) VIN 12V–48V C1 39µF 63V 6 Q1 PN2484 Q2 2N2369 1 5 VIN SYNC VCC VSW U1 LT1676 FB SHDN VC GND NC L1 220µH 2 3 D1 MBRS1100 7 8 4 + C2 100µF 10V C3 100pF VOUT 5V R1 39k 5% R2 10k 5% V+ OUT 90 80 VIN = 12V 70 4 IN – + 3 IN U2 LTC1440 6 REF 5 HYST V– GND 2 The previous application example used the LT1676 to demonstrate simultaneously the maximum input voltage and output current capability. As such, the input bypass capacitor choice was a high frequency aluminum electrolytic type, rated to R3 323k 1% 7 C1: PANASONIC HFQ 8 (201) 348-2552 C2: AVX D CASE TPSD107M010R0080 (803) 946-0362) C4, C5: X7R OR COG/NPO D1: MOTOROLA 100V, 1A, SMD SCHOTTKY (800) 441-2447 L1: COILCRAFT DO3316-224 (847) 639-6400 Minimum PC Board Area Application 1 R6 22k R7 2.4M R4 100k 1% EFFICIENCY (%) + R7 10M Figure 3a shows a basic “minimum component count” application using the LT1676. The circuit produces 5.0V at up to 500mA IOUT with input voltages in the range of 12V to 48V. The typical POUT/PIN efficiency is shown in Figure 3b. No pulse skipping is observed down to zero external load. (The several milliamperes drawn by the VCC pin acts as a sufficient preload.) As shown, the SHDN and SYNC pins are unused, however either (or both) can be optionally driven by external signals as desired. VIN = 48V VIN = 36V VIN = 24V 60 50 40 30 1676 F06 20 1 Figure 5a. Burst Mode operation configuration Linear Technology Magazine • November 1998 10 100 LOAD CURRENT (mA) 1000 1676 F07b Figure 5b. Efficiency of Figure 5a’s circuit 7 DESIGN FEATURES VIN 11V TO 30V (SEE TEXT) + C1 39µF 63V 5 VIN 1 7 FB 2 VCC SHDN C5 100pF U1 LT1776 3 VSW 8 SYNC VC GND 6 L1 100µH C4 2200pF C3 100pF 4 U3 LT1121-5 C6 0.33µF C7 0.1µF R4 0.5Ω 7.2V + D1 MBRS1100 R3 22k C8 1µF R5 3k R6 12k + C2 100µF 10V R1 57.6k 1% 3-CELL LEAD-ACID BATTERY R2 12.1k 1% 6 8 VCC 2 IOUT U2 LT1620 7 5 PROG IN + 1 – 4 NC SENSE IN AVG 1776 TA02 GND 3 C1: PANASONIC HFQ (201) 348-7522 C2: AVX TPSD107M010R0080 (803) 946-0362 L1: COILCRAFT DO3316P-104 (847) 639-6400 Figure 6a. Wide VIN range, high efficiency battery charger 63V. Also, the 100kHz switching rate of the LT1676 requires an inductor of about 220µ H. The DO3316 device size was chosen to support the output current requirements. However, both of these components are physically large. The application example in Figure 4a shows a circuit that is much smaller physically than the previous minimum component count application. The nominal 200kHz switching frequency of the LT1776 allows the use of a physically smaller 68µ H inductor—a Coilcraft DO1608C-683. This inductor will support output current to 400mA at 5V. However, the part is incapable of withstanding an indefinite short circuit to ground. (Momentary shorts of a few seconds or less can still be tolerated.) Additionally, the bulky aluminum 8 OUTPUT VOLTAGE (V) 7 6 5 4 3 2 1 0 0 50 100 150 200 OUTPUT CURRENT (mA) 250 1776 TA05 Figure 6b. Battery charger output voltage vs output current for Figure 6a’s circuit 8 electrolytic capacitor previously on VIN has been replaced by a compact 35V-rated tantalum type. The result is a postage-stamp-sized circuit with efficiency as shown in Figure 4b. Burst Mode Application The minimum component count application demonstrates that power supply efficiency degrades with lower output load current. This is not surprising, as the LT1676 itself represents a fixed power overhead. A possible way to improve light load efficiency is to use Burst Mode™ operation. Figure 5a shows the LT1676 configured for Burst Mode operation. Output voltage regulation is now provided in a “bang-bang” digital manner, via comparator U2, an LTC1440. Resistor divider R4/R5 provides a scaled version of the output voltage, which is compared against U2’s internal reference. Intentional hysteresis is set by the R6/R7 divider. As the output voltage falls below the regulation range, the LT1676 is turned on. The output voltage rises and, as it climbs above the regulation range, the LT1676 is turned off. Efficiency is maximized as the LT1676 is only powered up while it is providing heavy output current. Figure 5b shows that efficiency is typically maintained at 75% or better down to a load current of 10mA. Even at a load current of 2mA, efficiency is still a respectable 65% to 75% (depending on VIN ). Resistor divider R1/R2 is still present, but does not directly influence output voltage. It is chosen to ensure that the LT1676 delivers high output current throughout the voltage regulation range. Its presence is also required to maintain proper short-circuit protection. Transistors Q1 and Q2 and resistor R7 form a high VIN, low quiescent current voltage regulator to power U2. Battery Charger Application Figure 6a shows the LT1776 configured as a constant-current/ constant-voltage battery charger. An LT1620 rail-to-rail current sense amplifier (U2) monitors the differential voltage across current sense resistor R4. As this equals and exceeds the voltage across resistor R5 in the R5/R6 divider, the LT1620 responds by sinking current at its IOUT pin. This is connected to the VC control node of the LT1776 and therefore acts to reduce the amount of power delivered to the load. The overall constantcurrent/constant-voltage behavior can be seen in Figure 6b. Target voltage and current limits are independently programmable. The output voltage of 7.2V, which corresponds to the charging voltage of a 3-cell lead-acid battery, is set by the R1/R2 divider and the internal referLinear Technology Magazine • November 1998 DESIGN FEATURES VIN 10V–28V + C1 15µF 35V exact calculation includes the input voltage. For this and further details of this topology, see Linear Technology Design Note 100. 5 VIN 1 C7 100pF VCC SHDN LT1776 VSW FB 6 VC SYNC 2 L1* 100µH 3 7 8 D1 MBR1100 C6 100pF C2 100µF 10V VOUT 5V† + Positive-to-Negative Converter R1 36.5k 1% GND 4 C1: AVX D CASE TPSD156M035R0300 (803) 946-0362 C2, C3, C4: AVX D CASE TPSD107M010R0080 C6, C7: X7R OR COG/NPO D1, D2: MOTOROLA MBRS1100 100V, 1A, SMD SCHOTTKY (800) 441-2447 *L1: COILTRONICS CTX100-3 SINGLE CORE WITH 2 WINDINGS (561) 241-7876 R2 12.1k 1% C3 100µF 10V VOUT –5V† D2 MBR1100 L1* 100µH + R3 22k 5% + C5 2200pF X7R C4 100µF 10V †TOTAL AVAILABLE CURRENT IS LIMITED TO 500mA (SEE TEXT) Figure 7. Dual-output SEPIC converter ence of the LT1776. Output current, presently 200mA, is set by current sense resistor R4 and the R5/R6 divider. (A 16-pin version of the LT1620 that implements end-of-cycle detection is also available. This is useful for implementing lead-acid battery “topoff” charger behavior or the like. See the LT1620 data sheet for further information.) The circuit as shown accommodates an input voltage range of 11V to 30V. The upper input voltage limit of 30V is determined not by the LT1776, but by the LT1121-5 regulator (U3). (A regulated 5V is required by the LT1620.) This regulator was chosen for its micropower behavior, which helps maintain good overall efficiency. However, the basic catalog part is only rated to 30V. Substitution of the industry standard LM317, for example, extends the allowable input voltage to 40V (or more with the HV version), but its greater quiescent current drain degrades efficiency from that shown. Dual Output SEPIC Converter All of the previous applications provide a single positive output voltage. Real world situations often require dual supply voltages. The SEPIC topology (single-ended primary inductance converter) offers a cost-effective way to simultaneously generate a negative voltage with a single piece of Linear Technology Magazine • November 1998 magnetics. The circuit in Figure 7 uses an LT1776 to generate both positive and negative 5V. The two inductors shown are actually just two windings on a standard Coiltronics inductor. Capacitor C3 creates the SEPIC topology, which improves regulation and reduces ripple current in L1. For the best negative supply voltage regulation, this output should have a preload of at least 1% of the maximum positive load. Total available current from both outputs is limited to 500mA. Maximum negative supply current is limited by the positive 5V load. A typical limit is one-half of the positive current, but a more VIN 10V–28V + The previous example used a dual inductor to create a pair of output voltages, one positive and the other negative. The positive-to-negative converter topology illustrated in Figure 8 generates a single negative output voltage from a positive input voltage, using just an ordinary inductor. The topology is somewhat similar to the original step-down arrangement, but the inductor is grounded and the LT1776 ground is now referred to the negative output voltage. Note that the integrated circuit must now be rated for the worst case sum of the input voltage plus the absolute value of the output voltage. The relatively high input voltage rating of the LT1676/ LT1776 parts along with their good efficiency under such conditions make them an excellent choice for implementing this topology. The circuit as shown converts an input voltage in the range of 10V to 28V to a –5V output. Available output current is 300mA at the worst case VIN of 10V. The user should exercise caution in modifying this circuit for other applications. The positive-to-negative topology is not as straightforward as the step-down topology. It is actually more like a flyback topology, in that current is delivered to the output in continued on page 20 C1 15µF 35V 5 VIN 1 C5 100pF VCC SHDN LT1776 6 VSW FB VC SYNC 2 3 L1 100µH 7 8 R1 36.5k 1% GND 4 R3 22k 5% C3 2200pF X7R C4 100pF D1 MBRS1100 C1: AVX D CASE TPSD156M035R0300 (803) 946-0362 C2: AVX D CASE TPSD107M010R0080 C4, C5: X7R OR COG/NPO D1: MOTOROLA MBRS1100 100V, 1A, SMD SCHOTTKY (800) 441-2447 L1: COILCRAFT D03316-104 (847) 639-6400 R2 12.1k 1% + C2 100µF 10V VOUT –5V 0mA–300mA Figure 8. Positive-to-negative converter 9 DESIGN FEATURES 100 TOTAL NOISE VOLTAGE (nV/√Hz) bandwidth, slew rate and settling time. The LT1468 uses a single stage topology to obtain excellent AC specifications with high bandwidth and state-of-the-art 16-bit settling. The demands of precision dictate a fully balanced design and painstaking care in the die layout. The AC performance is ultimately limited, however, by the need for high gain and low input bias current. High gain requires bootstrapping the current mirror in the signal path, which degrades phase margin at high frequency. For this reason the mirror is compensated to lower the unity-gain frequency of the amplifier, which reduces bandwidth at low closed-loop gains. To obtain low input bias current, the choice of operating currents is limited by the accuracy of the input bias current cancellation circuitry. With trimming, up to a 50× reduction VS = ±15V TA = 25°C f = 10kHz TOTAL NOISE 10 RESISTOR NOISE ONLY 1 RS + – 0.1 100 1k 10k SOURCE RESISTANCE, RS (Ω) 100k 1468_05.eps Figure 5. Total noise vs unmatched source resistance increase in noise is due to the resistor (Figure 5). It should be noted that the input bias current cancellation current is not bootstrapped to the input stage to provide constant IB vs input common mode voltage. The reason is simple: this circuitry runs at submicroamp current levels and has no chance of settling if it is allowed to move with the inputs. The IB is optimized for inverting configurations with a constant input voltage and provides excellent settling. Conclusion in IB can be achieved. This constraint sets the maximum value of current source I1, which also places limits on bandwidth, slew rate, noise voltage and noise current. The LT1468 total noise is best with source resistance in the 1kΩ to 20kΩ region, where any The LT1468 has an unequaled blend of speed and precision that is ideal for 16-bit applications. Its unique virtues also provide outstanding performance in low distortion active filters and precision instrumentation. Authors can be contacted at (408) 432-1900 LT1676/LT1776, continued from page 9 discrete pulses. The output capacitor must supply the entire load current for at least a portion of the switching cycle, so output capacitor ripple current rating and ESR may be an issue. Maximum available output current will usually be a strong function of input voltage. Supporting low VIN-toVOUT ratios may require additional components for maintaining control- loop stability. A detailed theoretical analysis of this topology and its behavior can be found in Linear Technology Application Note 44. Conclusion The LT1676 and LT1776 provide excellent efficiency in high input voltage/ low output voltage switching regulator applications. This LT1776’s 8-pin SO package and 200kHz switching rate are especially useful in implementing compact power supply solutions. These devices’ innate ability to avoid pulse skipping under light loads, plus the optional sync function, aid in controlling the frequency spectrum of switching-generated noise. LT1675, continued from page 17 Performance Conclusion By taking full advantage of LTC’s new complementary high speed bipolar process, the LT1675 RGB multiplexer dramatically raises the level of per- 10 CROSSTALK REJECTION (dB) Table 1 summarizes the major perfor mance specifications of the LT1675; Figure 8 shows a graph of crosstalk. 20 0 –10 RS = 75Ω RL = 150Ω GREEN 1 DRIVEN RED 1 SELECTED –20 –30 –40 –50 –60 –70 –80 100k 1M 10M 100M FREQUENCY (Hz) 1G formance while saving PC board space. A channel-to-channel toggle rate of 100MHz makes the LT1675 perfect for pixel switching and the simple expansion feature using the ENABLE pin is ideal for RGB routing. A fixed gain of two for driving double terminated cables simplifies PC board layout and boosts performance. These high per formance multiplexers complement the large number of video products offered by LTC. 1418_02a.EPS Figure 8. LT1675 crosstalk rejection vs frequency 20 Linear Technology Magazine • November 1998