A pp l ic a t i o n N o t e , V 2 . 3, D e c . 2 0 0 1 AP32058 OCDS L2 Trace Port Connector TriCore Based Boards AI ICore N e v e r s t o p t h i n k i n g . OCDS L2 Trace Port Connector Revision History: 2001-12 Previous Version: Page V2.3 V2.2 Subjects (major changes since last revision) Major changes and corrections to the technical content and document layout and design. Adapted to reflect current signal naming conventions. Table footnotes added. V2.1 & V2.2 were intermediate versions. Controller Area Network (CAN): License of Robert Bosch GmbH We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Edition 2001-12 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2006. All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. AP32058 OCDS L2 Trace Port Connector Introduction 1 Introduction This document describes the Infineon Technologies OCDS Level 2 TriCore trace-port connector. This connector is specified for TriCore derivatives running with frequencies up to 80 MHz maximum. For frequencies beyond 80 MHz use the OCDS L1/L2 & Nexus High-Speed Connector (see Application Note AP32060). In every case you should check with your Emulation Tool supplier the availability of the appropriate Trace Adapter for connecting your Target system. 2 The Connector Layout 2.1 Slow and Fast Signals, Shielding The trace hardware must buffer all signals just after the connector, so the connector itself does not need to be highly shielded. 2.2 Mechanical The following OCDS Level 2 connector should be used. The advantage of this connector is that it has more stability in the narrow direction. "AMP System 50 Board Mounted Connectors" (AMPMODU) 40 pins. Part number: 104549-6. Pin 1 (View from Top) Figure 1 An AMPMODU Connector Application Note 3 V2.3, 2001-12 AP32058 OCDS L2 Trace Port Connector The Connector Layout Table 1 Pin Number Orientation 2 4 6 8 ... 36 38 40 1 3 5 7 ... 35 37 39 Figure 2 The Board Layout For This Connector. Table 2 Connector Properties Item Size in [inch] Size in [mm] Dim. A 1.130 28.70 Dim. B 0.950 24.13 Dim. C 0.400 10.16 Dim. D 0.400 10.16 Application Note 4 V2.3, 2001-12 AP32058 OCDS L2 Trace Port Connector The Connector Layout 2.3 Signal Description Following are the Infineon Technologies JTAG connector signals. Directions are given as follows: O I = output from the CPU processor board to the debugger = input to the CPU processor board from the debugger Table 3 Signal Descriptions Signal Name Dir Pin CPU_CLOCK O 1 CPU_CLOCK output 2 Ground 3 Reserved for future extension GND Comment EMUSTAT0 O 4 Pipeline status information EMUSTAT1 O 5 Pipeline status information EMUSTAT2 O 6 Pipeline status information EMUSTAT3 O 7 Pipeline status information EMUSTAT4 O 8 Pipeline status information 9 Reserved for future extension 10 Reserved for future extension 11 Reserved for future extension 12 Ground 13 Reserved for future extension GND IND PC0 O 14 Indirect PC bus IND PC1 O 15 Indirect PC bus IND PC2 O 16 Indirect PC bus IND PC3 O 17 Indirect PC bus IND PC4 O 18 Indirect PC bus IND PC5 O 19 Indirect PC bus IND PC6 O 20 Indirect PC bus IND PC7 O 21 Indirect PC bus 22 Reserved for future extension 23 Reserved for future extension 24 Reserved for future extension 25 Reserved for future extension Application Note 5 V2.3, 2001-12 AP32058 OCDS L2 Trace Port Connector The Connector Layout Table 3 Signal Descriptions (cont’d) Signal Name Dir GND Pin Comment 26 Ground 27 Reserved for future extension EMUBREAK0 O 28 Breakpoint qualification information EMUBREAK1 O 29 Breakpoint qualification information EMUBREAK2 O 30 Breakpoint qualification information BRKOUT O 31 OCDS Break Out Signal BRKIN I 32 OCDS Break In Signal PCP_BRK_OUT1) O 33 PCP Break Out Signal 34 Reserved for future extension 35 Reserved for future extension 36 I/O Ring voltage of CPU 37 Reserved for future extension 38 Reserved for future extension 39 Reserved for future extension 40 Ground VDD GND 1) This signal is not available on every TriCore Implementation. If the Microcontroller derivative has no corresponding signal, it should be left unconnected in the target hardware. 2.4 Voltage All Signals have the voltage of the I/O ring. Current Microcontroller implementations have 5 V, 3.3 V or 2.5 V VDD on I/O ring. The VDD I/O ring should be provided from the target based board to the active buffers at the cable level (if present). Application Note 6 V2.3, 2001-12 Infineon goes for Business Excellence “Business excellence means intelligent approaches and clearly defined processes, which are both constantly under review and ultimately lead to good operating results. Better operating results and business excellence mean less idleness and wastefulness for all of us, more professional success, more accurate information, a better overview and, thereby, less frustration and more satisfaction.” Dr. Ulrich Schumacher h t t p : / /w w w. i n f i n e o n . c o m P u b l i s h e d b y I n f i n e o n T e c h n o l o g i e s AG