IDT74LVCR16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O IDT74LVCR16952A DESCRIPTION: FEATURES: This 16-bit registered transceiver is built using advanced dual metal CMOS technology. This high-speed, low power device is organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. For example, the A-to-B Enable (CEAB) must be LOW to enter data from the A port. CLKAB controls the clocking function. When CLKAB toggles from LOWto-HIGH, the data present on the A port will be clocked into the register. OEAB performs the output enable function on the B port. Data flow from the B port to A port is similar but requires using CEBA, CLKBA, and OEBA inputs. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCR162952A has series resistors in the device output structure which will significantly reduce line noise when used with light loads.This driver has been developed to drive ±12mA at the designated threshold levels. • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range µ W typ. static) • CMOS power levels (0.4µ • All inputs, outputs, and I/O are 5V tolerant • Supports hot insertion • Available in TSSOP package DRIVE FEATURES: • Balanced Output Drivers: ±12mA • Low switching noise APPLICATIONS: • 5V and 3.3V mixed voltage systems • Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM 54 1CEBA 1CLKBA 2CEBA 55 2CLKBA 1CLKAB 1OEBA 1A1 30 28 1 2OEAB 1OEAB 1CEAB 31 3 2CEAB 2 2CLKAB 56 2OEBA C CE D 5 52 1B1 2A1 26 27 29 15 C CE D 42 C CE D C CE D TO SEVEN OTHER CHANNELS TO SEVEN OTHER CHANNELS 2B1 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JANUARY 2004 1 © 2004 Integrated Device Technology, Inc. DSC-4484/2 IDT74LVCR16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol Max Unit VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V 1 OEAB 1 56 1 OEBA TSTG Storage Temperature –65 to +150 °C 1CLKAB 2 55 1 CLKBA IOUT DC Output Current –50 to +50 mA 1 CEAB 3 54 1 CEBA mA GND 53 Continuous Clamp Current, VI < 0 or VO < 0 –50 4 IIK IOK 5 Continuous Current through each VCC or GND mA 1B1 ICC ISS ±100 52 1A1 6 GND 51 1B2 VCC 7 50 VCC 1A3 8 49 1B3 1A4 9 48 1B4 1A5 10 47 1B5 11 46 GND 1A6 12 45 1B6 1A7 13 44 1B7 1A8 14 43 1B8 15 42 16 41 1A2 GND 2A1 2A2 NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PIN DESCRIPTION Pin Names 2B1 Description xOEAB A-to-B Output Enable Inputs (Active LOW) xOEBA B-to-A Output Enable Inputs (Active LOW) 2B3 xCEAB A-to-B Clock Enable Inputs (Active LOW) GND xCEBA B-to-A Clock Enable Inputs (Active LOW) 2B4 2B2 17 40 18 39 19 38 xCLKAB A-to-B Clock Inputs 2A5 20 37 2B5 xCLKBA B-to-A Clock Inputs 2A6 21 36 2B6 xAx A-to-B Data Inputs or B-to-A 3-State Outputs VCC 22 35 xBx B-to-A Data Inputs or A-to-B 3-State Outputs 23 34 2B7 2A8 24 33 2B8 GND 25 32 GND 2CEAB 26 31 2CEBA 2CLKAB 27 30 2CLKBA 2 OEAB 28 29 2OEBA 2A3 GND 2A4 2A7 VCC FUNCTION TABLE(1,2) Inputs TSSOP TOP VIEW CAPACITANCE (TA = +25°C, F = 1.0MHz) Symbol Description Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF COUT Output Capacitance VOUT = 0V 6.5 8 pF CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF Outputs xCEAB xCLKAB xOEAB xAx xBx H X L X B(3) X L L X B(3) L ↑ L L L L ↑ L H H X X H X Z NOTES: 1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA, and xOEBA. 2. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance ↑ = LOW-to-HIGH Transition 3. Output level of B before the indicated steady-state input conditions were established. NOTE: 1. As applicable to the device type. 2 IDT74LVCR16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V Input Leakage Current VCC = 3.6V VI = 0 to 5.5V — — ±5 µA IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V — — ±10 µA IOZL (3-State Output pins) IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 5.5V — — ±50 µA VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V VH ICCL ICCH ICCZ ∆ICC Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 — — 10 mV µA 3.6 ≤ VIN ≤ 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND — — — — 10 500 µA IIH IIL Quiescent Power Supply Current Variation NOTES: 1. Typical values are at VCC = 3.3V, +25°C ambient. 2. This applies in the disabled state only. OUTPUT DRIVE CHARACTERISTICS Symbol VOH Test Conditions(1) Parameter Output HIGH Voltage Unit V IOH = – 0.1mA VCC – 0.2 — VCC = 2.3V IOH = – 4mA 1.9 — IOH = – 6mA 1.7 — IOH = – 4mA 2.2 — IOH = – 8mA 2 — VCC = 3V Output LOW Voltage Max. VCC = 2.3V to 3.6V VCC = 2.7V VOL Min. IOH = – 6mA 2.4 — IOH = – 12mA 2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 4mA — 0.4 IOL = 6mA — 0.55 IOL = 4mA — 0.4 IOL = 8mA — 0.6 IOL = 6mA — 0.55 IOL = 12mA — 0.8 VCC = 2.7V VCC = 3V V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. 3 IDT74LVCR16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance per Transceiver Outputs enabled CPD Power Dissipation Capacitance per Transceiver Outputs disabled Test Conditions Typical CL = 0pF, f = 10Mhz Unit pF SWITCHING CHARACTERISTICS(1) VCC = 2.7V Symbol tPLH Parameter Propagation Delay VCC = 3.3V ± 0.3V Min. 2 Max. 7.6 Min. 2 Max. 6.6 Unit ns 1.5 8 1.5 7 ns 1.5 7.5 1.5 6.5 ns 2.5 — 2.5 — ns 1.5 — 1.5 — ns 1.8 — 1.4 — ns 2 — 2 — ns Pulse Width HIGH or LOW, xCLKAB or xCLKBA 3 — 3 — ns Output Skew(2) — — — 500 ps tPHL xCLKAB, xCLKBA to xBx, xAx tPZH Output Enable Time tPZL xOEBA, xOEAB to xAx, xBx tPHZ Output Disable Time tPLZ xOEBA, xOEAB to xAx, xBx tSU Set-up Time, HIGH or LOW xAx, xBx before xCLKAB↑, xCLKBA↑ tH Hold Time, HIGH or LOW xAx, xBx after xCLKAB↑, xCLKBA↑ tSU Set-up Time, HIGH or LOW xCEAB, xCEBA before xCLKAB↑, xCLKBA↑ tH Hold Time, HIGH or LOW xCEAB, xCEBA after xCLKAB↑, xCLKBA↑ tW tSK(o) NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 4 IDT74LVCR16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VLOAD 6 VCC(2)= 2.5V±0.2V Unit 2 x Vcc V 6 VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF VIH VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION tPLH tPHL tPLH tPHL OUTPUT VIH VT 0V OPPOSITE PHASE INPUT TRANSITION LVC Link Propagation Delay 500Ω Pulse (1, 2) Generator tPZL GND VOUT OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH D.U.T. 500Ω RT CL Test Circuit for All Outputs VIH VT 0V CONTROL INPUT Open VIN DISABLE ENABLE VLOAD VCC tPLZ VLOAD/2 VT VLOAD/2 VLZ VOL tPHZ VOH VHZ 0V VT 0V LVC Link LVC Link DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns. DATA INPUT SWITCH POSITION Switch Open Drain Disable Low Enable Low VLOAD ASYNCHRONOUS CONTROL Disable High Enable High GND SYNCHRONOUS CONTROL All Other Tests Open OUTPUT 1 tSK (x) tSK (x) tPLH2 tH Set-up, Hold, and Release Times VOH VT VOL VT tW HIGH-LOW-HIGH PULSE VT LVC Link tPHL2 Pulse Width tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 Output Skew - tSK(X) tSU LOW-HIGH-LOW PULSE VOH VT VOL OUTPUT 2 tREM LVC Link VIH VT 0V tPHL1 tPLH1 tH TIMING INPUT Test INPUT tSU VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V LVC Link NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74LVCR16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION X LVC IDT XX Bus-Hold Temp. Range XX Family XX XXXX Device Type Package PA Thin Shrink Small Outline Package 952A 16-Bit Registered Transceiver with 3-State Outputs R16 Double-Density, ±12mA Blank No Bus-hold 74 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 -40°C to +85°C for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 6 for Tech Support: [email protected] (408) 654-6459