EVB8742 Evaluation Board Schematic, PDF - EVB8742 Evaluation Board Schematic, PDF

5
4
3
2
1
LAN8742 RMII PHY Customer Evaluation Board
Assy 6696
D
D
PCB Revision A
Schematic Revision 1.1
Design Details
Board:
Assy 6696
Chip:
SMSC LAN8742
C
Circuit Diagrams utilizing SMSC Products Are
Included As A Means Of Illustrating Typical
Semiconductor Applications: Consequently
Complete Information Sufficient For Construction
Purposes Is Not Necessarily Given. The Information
Has Been Carefully Checked And Is Believed To Be
Entirely Reliable. However, No Responsibility Is
Assumed For Inaccuracies. Furthermore, Such
Information Does Not Convey To The Purchaser Of
The Semiconductor Devices Described Any License
Under The Patent Rights Of SMSC Or Others. SMSC
Reserves The Right To Make Changes At Any Time In
Order To Improve Design And Supply The Best
Product Possible.
Board Form Factor:
MII
Assembly:
24 Lead QFN w/ Exposed GND Pad
Revision History
ITEM
BLOCK DIAGRAM
Rev 1.0:
Initial release
C
Page(s)
Title Page
LAN8742 / RMII / Magnetics
1
Configuration Settings
3
2
Rev 1.1:
Page 2: Added R40 & R41 in rework
R20 changed to 0 Ohm
B
B
A
A
Title
LAN8742 RMII PHY Customer Evaluation Board
Size
Assembly No.
Engineer
J.M.
Date:
5
4
3
2
6696
Wednesday, August 29, 2012
1
PCB Rev
Schematic Rev
A
Sheet
1.1
1
of
3
5
4
3
2
1
LAN8742 / Magnetics / RMII Connector
VDDCR Decoupling Capacitors
+5V
AVDD
+3.3V
AVDD_ETH
TP7
Test Point - White
1
VR1
1
TP2
C1
1.0uF
16V
10%
Test Point - Red
+5V
D
1
TP8
Test Point - Yellow
VDDCR
FB1
OUT
5
2
GND
3
ON/OFF BYPS
4
Vin
R18
2.0A/0.050 DCR
0
TP3
TP1
Test Point - Green
VDDCR
DNP
Test Point - Orange
+3.3V
LP2992IM5-3.3
SOT23-5
C4
0.01uF
50V
10%
+5V
C2
4.7uF
6.3V
10%
C18
0.1uF
16V
10%
TP5
RMII +5V decoupling capacitors to
be placed near RMII connector
C5
0.1uF
16V
10%
R12
0
C6
0.1uF
16V
10%
C3
4.7uF
6.3V
10%
C19
470pF
50V
5%
C20
1.0uF
16V
10%
D
C21
4.7uF
6.3V
10%
DNP
Note:
C19& C20 decoupling
capacitors for VDDCR
should be placed as
close to LAN8742
as possible.
C21 is for internal use
only.
Test Point - Purple
VDDIO
+
C16
0.1uF
16V
10%
Note:
Place 0 Ohm resistor close
to magnetics module .
C17
10uF
25V
10%
-
VDDIO
VDDCR
R13
49.9
1/10W
1%
R14
49.9
1/10W
1%
R15
49.9
1/10W
1%
R16
49.9
1/10W
1%
R17
0
Place 49.9 Ohm resistors
close to LAN8742.
LED1_CATHODE
LED1_ANODE
TXEN
TXD0
TXD1
R_CRS
R10
100
14
10
16
17
18
CRS_DV/MODE2
11
nRST
15
6
9
A
C
nINT/REFCLKO
RXER/PHYAD0
TXN
2
TD-
2
TXEN
TXD0
TXD1
LED1 (Green) = LINK/ACT
U1
LAN8742
RXP
23
RXN
22
CRS_DV/MODE2
DNP
5173278-2
20
RXD1/MODE1
RXD0/MODE0
LED1/nINT/nPME/REGOFF
LED2/nINT/nPME/nINTSEL
RCV
RXP
3
RXN
3
2
LED1/nINT/nPME/REGOFF
LED2/nINT/nPME/nINTSEL
24
RBIAS
C8
0.022uF
50V
10%
XTAL1/CLKIN
4
XTAL2
RBIAS
C9
10pF
50V
5%
DNP
R22
12.1K
1/10W
1%
25
5
XTAL2
75
5
RXCT
6
RD-
C10
10pF
50V
5%
DNP
C11
10pF
50V
5%
DNP
6
1000 pF
NC
8
CHS GND
C12
10pF
50V
5%
DNP
C
3
75
7&8
7
nRST
XTAL1/CLKIN
LED2 (Yellow) = SPEED
RD+
2 kV
YEL
A
TXCLK
TXEN
TXD0
TXD1
nINT/REFCLKO
RXER/PHYAD0
TXN
1
75
12
100
7
8
4&5
75
C
R7
RXD1/MODE1
RXD0/MODE0
TXCT
11
100
100
100
TD+
4
MTG
R3
R4
R5
TXP
MDIO
MDC
MTG
R_RXD1
R_RXD0
R_RXDV
R_RXCLK
R_RXER
12
13
16
MDIO
MDC
MDIO
MDC
RJ45
1
15
+5V
MDIO
MDC
RXD3
RXD2
RXD1
RXD0
RX_DV
RX_CLK
RX_ER
TX_ER
TX_CLK
TX_EN
TXD0
TXD1
TXD2
TXD3
COL
CRS
+5V
TXP
GND
HEADER_2x10
RMII Signal Test
Point Header
+5V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V
21
GND
MDIO
R_RXD0
R_RXCLK
TXCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
14
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GRN
XMIT
13
2
4
6
8
10
12
14
16
18
20
VDD2A
VDD1A
nRST
MDC
R_RXD1
R_RXER
nINT
TXEN
TXD0
TXD1
R_CRS
P1
GND_EP
C
1
3
5
7
9
11
13
15
17
19
VDDIO
J1
10
T1
Pulse J0011D01BNL
VDDCR
+5V
1
19
VDDIO
C7
0.1uF
16V
10%
9
+3.3V
R11
1.50K
1/10W
1%
LED2_ANODE
LED2_CATHODE
Reset Generator
Note:
Capacitors C9 through C12 are optional for EMI purposes
and are not populated on the LAN8742 evaluation board.
These capacitors are required for operation in an EMI
constrained environment.
VDDIO
+3.3V
R44
4.75K
1%
U4
VTH = 2.63V
Treset = 20 mS
R51
4
VCC
3
MR
RESET
nRST
2
VDDIO
10.0K
B
SPST_MOM
1
C15
0.1uF
10V
10%
nINT
50MHz TX Clock Signal Input
(if provided on TXCLK by RMII MAC)
GND
S1
B
R25
4.75K
TXCLK
MIC6315-26D2UY
SOT-143_BIG1
TXCLK
0
R49
XTAL1/CLKIN
nINT
RMII Clock Source Selection Jumpers
REGOFF & INTSEL Configuration Resistors
PHY Address / nINT Strap / Mode Select Resistors
VDDIO
REGOFF
CLKIN
JP1
R45
1
2
3
XTAL1
PHYADD0
LED1/nINT/nPME/REGOFF 1
2
EXTCLK50
3
0
1
R40
330
2
1/10W
1%
R46
R_RXCLK
1
2
3
nINT/REFCLKO
XTAL2
U2
50.000MHz
SMD_3p2x2p5mm_OSC
1 Stby VCC 4
R20
0
GND
OUT
C22
0.1uF
10V
10%
1
R53
210
2
1/10W
1%
Test Point - Black
GND
R30
4.75K
1/10W
1%
MTG2
1
NC
CRS_DV/MODE2
JP3
LED2/nINT/nPME/nINTSEL 1
1
3
25.000MHz
HC49US
C13
30pF
50V
5%
3 Plated Hole w_GND
3 Plated Hole w_GND
RXER/PHYAD0
1
R41
330
2
1/10W
1%
LED2_ANODE
R39
4.75K
1/10W
JP4
1
C14
30pF
50V
5%
LED2/nINT/nPME/nINTSEL 3
2
LED2_CATHODE
R37
4.75K
1/10W
1%
R33
4.75K
1/10W
1%
DNP
R32
4.75K
1/10W
1%
DNP
R31
4.75K
1/10W
1%
DNP
Title
LAN8742 / Magnetics / (R)MII Connector
Size
Assembly No.
Engineer
J.M.
Date:
5
NC
RXD0/MODE0
A
Y1
R52
121
1/10W
1%
R29
4.75K
1/10W
1%
RXD1/MODE1
2
CLK50
Note:
R40 and R41 added in rework
nINTSEL
2
3
R28
4.75K
1/10W
1%
AVDD
3
2
TP4
MTG1
Default Jumper Settings: 1--2
1
R48
4.75K
R24
4.75K
1/10W
1%
DNP
2
A
0
1
DNP
Note:
U3 must be depopulated when
sourcing a 50MHz external (offboard)
clock via the R_RXCLK pin.
R23
1.00M
EXTCLK50
0
R47
4.75K
DNP
R21
MODE0
LED1_CATHODE
2
LED1/nINT/nPME/REGOFF 3
MODE1
1210
R38
4.75K
1/10W
1
REFCLKO
MODE2
LED1_ANODE
JP2
3-Pad Resistor Default Population Settings: 1--2
VDDIO
nINT/REFCLKO
DNP
AVDD
XTAL1/CLKIN
0
R50
DNP
4
3
2
6696
Wednesday, August 29, 2012
1
PCB Rev
Schematic Rev
A
Sheet
1.1
2
of
3