FUJITSU SEMICONDUCTOR
DATA SHEET
DS705-00010-2v0-E
32-bit Microcontroller
FR Family FR81S
MB91590 Series
MB91F591B/F591BS/F591BH/F591BHS/F592B/F592BS/F592BH/F592BHS
MB91F594B/F594BS/F594BH/F594BHS/F596B*/F596BS*/F596BH*/F596BHS*
MB91F597B*/F597BS*/F597BH*/F597BHS*/F599B*/F599BS*/F599BH*/F599BHS*
*:Under consideration
OVERVIEW
This series is Fujitsu 32-bit microcontroller designed for automotive and industrial control applications. It
contains the FR81S CPU that is compatible with the FR family. The FR81S has a high level performance
among the Fujitsu FR family by enhancing CPU instruction pipeline and load store processing, and
improving internal bus transfer.
It is best suited for application control for automotive.
Note: FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Semiconductor
Limited.
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2012.1
FUJITSU SEMICONDUCTOR CONFIDENTIAL
r2.0
MB91590 Series
FEATURES
FR81S CPU Core
· 32-bit RISC, load/store architecture, pipeline 5-stage structure
· Maximum operating frequency: 128 MHz (Source oscillation = 4.0 MHz and 32 multiplied (PLL clock
multiplication system))
· General-purpose register : 32 bits ×16 sets
· 16-bit fixed length instructions (basic instruction), 1 instruction per cycle
· Instructions appropriate to embedded applications
· Memory-to-memory transfer instruction
· Bit processing instruction
· Barrel shift instruction etc.
· High-level language support instructions
· Function entry/exit instructions
· Register content multi-load and store instructions
· Bit search instructions
· Logical 1 detection, 0 detection, and change-point detection
· Branch instructions with delay slot
· Reduced overhead during branch process
· Register interlock function
· Easy assembler writing
· The support at the built-in / instruction level of the multiplier
· Signed 32-bit multiplication : 5 cycles
· Signed 16-bit multiplication : 3 cycles
· Interrupt (PC/PS saving)
· 6 cycles (16 priority levels)
· The Harvard architecture allows simultaneous execution of program and data access.
· Instruction compatibility with the FR Family
· Built-in memory protection function (MPU)
· Eight protection areas can be specified commonly for instructions and the data.
· Control access privilege in both privilege mode and user mode.
· Built-in FPU (floating point arithmetic)
· IEEE754 compliant
· Floating-point register 32-bit × 16 sets
Peripheral functions
· Clock generation (equipped with SSCG function)
· Main oscillation (4MHz)
· Sub oscillation (32KHz) or none sub oscillation
· PLL multiplication rate : 1 to 32 times
· Built-in Program flash memory capacity 1024 + 64KB
· Built-in Data flash memory capacity(WorkFlash) 64KB
· Built-in RAM capacity
· Main RAM
64KB
· Backup RAM 8KB
· General-purpose ports (5V Pin) : 63 (dual clock products : 61)
· Included I2C pseudo open drain support ports : 4
· General-purpose ports (3V Pin) : 93
· Included 48 combined external bus interface (For GDC external memory I/F)
· External bus interface
· GDC external memory for I/F use
· 25-bit address, 16-bit data
· Power supply voltage fixed to 3.3V
· DMA Controller
· Up to 16 channels can be started simultaneously.
· 2 transfer factors (Internal peripheral request and software)
2
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
· A/D converter (successive approximation type)
· 8/10-bit resolution : 32 channels
· Conversion time : 3μs
· External interrupt input: 16 channels
· Level ("H" / "L"), or edge detection (rising or falling) enabled
· LIN-UART
· 6 channels, ch.2 to ch.7
· UART, synchronous mode, LIN-UART mode is selectable.
· LIN protocol Revision 2.1 is supported
· SPI (Serial Peripheral Interface) supported (synchronous mode)
· Full-duplex double buffering system
· LIN synch break detection (linked to the input capture)
· Built-in dedicated baud rate generator
· DMA transfer support
· Multi-function serial communication (built-in transmission/reception FIFO memory) : 2 channels
< UART (Asynchronous serial interface) >
· Full-duplex double buffering system, 16-byte transmission FIFO memory, 16-byte reception FIFO
memory
· Parity or no parity is selectable.
· Built-in dedicated baud rate generator
· An external clock can be used as the transfer clock
· Parity, frame, and overrun error detect functions provided
· DMA transfer support
<CSIO (Synchronous serial interface) >
· Full-duplex double buffering system, 16-byte transmission FIFO memory, 16-byte reception FIFO
memory
· SPI supported; master and slave systems supported; 5 to 9-bit data length can be set.
· Built-in dedicated baud rate generator (Master operation)
· An external clock can be entered. (Slave operation)
· Overrun error detect function is provided
· DMA transfer support
<LIN-UART (Asynchronous Serial Interface for LIN) >
· Full-duplex double buffering system, 16-byte transmission FIFO memory, 16-byte reception FIFO
memory
· LIN protocol Revision 2.1 supported
· Master and slave systems supported
· Framing error and overrun error detection
· LIN synch break generation and detection; LIN synch delimiter generation
· Built-in dedicated baud rate generator
· An external clock can be adjusted by the reload counter
· DMA transfer support
< I2C >
· Full-duplex double buffering system, 16-byte transmission FIFO memory, 16-byte reception FIFO
memory
· Standard mode (Max. 100kbps) / high-speed mode (Max. 400kbps) supported
· DMA transfer supported (for transmission only)
· CAN Controller (C-CAN) : 3 channels
· Transfer speed : Up to 1Mbps
· 64-transmission/reception message buffering : 1 channel,
32-transmission/reception message buffering : 2 channels
· PPG : 16-bit × 24 channels
· Reload timer : 16-bit × 4 channels
· Free-run timer : 32-bit × 2 channels (Can select each channel for input capture, output compare)
32-bit × 2 channels (LSYN (LIN synch field detection) for exclusive input capture)
· Input capture : 32-bit × 6 channels (linked to the free-run timer) LSYN (LIN synch field detected)
Exclusive 32-bit × 2 channels (linked to the free-run timer)
· Output compare : 32-bit × 4 channels (linked to the free-run timer)
· Sound generator : 5 channels
· Frequency and amplitude sequencers provided
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
3
MB91590 Series
· Stepping motor controller : 6 channels
· 8/10-bit PWM
· High current output supported (4 lines × 6 channels)
· Can refer back electromotive force using pin-shared A/D converter
· Real-time clock (RTC) (for day, hours, minutes, seconds)
· Main/sub oscillation frequency can be selected for the operation clock (dual product only)
· Calibration: The hardware watchdog for CR oscillation drive and real-time clock (RTC) for sub clock
drive (dual product only)
· The CR oscillation frequency can be trimmed
· The main clock to sub clock (dual product only) ratio can be corrected by setting the real-time clock
prescaler
· Clock Supervisor
· Monitoring abnormality (damage of crystal etc.) of sub oscillation (32KHz) (two system clock kinds)
of the outside and main oscillation (4 MHz)
· When abnormality is detected, it switches to the CR clock.
· Base timer : 2 channels
· 16-bit timer
· Any of four PWM/PPG/PWC/reload timer functions can be selected and used
· A 32-bit timer can be used in 2 channels of cascade mode
· CRC generation
· Watchdog timer
· Hardware watchdog
· Software watchdog
· NMI
· Interrupt controller
· Interrupt request batch read
· Multiple interrupts from peripherals can be read by a series of registers.
· I/O relocation
· Peripheral function pins can be reassigned.
· Low-power consumption mode
· Sleep / Stop / Watch / Sub RUN mode
· Stop (power shutdown) / Watch (power shutdown) mode
· GDC part self-support power supply
· Power on reset
· Low-voltage detection reset(external low-voltage detection)
· Low-voltage detection reset(internal low-voltage detection)
· GDC
· Internal/memory frequency : 81MHz
· The resolution of the display which can support : 800 × 480 at the maximum
Screen overlay of five simultaneous layers at the maximum (window)
Size of the resolution which can be supported varies depending on color format.
· Analog video input (NTSC)
· Digital video input (RGB666/555)
· YUV input (BT.656)
· Video image expansion/reduction /invert function is supported
· RGB Digital output (6-bit × 3)
· Built-in 2D rendering engine
The line drawing is supported.
The Bitblt function is supported.
Display list operation is supported
8bpp indirect color
ARGB-1555 direct color
Alpha blending, anti-aliasing
4
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
· Built-in Sprite engine
Equipped with automatic display function when booted
Maximum of 512 sprites are supported
32 special sprites capable of automatic animation are supported.
The command list execution is supported.
1bpp, 2bpp, 4bpp, 8bpp indirect color
ARGB-1555, RGB-565, ARGB-8888 direct color
The color format for each sprite can be set.
Horizontal invert, Vertical invert
Alpha blending
· Built-in memory (800KB)
· Device Package : LQFP-208, HQFP-208*
· CMOS 90nm Technology
· Power supplies
· 5V/3.3V Power supply
· The internal 1.2V is generated from 5V/3.3V with the depression circuit.
· I/O of an external bus and GDC, 3.3V power supply used.
· For other I/O, 5V power supply used.
· If 2 power supplies are used, they must turn on in the specified sequence (5V →3.3V) .
*: Under consideration. For detailed information about mount conditions, contact your sales
representative.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
5
MB91590 Series
PRODUCT LINEUP
Product
Item
MB91F591B/S
CPU core
MB91F591BH/S
FR81S
Technology
90nm
Package
LQFP208
Yes (Non-S series)
No (S series)
Sub clock
Maximum CPU operating frequency
80MHz
Maximum GDC operating frequency
81MHz
Built-in CR oscillator
100kHz
System clock
Flash
RAM
On chip PLL
Main
576KB
Sub
64KB
Main
40KB
Backup
8KB
VRAM
260KB
1ch Hardware
1ch Software
Watchdog timer
Clock supervisor
Low-voltage detection reset
(External low-voltage detection)
Low-voltage detection reset
(Internal low-voltage detection)
NMI function
Initial value "ON"
DMA Controller
CAN
USART
A/D converter (8bit/10bit)
Initial value "OFF"
Yes
Yes
Yes
16ch
1ch (64msg)
2ch (32msg)
LINx6
MFSx2
1unit/32ch
Reload timer(16bit)
4ch
Base timer(16bit)
2ch
Free-run timer(32bit)
2ch
Input capture(32bit)
6ch
Output compare(32bit)
4ch
PPG timer(16bit)
24ch
Sound generator
5ch
Real-time clock
Yes
External interrupt
16ch
CR/SUB compensation function
Yes
CRC generation
Yes
Stepping motor control
6ch
6
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Product
Item
MB91F591B/S
Stop mode (including power shut-off)
MB91F591BH/S
Supported
Power supply voltage
MICOM : 4.5V to 5.5V
GDC : 3.0V to 3.6V
Operating temperature
-40°C to +105°C
Allowable power [mW]
1250
Others
On chip debugger
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Flash product
Yes
7
MB91590 Series
Product
MB91F592B/S MB91F592BH/S
Item
CPU core
90nm
Package
LQFP208
Yes (Non-S series)
No (S series)
Sub clock
Maximum CPU operating
frequency
Maximum GDC operating
frequency
Built-in CR oscillator
80MHz
81MHz
100kHz
System clock
RAM
MB91F594BH/S
FR81S
Technology
Flash
MB91F594B/S
On chip PLL
Main
576KB
1088KB
Sub
64KB
Main
40KB
64KB
Backup
8KB
VRAM
800KB
1ch Hardware
1ch Software
Watchdog timer
Clock supervisor
Initial value
"ON"
Low-voltage detection reset
(External low-voltage detection)
Low-voltage detection reset
(Internal low-voltage detection)
NMI function
DMA Controller
CAN
USART
A/D converter (8bit/10bit)
Initial value
"OFF"
Initial value
"ON"
Yes
Yes
Yes
16ch
1ch (64msg)
2ch (32msg)
LINx6
MFSx2
1unit/32ch
Reload timer(16bit)
4ch
Base timer(16bit)
2ch
Free-run timer(32bit)
2ch
Input capture(32bit)
6ch
Output compare(32bit)
4ch
PPG timer(16bit)
24ch
Sound generator
5ch
Real-time clock
Yes
External interrupt
16ch
CR/SUB compensation function
Yes
CRC generation
Yes
Stepping motor control
6ch
8
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Initial value
"OFF"
DS705-00010-2v0-E
MB91590 Series
Product
Item
MB91F592B/S MB91F592BH/S
Stop mode (including power
shut-off)
MB91F594B/S
Supported
Power supply voltage
MICOM:4.5V to 5.5V
GDC:3.0V to 3.6V
Operating temperature
-40°C to +105°C
Allowable power [mW]
1250
Others
On chip debugger
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
MB91F594BH/S
Flash product
Yes
9
MB91590 Series
Product
MB91F596B/S* MB91F596BH/S* MB91F597B/S* MB91F597BH/S*
Item
CPU core
FR81S
Technology
90nm
Package
HQFP208
Yes (Non-S series)
No (S series)
Sub clock
Maximum CPU operating
frequency
Maximum GDC operating
frequency
Built-in CR oscillator
128MHz
81MHz
100kHz
System clock
Flash
RAM
On chip PLL
Main
576KB
Sub
64KB
Main
40KB
Backup
8KB
VRAM
260KB
1ch Hardware
1ch Software
Watchdog timer
Clock supervisor
800KB
Initial value
"ON"
Low-voltage detection reset
(External low-voltage detection)
Low-voltage detection reset
(Internal low-voltage detection)
Initial value "OFF"
Yes
Yes
DMA Controller
16ch
USART
A/D converter (8bit/10bit)
1ch (64msg)
2ch (32msg)
LINx6
MFSx2
1unit/32ch
Reload timer(16bit)
4ch
Base timer(16bit)
2ch
Free-run timer(32bit)
2ch
Input capture(32bit)
6ch
Output compare(32bit)
4ch
PPG timer(16bit)
24ch
Sound generator
5ch
Real-time clock
Yes
External interrupt
CR/SUB compensation
function
CRC generation
16ch
Stepping motor control
6ch
10
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Initial value
"OFF"
Yes
NMI function
CAN
Initial value
"ON"
Yes
Yes
DS705-00010-2v0-E
MB91590 Series
Product
Item
MB91F596B/S* MB91F596BH/S* MB91F597B/S* MB91F597BH/S*
Stop mode (including power
shut-off)
Supported
Power supply voltage
MICOM:4.5V to 5.5V
GDC:3.0V to 3.6V
Operating temperature
-40°C to +105°C
Allowable power [mW]
Others
2500
Flash product
On chip debugger
Yes
*: Under consideration. For detailed information about mount conditions, contact your sales
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
representative.
11
MB91590 Series
Product
Item
MB91F599B/S*
MB91F599BH/S*
CPU core
FR81S
Technology
90nm
Package
HQFP208
Yes (Non-S series)
No (S series)
Sub clock
Maximum CPU operating
frequency
Maximum GDC operating
frequency
Built-in CR oscillator
128MHz
81MHz
100kHz
System clock
Flash
RAM
On chip PLL
Main
1088KB
Sub
64KB
Main
64KB
Sub
8KB
VRAM
800KB
1ch Hardware
1ch Software
Watchdog timer
Clock supervisor
Low-voltage detection reset
(External low-voltage
detection)
Low-voltage detection reset
(Internal low-voltage
detection)
NMI function
Initial value "ON"
DMA Controller
CAN
USART
A/D Converter (8bit/10bit)
Initial value "OFF"
Yes
Yes
Yes
16ch
1ch (64msg)
2ch (32msg)
LINx6
MFSx2
1unit/32ch
Reload timer(16bit)
4ch
Base timer(16bit)
2ch
Free-run timer(32bit)
2ch
Input capture(32bit)
6ch
Output compare(32bit)
4ch
PPG timer(16bit)
24ch
Sound generator
5ch
Real-time clock
Yes
External interrupt
CR/SUB compensation
function
CRC generation
16ch
Stepping motor control
6ch
12
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Yes
Yes
DS705-00010-2v0-E
MB91590 Series
Product
Item
MB91F599B/S*
Stop mode (including power
shut-off)
MB91F599BH/S*
Supported
Power supply voltage
MICOM:4.5V to 5.5V
GDC:3.0V to 3.6V
Operating temperature
-40°C to +105°C
Allowable power [mW]
Others
2500
Flash product
On chip debugger
Yes
*: Under consideration. For detailed information about mount conditions, contact your sales
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
representative.
13
MB91590 Series
PIN ASSIGNMENT
Pin Assignment (single clock product)
PPG0_1
PPG9_1
PPG4_2
PPG3_2
PPG7_2
ICU5_1
ICU4_1
ICU1_1
TOT2
TOT1
TOT0
TIN3
TIN2
TIN1
TIN0
-
PPG6_2
PPG5_2
-
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VSS
AVCC3
AVSS3
VIN
REFOUT
AVR3
AVSS3
AVCC3
PG0
PG3
PG2
PG1
PH3
PC7
PC6
PC5
PC4
PC3
PC2
VCC3
VSS
PB7
PB6
PB5
PB4
PB3
PB2
PA7
PA6
PA5
PA4
PA3
PA2
VCC3
VSS
VCC5
P136
P137
VSS
MD2
P122
P121
P120
P117
P116
P115
P114
P097
P094
P113
P112
P090
DCKIN
CSOUT
HSIN
VSIN
CCLK
BIN7
BIN6
BIN5
BIN4
BIN3
BIN2
GIN7
GIN6
GIN5
GIN4
GIN3
GIN2
RIN7
RIN6
RIN5
RIN4
RIN3
RIN2
(Single
(Single
OCU0
FRCK0
FRCK1
SGO3
SGA3
SGO2
SGA2
WOT
SGO1
RX2
TX2
-
CMDTRG
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0
clock product)
clock product)
SCK5
TOT3
SOT5
INT7
SIN5
INT6
SCK4
TRG4
SOT4
SIN4
SCK3
TRG3
SOT3
INT8
INT15
SIN3
INT11
ADTG
PPG0_2
-
-
(TOP VIEW)
●
-
-
-
-
PPG0
PPG1
PPG2
PPG3
PPG4
PPG5
PPG6
PPG7
-
TIN0_2
TIN1_2
TIN2_2
TIN3_2
TOT0_2
TOT1_2
TOT2_2
TOT3_2
-
SIN2_1
SOT2_1
SCK2_1
SIN3_1
SOT3_1
SCK3_1
ROUT0
ROUT1
GOUT0
GOUT1
BOUT0
BOUT1
-
ROUT2
ROUT3
ROUT4
ROUT5
ROUT6
ROUT7
GOUT2
GOUT3
GOUT4
GOUT5
GOUT6
GOUT7
BOUT2
BOUT3
BOUT4
BOUT5
BOUT6
BOUT7
DCKOUT
VSYNC
HSYNC
DEOUT
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
WEX
CS0X
CS1X
REX
A00
-
VCC3
PD2
PD3
PD4
PD5
PD6
PD7
PE2
PE3
PE4
PE5
PE6
PE7
PF2
PF3
PF4
PF5
VCC3
VSS
C_3
PF6
PF7
PG4
PG5
PG6
PG7
P000
P001
P002
P003
P004
P005
P006
P007
P010
VSS
VCC3
P011
P012
P013
P014
P015
P016
P017
P020
P021
P022
P023
P024
P025
P026
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
FR+GDC
TOP VIEW
LQFP-208 / HQFP-208
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
DVCC
DVSS
P087
P086
P085
P084
P083
P082
P081
P080
DVCC
DVSS
P077
P076
P075
P074
P073
P072
P071
P070
DVCC
DVSS
P067
P066
P065
P064
P063
P062
P061
P060
DVCC
DVSS
C_1
VSS
VCC5
P107
P106
P105
P104
P103
P102
P101
P100
AVSS5/AVRL5
AVRH5
AVCC5
P125
P124
P123
P096
P095
VCC5
PWM2M5
PWM2P5
PWM1M5
PWM1P5
PWM2M4
PWM2P4
PWM1M4
PWM1P4
PWM2M3
PWM2P3
PWM1M3
PWM1P3
PWM2M2
PWM2P2
PWM1M2
PWM1P2
PWM2M1
PWM2P1
PWM1M1
PWM1P1
PWM2M0
PWM2P0
PWM1M0
PWM1P0
SGO4_1
SGA4_1
SCK5_1
SOT5_1
SIN5_1
SCK4_1
SOT4_1
SIN4_1
OCU3
OCU2
OCU1
RX0
TX0
-
AN31
AN30
AN29
AN28
AN27
AN26
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
-
ICU4_2
ICU3_2
ICU2_2
ICU1_2
ICU0_2
SCK6
SOT6
SIN6
SCK7_1
SOT7_1
SIN7_1
TOT1_1
TOT0_1
TIN3_1
TIN2_1
TIN1_1
TIN0_1
INT9
-
PPG23
PPG22
PPG21
PPG20
PPG19
PPG18
PPG17
PPG16
PPG15_1
PPG14_1
PPG13_1
PPG12_1
ICU0
ICU5_2
-
-
PPG5_1
PPG4_1
PPG3_1
PPG2_1
PPG1_1
PPG10
PPG9
PPG8
PPG10_2
PPG9_2
PPG8_2
PPG10_1
-
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
VSS
DEBUGIF
P111
P110
P093
P092
P091
NMIX
P134
P133
P132
P131
P130
P127
P126
VCC5
VSS
RSTX
MD0
MD1
X0
X1
VSS
P057
P056
P055
P054
P053
P052
P051
P050
C_2
VSS
VCC3
P047
P046
P045
P044
P043
P042
P041
P040
P037
P036
P035
P034
P033
P032
P031
P030
P027
VCC3
RX1
TX1
SGA1
SGO0
SGA0
TRG2
TRG5
TRG1
TRG0
RDY
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A09
A08
A07
A06
A05
A04
A03
A02
A01
SOT2
SCK2
SIN2
PPG1_3
PPG11_1
SCK0
SOT0
SIN0
SPI_XCS
SPI_SCK
SPI_DI
SPI_DO
INT10
INT14
INT13
INT12
SCK1
SOT1
SIN1
TOT3_1
TOT2_1
INT5
INT3
INT2
INT4
INT0
INT1
ICU3_1
ICU0_1
ICU2_1
ICU5
ICU4
ICU3
ICU2
ICU1
-
FUJITSU SEMICONDUCTOR CONFIDENTIAL
PPG2_2
PPG1_2
PPG8_1
PPG7_1
PPG6_1
TIOB1
TIOB0
TIOA1
TIOA0
-
-
-
14
DS705-00010-2v0-E
MB91590 Series
Pin Assignment (dual clock product)
PPG0_1
PPG9_1
PPG4_2
PPG3_2
PPG6_2
PPG5_2
PPG7_2
ICU5_1
ICU4_1
ICU1_1
VSS
MD2
P122
P121
P120
P117
P116
P115
P114
P097
P094
P113
P112
P090
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VSS
AVCC3
AVSS3
VIN
REFOUT
AVR3
AVSS3
AVCC3
PG0
PG3
PG2
PG1
PH3
PC7
PC6
PC5
PC4
PC3
PC2
VCC3
VSS
PB7
PB6
PB5
PB4
PB3
PB2
PA7
PA6
PA5
PA4
PA3
PA2
VCC3
VSS
VCC5
DCKIN
CSOUT
HSIN
VSIN
CCLK
BIN7
BIN6
BIN5
BIN4
BIN3
BIN2
GIN7
GIN6
GIN5
GIN4
GIN3
GIN2
RIN7
RIN6
RIN5
RIN4
RIN3
RIN2
(X1A)
(X0A)
OCU0
FRCK0
FRCK1
SGO3
SGA3
SGO2
SGA2
WOT
SGO1
RX2
TX2
-
CMDTRG
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0
(Dual clock product)
(Dual clock product)
SCK5
TOT3
SOT5
TOT2
INT7
TOT1
INT6
SIN5
TOT0
SCK4
TRG4
TIN3
SOT4
TIN2
SIN4
SCK3
TRG3
TIN1
TIN0
SOT3
INT8
INT15
SIN3
INT11
ADTG
PPG0_2 -
-
-
(TOP VIEW)
●
-
-
-
-
PPG0
PPG1
PPG2
PPG3
PPG4
PPG5
PPG6
PPG7
-
TIN0_2
TIN1_2
TIN2_2
TIN3_2
TOT0_2
TOT1_2
TOT2_2
TOT3_2
-
SIN2_1
SOT2_1
SCK2_1
SIN3_1
SOT3_1
SCK3_1
ROUT0
ROUT1
GOUT0
GOUT1
BOUT0
BOUT1
-
ROUT2
ROUT3
ROUT4
ROUT5
ROUT6
ROUT7
GOUT2
GOUT3
GOUT4
GOUT5
GOUT6
GOUT7
BOUT2
BOUT3
BOUT4
BOUT5
BOUT6
BOUT7
DCKOUT
VSYNC
HSYNC
DEOUT
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
WEX
CS0X
CS1X
REX
A00
-
VCC3
PD2
PD3
PD4
PD5
PD6
PD7
PE2
PE3
PE4
PE5
PE6
PE7
PF2
PF3
PF4
PF5
VCC3
VSS
C_3
PF6
PF7
PG4
PG5
PG6
PG7
P000
P001
P002
P003
P004
P005
P006
P007
P010
VSS
VCC3
P011
P012
P013
P014
P015
P016
P017
P020
P021
P022
P023
P024
P025
P026
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
FR+GDC
TOP VIEW
LQFP-208 / HQFP-208
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
DVCC
DVSS
P087
P086
P085
P084
P083
P082
P081
P080
DVCC
DVSS
P077
P076
P075
P074
P073
P072
P071
P070
DVCC
DVSS
P067
P066
P065
P064
P063
P062
P061
P060
DVCC
DVSS
C_1
VSS
VCC5
P107
P106
P105
P104
P103
P102
P101
P100
AVSS5/AVRL5
AVRH5
AVCC5
P125
P124
P123
P096
P095
VCC5
PWM2M5
PWM2P5
PWM1M5
PWM1P5
PWM2M4
PWM2P4
PWM1M4
PWM1P4
PWM2M3
PWM2P3
PWM1M3
PWM1P3
PWM2M2
PWM2P2
PWM1M2
PWM1P2
PWM2M1
PWM2P1
PWM1M1
PWM1P1
PWM2M0
PWM2P0
PWM1M0
PWM1P0
SGO4_1
SGA4_1
SCK5_1
SOT5_1
SIN5_1
SCK4_1
SOT4_1
SIN4_1
OCU3
OCU2
OCU1
RX0
TX0
-
AN31
AN30
AN29
AN28
AN27
AN26
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
-
ICU4_2
ICU3_2
ICU2_2
ICU1_2
ICU0_2
SCK6
SOT6
SIN6
SCK7_1
SOT7_1
SIN7_1
TOT1_1
TOT0_1
TIN3_1
TIN2_1
TIN1_1
TIN0_1
INT9
-
PPG23
PPG22
PPG21
PPG20
PPG19
PPG18
PPG17
PPG16
PPG15_1
PPG14_1
PPG13_1
PPG12_1
ICU0
ICU5_2
-
-
PPG5_1
PPG4_1
PPG3_1
PPG2_1
PPG1_1
PPG10
PPG9
PPG8
PPG10_2
PPG9_2
PPG8_2
PPG10_1
-
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
VSS
DEBUGIF
P111
P110
P093
P092
P091
NMIX
P134
P133
P132
P131
P130
P127
P126
VCC5
VSS
RSTX
MD0
MD1
X0
X1
VSS
P057
P056
P055
P054
P053
P052
P051
P050
C_2
VSS
VCC3
P047
P046
P045
P044
P043
P042
P041
P040
P037
P036
P035
P034
P033
P032
P031
P030
P027
VCC3
RX1
TX1
SGA1
SGO0
SGA0
TRG2
TRG5
TRG1
TRG0
RDY
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A09
A08
A07
A06
A05
A04
A03
A02
A01
SOT2
SCK2
SIN2
PPG1_3
PPG11_1
SCK0
SOT0
SIN0
SPI_XCS
SPI_SCK
SPI_DI
SPI_DO
INT10
INT14
INT13
INT12
SCK1
SOT1
SIN1
TOT3_1
TOT2_1
INT5
INT3
INT2
INT4
INT0
INT1
ICU3_1
ICU0_1
ICU2_1
ICU5
ICU4
ICU3
ICU2
ICU1
-
FUJITSU SEMICONDUCTOR CONFIDENTIAL
PPG2_2
PPG1_2
PPG8_1
PPG7_1
PPG6_1
TIOB1
TIOB0
TIOA1
TIOA0
-
-
-
DS705-00010-2v0-E
15
MB91590 Series
PIN DESCRIPTION
I/O
Polarity circuit
types*1
Function *2
Pin no.
Pin Name
84
X0
–
L
Main clock oscillation input pin
83
X1
–
L
Main clock oscillation output pin
171
(dual
clock
product)
X0A
–
N
Sub clock oscillation input pin
172
(dual
clock
product)
X1A
–
N
Sub clock oscillation output pin
P137
–
A
General-purpose I/O port
P136
–
A
General-purpose I/O port
97
NMIX
N
F1
Non-masking interrupt input pin
170
VSS
–
–
GND pin
87
RSTX
N
F1
External reset input pin
86
MD0
–
P
Mode pin 0
85
MD1
–
P
Mode pin 1
169
MD2
–
F2
Mode pin 2
P000
–
General-purpose I/O port (3V pin)
D0
–
External bus · Data bit0 I/O pin
SIN2_1
–
TIN0_2
–
Reload timer ch.0 event input pin (2)
PPG0
–
PPG ch.0 output pin
P001
–
General-purpose I/O port (3V pin)
D1
–
External bus · Data bit1 I/O pin
SOT2_1
–
TIN1_2
–
Reload timer ch.1 event input pin (2)
PPG1
–
PPG ch.1 output pin
171
(single
clock
product)
172
(single
clock
product)
27
28
O
O
LIN-UART ch.2 serial data input pin (1)
LIN-UART ch.2 serial data output pin (1)
16
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
29
30
31
32
33
Pin Name
38
Function *2
P002
–
General-purpose I/O port (3V pin)
D2
–
External bus · Data bit2 I/O pin
SCK2_1
–
TIN2_2
–
Reload timer ch.2 event input pin (2)
PPG2
–
PPG ch.2 output pin
P003
–
General-purpose I/O port (3V pin)
D3
–
External bus · Data bit3 I/O pin
SIN3_1
–
TIN3_2
–
Reload timer ch.3 event input pin (2)
PPG3
–
PPG ch.3 output pin
P004
–
General-purpose I/O port (3V pin)
D4
–
External bus · Data bit4 I/O pin
SOT3_1
–
TOT0_2
–
Reload timer ch.0 output pin (2)
PPG4
–
PPG ch.4 output pin
P005
–
General-purpose I/O port (3V pin)
D5
–
External bus · Data bit5 I/O pin
SCK3_1
–
TOT1_2
–
Reload timer ch.1 output pin (2)
PPG5
–
PPG ch.5 output pin
P006
–
General-purpose I/O port (3V pin)
D6
–
TOT2_2
–
Reload timer ch.2 output pin (2)
PPG6
–
PPG ch.6 output pin
P007
–
General-purpose I/O port (3V pin)
D7
–
34
35
I/O
Polarity circuit
types*1
TOT3_2
–
PPG7
–
P010
–
D8
–
P011
–
D9
–
ROUT0
–
O
O
O
O
O
LIN-UART ch.2clock I/O pin (1)
LIN-UART ch.3 serial data input pin (1)
LIN-UART ch.3 serial data output pin (1)
LIN-UART ch.3 clock I/O pin (1)
External bus · Data bit6 I/O pin
External bus · Data bit7 I/O pin
O
Reload timer ch.3 output pin (2)
PPG ch.7 output pin
General-purpose I/O port (3V pin)
O
External bus · Data bit8 I/O pin
General-purpose I/O port (3V pin)
O
External bus · Data bit9 I/O pin
Display digital R0 output pin
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
17
MB91590 Series
Pin no.
39
40
41
42
43
44
45
46
47
Pin Name
Function *2
P012
–
D10
–
ROUT1
–
Display digital R1 output pin
P013
–
General-purpose I/O port (3V pin)
D11
–
GOUT0
–
Display digital G0 output pin
P014
–
General-purpose I/O port (3V pin)
D12
–
GOUT1
–
Display digital G1 output pin
P015
–
General-purpose I/O port (3V pin)
D13
–
BOUT0
–
Display digital B0 output pin
P016
–
General-purpose I/O port (3V pin)
D14
–
BOUT1
–
P017
–
D15
–
P020
–
WEX
–
P021
–
CS0X
–
P022
–
CS1X
–
–
P023
48
I/O
Polarity circuit
types*1
General-purpose I/O port (3V pin)
O
O
O
O
O
External bus · Data bit10 I/O pin
External bus · Data bit11 I/O pin
External bus · Data bit12 I/O pin
External bus · Data bit13 I/O pin
External bus · Data bit14 I/O pin
Display digital B1 output pin
O
General-purpose I/O port (3V pin)
External bus · Data bit15 I/O pin
O
O
O
General-purpose I/O port (3V pin)
External bus · Write enable output pin
General-purpose I/O port (3V pin)
External bus · Chip select 0 output pin
General-purpose I/O port (3V pin)
External bus · Chip select 1 output pin
General-purpose I/O port (3V pin)
O
REX
–
49
P024
–
O
General-purpose I/O port (3V pin)
50
P025
–
O
General-purpose I/O port (3V pin)
P026
–
A00
–
P027
–
A01
–
P030
–
A02
–
P031
–
A03
–
51
54
55
56
O
O
External bus · Read enable output pin
General-purpose I/O port (3V pin)
External bus · Address bit0 output pin
General-purpose I/O port (3V pin)
External bus · Address bit1 output pin
O
O
General-purpose I/O port (3V pin)
External bus · Address bit2 output pin
General-purpose I/O port (3V pin)
External bus · Address bit3 output pin
18
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
Pin Name
P032
57
–
P033
–
A05
–
P034
–
59
A06
–
P035
–
A07
–
P036
–
61
A08
–
P037
–
62
63
A09
–
P040
–
A10
–
P041
–
64
A11
–
P042
–
65
66
67
68
A12
–
P043
–
A13
–
P044
–
A14
–
P045
–
A15
–
P046
–
69
A16
–
P047
–
70
74
75
–
A04
58
60
I/O
Polarity circuit
types*1
A17
–
P050
–
A18
–
P051
–
A19
–
P052
–
76
A20
–
Function *2
General-purpose I/O port (3V pin)
O
External bus · Address bit4 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit5 output pin
General-purpose I/O port (3V pin)
O
O
External bus · Address bit6 output pin
General-purpose I/O port (3V pin)
External bus · Address bit7 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit8 output pin
General-purpose I/O port (3V pin)
O
O
External bus · Address bit9 output pin
General-purpose I/O port (3V pin)
External bus · Address bit10 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit11 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit12 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit13 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit14 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit15 output pin
General-purpose I/O port (3V pin)
O
External bus · Address bit16 output pin
General-purpose I/O port (3V pin)
O
O
External bus · Address bit17 output pin
General-purpose I/O port (3V pin)
External bus · Address bit18 output pin
O
General-purpose I/O port(3V pin)
External bus · Address bit19 output pin
General-purpose I/O port(3V pin)
O
External bus · Address bit20 output pin
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
19
MB91590 Series
Pin no.
77
78
79
80
Pin Name
128
129
130
131
132
Function *2
P053
–
A21
–
SPI_DO
–
SPI data output pin
P054
–
General-purpose I/O port (3V pin)
A22
–
SPI_DI
–
SPI data input pin
P055
–
General-purpose I/O port (3V pin)
A23
–
SPI_SCK
–
SPI clock output pin
P056
–
General-purpose I/O port (3V pin)
A24
–
SPI_XCS
–
P057
–
81
127
I/O
Polarity circuit
types*1
General-purpose I/O port(3V pin)
O
O
O
O
External bus · Address bit21 output pin
External bus · Address bit22 output pin
External bus · Address bit23 output pin
External bus · Address bit24 output pin
SPI chip select output pin
General-purpose I/O port (3V pin)
O
RDY
–
External bus · Wait input pin
P060
–
PWM1P0
–
AN8
–
ADC Analog 8 input pin
P061
–
General-purpose I/O port
PWM1M0
–
AN9
–
ADC Analog 9 input pin
P062
–
General-purpose I/O port
PWM2P0
–
AN10
–
ADC Analog 10 input pin
P063
–
General-purpose I/O port
PWM2M0
–
AN11
–
ADC Analog 11 input pin
P064
–
General-purpose I/O port
PWM1P1
–
AN12
–
ADC Analog 12 input pin
P065
–
General-purpose I/O port
PWM1M1
–
AN13
–
General-purpose I/O port
E
E
E
E
E
E
SMC ch.0 output pin
SMC ch.0 output pin
SMC ch.0 output pin
SMC ch.0 output pin
SMC ch.1 output pin
SMC ch.1 output pin
ADC Analog 13 input pin
20
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
133
134
137
138
139
140
141
142
143
Pin Name
I/O
Polarity circuit
types*1
Function *2
P066
–
PWM2P1
–
AN14
–
ADC Analog 14 input pin
P067
–
General-purpose I/O port
PWM2M1
–
AN15
–
ADC Analog 15 input pin
P070
–
General-purpose I/O port
PWM1P2
–
AN16
–
ADC Analog 16 input pin
P071
–
General-purpose I/O port
PWM1M2
–
AN17
–
ADC Analog 17 input pin
P072
–
General-purpose I/O port
PWM2P2
–
AN18
–
ADC Analog 18 input pin
P073
–
General-purpose I/O port
PWM2M2
–
AN19
–
ADC Analog 19 input pin
P074
–
General-purpose I/O port
PWM1P3
–
AN20
–
PPG12_1
–
PPG ch.12 output pin (1)
P075
–
General-purpose I/O port
PWM1M3
–
SMC ch.3 output pin
AN21
–
SIN7_1
–
LIN-UART ch.7 serial data input pin
PPG13_1
–
PPG ch.13 output pin (1)
P076
–
General-purpose I/O port
PWM2P3
–
SMC ch.3 output pin
AN22
–
SOT7_1
–
LIN-UART ch.7 serial data output pin
PPG14_1
–
PPG ch.14 output pin (1)
General-purpose I/O port
E
E
E
E
E
E
E
SMC ch.1 output pin
SMC ch.1 output pin
SMC ch.2 output pin
SMC ch.2 output pin
SMC ch.2 output pin
SMC ch.2 output pin
SMC ch.3 output pin
ADC Analog 20 input pin
E
E
ADC Analog 21 input pin
ADC Analog 22 input pin
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
21
MB91590 Series
Pin no.
144
147
148
149
150
151
Pin Name
I/O
Polarity circuit
types*1
Function *2
P077
–
General-purpose I/O port
PWM2M3
–
SMC ch.3 output pin
AN23
–
SCK7_1
–
LIN-UART ch.7 clock I/O pin
PPG15_1
–
PPG ch.15 output pin (1)
P080
–
General-purpose I/O port
PWM1P4
–
SMC ch.4 output pin
AN24
–
SIN6
–
LIN-UART ch.6 serial data input pin
PPG16
–
PPG ch.16 output pin
P081
–
General-purpose I/O port
PWM1M4
–
SMC ch.4 output pin
AN25
–
SOT6
–
LIN-UART ch.6 serial data output pin
PPG17
–
PPG ch.17 output pin
P082
–
General-purpose I/O port
PWM2P4
–
SMC ch.4 output pin
AN26
–
SCK6
–
LIN-UART ch.6 clock I/O pin
PPG18
–
PPG ch.18 output pin
P083
–
General-purpose I/O port
PWM2M4
–
SMC ch.4 output pin
AN27
–
ICU0_2
–
Input capture ch.0 input pin (2)
PPG19
–
PPG ch.19 output pin
P084
–
General-purpose I/O port
PWM1P5
–
SMC ch.5 output pin
AN28
–
ICU1_2
–
Input capture ch.1 input pin (2)
PPG20
–
PPG ch.20 output pin
E
E
E
E
E
E
ADC Analog 23 input pin
ADC Analog 24 input pin
ADC Analog 25 input pin
ADC Analog 26 input pin
ADC Analog 27 input pin
ADC Analog 28 input pin
22
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
152
153
154
157
98
99
Pin Name
I/O
Polarity circuit
types*1
Function *2
P085
–
General-purpose I/O port
PWM1M5
–
SMC ch.5 output pin
AN29
–
ICU2_2
–
Input capture ch.2 input pin (2)
PPG21
–
PPG ch.21 output pin
P086
–
General-purpose I/O port
PWM2P5
–
SMC ch.5 output pin
AN30
–
ICU3_2
–
Input capture ch.3 input pin (2)
PPG22
–
PPG ch.22 output pin
P087
–
General-purpose I/O port
PWM2M5
–
SMC ch.5 output pin
AN31
–
ICU4_2
–
Input capture ch.4 input pin (2)
PPG23
–
PPG ch.23 output pin
P090
–
General-purpose I/O port
ADTG
–
PPG0_2
–
PPG ch.0 output pin (2)
P091
–
General-purpose I/O port
SGA0
–
Sound generator ch.0 SGA output pin
SIN2
–
LIN-UART ch.2 serial data input pin
INT12
–
TOT2_1
–
Reload timer ch.2 output pin (1)
ICU2_1
–
Input capture ch.2 input pin (1)
PPG6_1
–
PPG ch.6 output pin (1)
P092
–
General-purpose I/O port
SGO0
–
Sound generator ch.0 SGO output pin
SCK2
–
LIN-UART ch.2 clock I/O pin
INT13
–
TOT3_1
–
Reload timer ch.3 output pin (1)
ICU0_1
–
Input capture ch.0 input pin (1)
PPG7_1
–
PPG ch.7 output pin (1)
E
E
E
A
C
C
ADC Analog 29 input pin
ADC Analog 30 input pin
ADC Analog 31 input pin
A/D convertor external trigger input pin
INT12 External interrupt input pin
INT13 External interrupt input pin
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
23
MB91590 Series
Pin no.
100
160
106
107
161
114
Pin Name
I/O
Polarity circuit
types*1
Function *2
P093
–
General-purpose I/O port
SGA1
–
Sound generator ch.1 SGA output pin
SOT2
–
INT14
–
INT14 External interrupt input pin
ICU3_1
–
Input capture ch.3 input pin (1)
PPG8_1
–
PPG ch.8 output pin (1)
P094
–
General-purpose I/O port
SGO1
–
Sound generator ch.1 SGO output pin
SIN3
–
INT15
–
INT15 External interrupt input pin
ICU1_1
–
Input capture ch1 input pin (1)
PPG9_1
–
PPG ch.9 output pin (1)
P095
–
General-purpose I/O port
TX0
–
PPG10_1
–
PPG ch.10 output pin (1)
P096
–
General-purpose I/O port
RX0
–
INT9
–
INT9 External interrupt input pin
P097
–
General-purpose I/O port
WOT
–
RTC overflow output pin
SOT3
–
LIN-UART ch.3 serial data output pin
INT8
–
TIN0
–
Reload timer ch.0 event input pin
ICU4_1
–
Input capture ch.4 input pin (1)
PPG0_1
–
PPG ch.0 output pin (1)
P100
–
General-purpose I/O port
SIN4_1
–
LIN-UART ch.4 serial data input pin (1)
AN0
–
TIN0_1
–
Reload timer ch.0 event input pin (1)
PPG8
–
PPG ch.8 output pin
C
C
A
A
C
C
LIN-UART ch.2 serial data output pin
LIN-UART ch.3 serial data input pin
CAN transmission data0 output pin
CAN reception data0 input pin
INT8 External interrupt input pin
ADC Analog 0 input pin
24
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
115
116
117
118
119
120
Pin Name
I/O
Polarity circuit
types*1
Function *2
P101
–
General-purpose I/O port
SOT4_1
–
LIN-UART ch.4 serial data output pin (1)
AN1
–
TIN1_1
–
Reload timer ch.1 event input pin (1)
PPG9
–
PPG ch.9 output pin
P102
–
General-purpose I/O port
SCK4_1
–
LIN-UART ch.4 clock I/O pin (1)
AN2
–
TIN2_1
–
Reload timer ch.2 event input pin (1)
PPG10
–
PPG ch.10 output pin
P103
–
General-purpose I/O port
SIN5_1
–
LIN-UART ch.5 serial data input pin (1)
AN3
–
TIN3_1
–
Reload timer ch.3 event input pin (1)
PPG1_1
–
PPG ch.1 output pin (1)
P104
–
General-purpose I/O port
SOT5_1
–
LIN-UART ch.5 serial data output pin (1)
AN4
–
TOT0_1
–
Reload timer ch.0 output pin (1)
PPG2_1
–
PPG ch.2 output pin (1)
P105
–
General-purpose I/O port
SCK5_1
–
LIN-UART ch.5 clock I/O pin (1)
AN5
–
TOT1_1
–
Reload timer ch.1 output pin (1)
PPG3_1
–
PPG ch.3 output pin (1)
P106
–
General-purpose I/O port
SGA4_1
–
C
C
C
C
C
ADC Analog 1 input pin
ADC Analog 2 input pin
ADC Analog 3 input pin
ADC Analog 4 input pin
ADC Analog 5 input pin
Sound generator ch.4 SGA output pin
C
AN6
–
PPG4_1
–
PPG ch.4 output pin (1)
P107
–
General-purpose I/O port
SGO4_1
–
121
AN7
–
PPG5_1
–
ADC Analog 6 input pin
Sound generator ch.4 SGO output pin
C
ADC Analog 7 input pin
PPG ch.5 output pin (1)
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
25
MB91590 Series
Pin no.
101
Pin Name
–
TX1
–
PPG1_2
–
PPG ch.1 output pin (2)
P111
–
General-purpose I/O port
RX1
–
C
CAN transmission data1 output pin
CAN reception data 1 input pin
C
–
PPG2_2
–
PPG ch.2 output pin (2)
P112
–
General-purpose I/O port
TX2
–
PPG3_2
–
PPG ch.3 output pin (2)
P113
–
General-purpose I/O port
RX2
–
INT10 External interrupt input pin
C
CAN transmission data 2 output pin
CAN reception data 2 input pin
C
INT11
–
PPG4_2
–
PPG ch.4 output pin (2)
P114
–
General-purpose I/O port
SGA2
–
Sound generator ch.2 SGA output pin
SCK3
–
162
INT11 External interrupt input pin
LIN-UART ch.3 clock I/O pin
C
TRG3
–
TIN1
–
Reload timer ch.1 event input pin
ICU5_1
–
Input capture ch.5 input pin (1)
P115
–
General-purpose I/O port
SGO2
–
SIN4
–
TIN2
–
Reload timer ch.2 event input pin
P116
–
General-purpose I/O port
SGA3
–
164
165
General-purpose I/O port
INT10
159
163
Function *2
P110
102
158
I/O
Polarity circuit
types*1
PPG trigger 3 input pin (ch.12 to ch.15)
C
Sound generator ch.2 SGO output pin
LIN-UART ch.4 serial data input pin
Sound generator ch.3 SGA output pin
C
SOT4
–
LIN-UART ch.4 serial data output pin
TIN3
–
Reload timer ch.3 event input pin
P117
–
General-purpose I/O port
SGO3
–
Sound generator ch.3 SGO output pin
SCK4
–
TRG4
–
PPG trigger 4 input pin (ch.16 to ch.19)
TOT0
–
Reload timer ch.0 output pin
C
LIN-UART ch.4 clock I/O pin
26
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
Pin Name
–
General-purpose I/O port
FRCK1
–
Free-run timer 1 clock input pin
SIN5
–
–
INT6 External interrupt input pin
TOT1
–
Reload timer ch.1 output pin
PPG5_2
–
PPG ch.5 output pin (2)
P121
–
General-purpose I/O port
FRCK0
–
Free-run timer 0 clock input pin
SOT5
–
LIN-UART ch.5 serial data output pin
C
INT7
–
TOT2
–
Reload timer ch.2 output pin
PPG6_2
–
PPG ch.6 output pin (2)
P122
–
General-purpose I/O port
OCU0
–
Output compare ch.0 output pin
SCK5
–
TOT3
–
Reload timer ch.3 output pin
PPG7_2
–
PPG ch.7 output pin (2)
P123
–
General-purpose I/O port
OCU1
–
PPG8_2
–
PPG ch.8 output pin (2)
P124
–
General-purpose I/O port
OCU2
–
109
INT7 External interrupt input pin
C
A
LIN-UART ch.5 clock I/O pin
Output compare ch.1 output pin
Output compare ch.2 output pin
A
ICU5_2
–
PPG9_2
–
PPG ch.9 output pin (2)
P125
–
General-purpose I/O port
OCU3
–
110
90
LIN-UART ch.5 serial data input pin
C
INT6
167
108
Function *2
P120
166
168
I/O
Polarity circuit
types*1
Input capture ch.5 input pin (2)
Output compare ch.3 output pin
A
ICU0
–
Input capture ch.0 input pin
PPG10_2
–
PPG ch.10 output pin (2)
P126
–
General-purpose I/O port
TRG0
–
SIN0
–
INT1
–
PPG trigger 0 input pin (ch.0 to ch.3)
A
Multi-UART ch.0 serial data input pin
INT1 External interrupt input pin
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
27
MB91590 Series
Pin no.
Pin Name
–
SOT0
–
P130
–
General-purpose I/O port
SCK0
–
Multi-UART ch.0 clock I/O pin / I2C ch.0 clock I/O pin
INT0
–
ICU1
–
Input capture ch.1 input pin
TIOA0
–
Base timer TIOA0 output pin
P131
–
General-purpose I/O port
TRG1
–
PPG trigger 1 input pin (ch.4 to ch.7)
SIN1
–
95
96
103
General-purpose I/O port
K
K
Multi-UART ch.0 serial data output pin / I2C ch.0 serial data
I/O pin
INT0 External interrupt input pin
Multi-UART ch.1 serial data input pin
A
93
94
Function *2
P127
91
92
I/O
Polarity circuit
types*1
INT4
–
INT4 External interrupt input pin
ICU2
–
Input capture ch.2 input pin
TIOA1
–
Base timer TIOA1 I/O pin
P132
–
General-purpose I/O port
SOT1
–
Multi-UART ch.1 serial data output pin / I2C ch.1 serial data
I/O pin
INT2
–
ICU3
–
Input capture ch.3 input pin
TIOB0
–
Base timer TIOB0 input pin
P133
–
General-purpose I/O port
TRG5
–
PPG trigger 5 input pin ( ch.20 to ch.23)
PPG11_1
–
PPG ch.11 output pin (1)
SCK1
–
INT3
–
INT3 External interrupt input pin
ICU4
–
Input capture ch.4 input pin
TIOB1
–
Base timer TIOB1 input pin
P134
–
General-purpose I/O port
TRG2
–
PPG trigger 2 input pin ( ch.8 to ch.11)
PPG1_3
–
INT5
–
INT5 External interrupt input pin
ICU5
–
Input capture ch.5 input pin
DEBUGIF
–
K
K
A
G
INT2 External interrupt input pin
Multi-UART ch.1 clock I/O pin / I2C ch.1 clock I/O pin
PPG ch.1 output pin (3)
DEBUG I/F pin
28
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
176
177
178
179
180
181
182
183
Pin Name
Function *2
PA2
–
RIN2
–
VIN0
–
Capture VIN0 input pin (656 mode)
PA3
–
General-purpose I/O port (3V pin)
RIN3
–
VIN1
–
Capture VIN1 input pin (656 mode)
PA4
–
General-purpose I/O port (3V pin)
RIN4
–
VIN2
–
Capture VIN2 input pin (656 mode)
PA5
–
General-purpose I/O port (3V pin)
RIN5
–
VIN3
–
Capture VIN3 input pin (656 mode)
PA6
–
General-purpose I/O port (3V pin)
RIN6
–
VIN4
–
Capture VIN4 input pin (656 mode)
PA7
–
General-purpose I/O port (3V pin)
RIN7
–
VIN5
–
Capture VIN5 input pin (656 mode)
PB2
–
General-purpose I/O port (3V pin)
GIN2
–
VIN6
–
Capture VIN6 input pin (656 mode)
PB3
–
General-purpose I/O port (3V pin)
GIN3
–
VIN7
–
PB4
–
184
GIN4
–
PB5
–
185
GIN5
–
PB6
–
186
187
I/O
Polarity circuit
types*1
GIN6
–
PB7
–
GIN7
–
PC2
–
190
BIN2
–
General-purpose I/O port (3V pin)
O
O
O
O
O
O
O
O
Capture R2 input pin (RGB mode)
Capture R3 input pin (RGB mode)
Capture R4 input pin (RGB mode)
Capture R5 input pin (RGB mode)
Capture R6 input pin (RGB mode)
Capture R7 input pin (RGB mode)
Capture G2 input pin (RGB mode)
Capture G3 input pin (RGB mode)
Capture VIN7 input pin (656 mode)
General-purpose I/O port (3V pin)
O
Capture G4 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
Capture G5 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
Capture G6 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
Capture G7 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
Capture B2 input pin (RGB mode)
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
29
MB91590 Series
Pin no.
Pin Name
PC3
191
192
193
194
–
PC4
–
BIN4
–
PC5
–
BIN5
–
PC6
–
BIN6
–
PC7
–
BIN7
–
PD2
–
ROUT2
–
PD3
–
3
ROUT3
–
PD4
–
4
ROUT4
–
PD5
–
5
ROUT5
–
PD6
–
6
7
8
ROUT6
–
PD7
–
ROUT7
–
PE2
–
GOUT2
–
PE3
–
9
10
11
12
–
BIN3
195
2
I/O
Polarity circuit
types*1
GOUT3
–
PE4
–
GOUT4
–
PE5
–
GOUT5
–
PE6
–
GOUT6
–
PE7
–
13
GOUT7
–
Function *2
General-purpose I/O port (3V pin)
O
Capture B3 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
Capture B4 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
O
Capture B5 input pin (RGB mode)
General-purpose I/O port (3V pin)
Capture B6 input pin (RGB mode)
General-purpose I/O port (3V pin)
O
Capture B7 input pin (RGB mode)
O
General-purpose I/O port (3V pin)
Display digital R2 output pin
General-purpose I/O port (3V pin)
O
Display digital R3 output pin
General-purpose I/O port (3V pin)
O
Display digital R4 output pin
General-purpose I/O port (3V pin)
O
Display digital R5 output pin
General-purpose I/O port (3V pin)
O
Display digital R6 output pin
General-purpose I/O port (3V pin)
O
Display digital R7 output pin
General-purpose I/O port (3V pin)
O
Display digital G2 output pin
General-purpose I/O port (3V pin)
O
Display digital G3 output pin
General-purpose I/O port (3V pin)
O
Display digital G4 output pin
General-purpose I/O port (3V pin)
O
O
Display digital G5 output pin
General-purpose I/O port (3V pin)
Display digital G6 output pin
General-purpose I/O port (3V pin)
O
Display digital G7 output pin
30
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Pin no.
14
Pin Name
PF2
–
BOUT2
–
PF3
–
15
BOUT3
–
PF4
–
16
17
BOUT4
–
PF5
–
BOUT5
–
PF6
–
21
22
200
197
198
I/O
Polarity circuit
types*1
General-purpose I/O port (3V pin)
O
Display digital B3 output pin
General-purpose I/O port (3V pin)
O
Display digital B4 output pin
General-purpose I/O port (3V pin)
O
Display digital B5 output pin
General-purpose I/O port (3V pin)
O
PF7
–
BOUT7
–
Display digital B7 output pin
PG0
–
General-purpose I/O port (3V pin)
DCKIN
–
CMDTRG
–
PG1
–
VSIN
P
PG2
–
HSIN
P
PG3
–
Display digital B6 output pin
O
O
CSOUT
–
PG4
–
DCKOUT
–
PG5
–
VSYNC
–
PG6
–
O
PG7
–
DEOUT
P
PH3
–
Capture vertical sync signal input pin
General-purpose I/O port (3V pin)
Capture horizontal sync signal input pin
General-purpose I/O port (3V pin)
O
Display composite sync signal output pin, Graphics /
Video switch (for External sync) output pin
General-purpose I/O port (3V pin)
Display reference clock output pin (for Internal sync)
General-purpose I/O port (3V pin)
Display vertical sync signal output pin (for Internal sync)/
Display vertical sync signal input pin (for External sync)
General-purpose I/O port (3V pin)
O
–
Display reference clock input pin (for External sync)
General-purpose I/O port (3V pin)
O
O
HSYNC
General-purpose I/O port(3V pin)
GDC command trigger input pin
O
25
196
Display digital B2 output pin
–
24
26
General-purpose I/O port (3V pin)
BOUT6
199
23
O
Function *2
Display horizontal sync signal output pin (for Internal sync)/
Display horizontal sync signal input pin (for External sync)
General-purpose I/O port (3V pin)
O
Display enable display period output pin
General-purpose I/O port (3V pin)
O
CCLK
–
204
REFOUT
–
T
Clamp level output pin
203
AVR3
–
S
"L" side reference voltage for NTSC A/D converter pin
For capture, capture clock input pin
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
31
MB91590 Series
I/O
Polarity circuit
types*1
Function *2
Pin no.
Pin Name
205
VIN
–
S
NTSC signal input pin
111
AVCC5
–
–
AD convertor analog power supply pin
201, 207
AVCC3
–
–
For NTSC, AD convertor analog power supply pin
112
AVRH5
–
–
AD convertor upper limit reference voltage pin
113
AVSS5/
AVRL5
–
–
AD convertor GND/ AD convertor lower limit reference
voltage pin
202, 206
AVSS3
–
–
NTSC AD convertor GND pin
124
C_1
–
–
Built-in regulator capacitor connected pin 1
73
C_2
–
–
Built-in regulator capacitor connected pin 2
20
C_3
–
–
Built-in regulator capacitor connected pin 3
126,
136,146,
156
DVCC
–
–
SMC large current port power supply pin
125, 135,
145, 155
DVSS
–
–
SMC large current port GND pin
89, 105,
122, 173
VCC5
–
–
+5.0v power supply pin
1, 18, 37,
53, 71,
175, 189
VCC3
–
–
+3.3v power supply pin
19, 36,
52, 72,
82, 88,
VSS
–
–
GND pin
104, 123,
174, 188,
208
*1: For the I/O circuit types, see “ I/O CIRCUIT TYPE”.
*2: For switching, see “I/O Port” of HARDWARE MANUAL.
32
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
I/O CIRCUIT TYPE
Type
A
Circuit
Remarks
Pull-up control
Digital output
Digital output
Pull-down control
• General-purpose I/O port
• Output 1mA,2mA
• Pull-up resistor control 50kΩ
• Pull-down resistor control 50kΩ
• CMOS input
• Schmitt input
• TTL input
• Automotive input
CMOS-hys input
Standby control
CMOS input
Standby control
Automotive input
Standby control
TTL input
Standby control
C
Pull-up control
Digital output
Digital output
Pull-down control
• Analog I/O, General-purpose I/O port
• Output 1mA,2mA
• Pull-up resistor control 50kΩ
• Pull-down resistor control 50kΩ
• CMOS input
• Schmitt input
• TTL input
• Automotive input
CMOS-hys input
Standby control
CMOS input
Standby control
Automotive input
Standby control
TTL input
Standby control
Analog input
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
33
MB91590 Series
Type
E
Circuit
Remarks
Pull-up control
Digital output
Digital output
Pull-down control
• Analog input, General-purpose I/O port
• Output 1mA,2mA,30mA (large current for SMC)
• Pull-up resistor control 50kΩ
• Pull-down resistor control 50kΩ
• CMOS input
• Schmitt input
• TTL input
• Automotive input
CMOS-hys input
Stnadby control
CMOS input
Stnadby control
Automotive input
Stnadby control
TTL input
Stnadby control
Analog input
F1
• Schmitt input
• Pull-up resistor control 50kΩ (5V cont)
CMOS-hys input
F2
• Schmitt input
• Pull-down resistor control 50kΩ (5V cont)
CMOS-hys input
G
• Open-drain I/O
• Output 25mA (NOD)
• TTL input
TTL input
J
Automotive input
Automotive input
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Type
Circuit
Remarks
K
Pull-up control
Digital output
Digital output
Pull-down control
• Analog input, General-purpose I/O port
• Output 1mA,2mA,3mA(I2C)
• Pull-up resistor control 50kΩ
• Pull-down resistor control 50kΩ
• CMOS input
• Schmitt input
• TTL input
• Automotive input
CMOS-hys input
Standby control
CMOS input
Standby control
Automotive input
Standby control
TTL input
Standby control
Analog input
L
Input
Main oscillation I/O
Standby control
N
Input
Sub oscillation I/O
Standby control
O
Pull-up control
Digital output
Digital output
• Analog input, 3.3V General-purpose I/O port
• Output 2mA,5mA,10mA and 20mA
• Pull-up resistor control 33kΩ
• Pull-down resistor control 33kΩ
• Schmitt input
• TTL input
Pull-down control
CMOS-hys input
Standby control
TTL input
Standby control
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
35
MB91590 Series
Type
Circuit
Remarks
• Mode I/O
• Schmitt input
P
Mode input
Control
S
Analog input
Analog input(3V)
Analog output(3V)
T
Analog output
36
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
HANDLING PRECAUTIONS
Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly
affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This
page describes precautions that must be observed to minimize the chance of failure and to obtain higher
reliability from your FUJITSU SEMICONDUCTOR semiconductor devices.
1. Precautions for Product Design
This section describes precautions when designing electronic equipment using semiconductor devices.
Absolute Maximum Ratings
Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature,
etc.) in excess of certain established limits, called absolute maximum ratings. Do not exceed these ratings.
Recommended Operating Conditions
Recommended operating conditions are normal operating ranges for the semiconductor device. All the
device's electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside these
ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data
sheet. Users considering application outside the listed conditions are advised to contact their sales
representative beforehand.
Processing and Protection of Pins
These precautions must be followed when handling the pins which connect semiconductor devices to power
supply and input/output functions.
(1) Preventing Over-Voltage and Over-Current Conditions
Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause
deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to
prevent such overvoltage or over-current conditions at the design stage.
(2) Protection of Output Pins
Shorting of output pins to supply pins or other output pins, or connection to large capacitance can
cause large current flows. Such conditions if present for extended periods of time can damage the
device.
Therefore, avoid this type of connection.
(3) Handling of Unused Input Pins
Unconnected input pins with very high impedance levels can adversely affect stability of operation.
Such pins should be connected through an appropriate resistance to a power supply pin or ground pin.
Code: DS00-00004-1E
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MB91590 Series
Latch-up
Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When
subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may
be formed, causing large current levels in excess of several hundred mA to flow continuously at the power
supply pin. This condition is called latch-up.
CAUTION: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but
can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the
following:
(1) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include
attention to abnormal noise, surge levels, etc.
(2) Be sure that abnormal current flows do not occur during the power-on sequence.
Observance of Safety Regulations and Standards
Most countries in the world have established standards and regulations regarding safety, protection from
electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards
in the design of products.
Fail-Safe Design
Any semiconductor devices have inherently a certain rate of failure. You must protect against injury,
damage or loss from such failures by incorporating safety design measures into your facility and equipment
such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating
conditions.
Precautions Related to Usage of Devices
FUJITSU SEMICONDUCTOR semiconductor devices are intended for use in standard applications
(computers, office automation and other office equipment, industrial, communications, and measurement
equipment, personal or household devices, etc.).
CAUTION: Customers considering the use of our products in special applications where failure or
abnormal operation may directly affect human lives or cause physical injury or property damage, or where
extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea
floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult
with sales representatives before such use. The company will not be responsible for damages arising from
such use without prior approval.
38
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
2. Precautions for Package Mounting
Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance
during soldering, you should only mount under FUJITSU SEMICONDUCTOR's recommended conditions.
For detailed information about mount conditions, contact your sales representative.
Lead Insertion Type
Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct
soldering on the board, or mounting by using a socket.
Direct mounting onto boards normally involves processes for inserting leads into through-holes on the
board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the
soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for
storage temperature. Mounting processes should conform to FUJITSU SEMICONDUCTOR recommended
mounting conditions.
If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can
lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment
of socket contacts and IC leads be verified before mounting.
Surface Mount Type
Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are
more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in
increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges.
You must use appropriate mounting techniques. FUJITSU SEMICONDUCTOR recommends the solder
reflow method, and has established a ranking of mounting conditions for each product. Users are advised to
mount packages in accordance with FUJITSU SEMICONDUCTOR ranking of recommended conditions.
Lead-Free Packaging
CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic
soldering, junction strength may be reduced under some conditions of use.
Storage of Semiconductor Devices
Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions
will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed
moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent,
do the following:
(1) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product.
Store products in locations where temperature changes are slight.
(2) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at
temperatures between 5°C and 30°C.
When you open Dry Package that recommends humidity 40% to 70% relative humidity.
(3) When necessary, FUJITSU SEMICONDUCTOR packages semiconductor devices in highly
moisture-resistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their
aluminum laminate bags for storage.
(4) Avoid storing packages where they are exposed to corrosive gases or high levels of dust.
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
39
MB91590 Series
Baking
Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU
SEMICONDUCTOR recommended conditions for baking.
Condition: 125°C/24 h
Static Electricity
Because semiconductor devices are particularly susceptible to damage by static electricity, you must take
the following precautions:
(1) Maintain relative humidity in the working environment between 40% and 70%.
Use of an apparatus for ion generation may be needed to remove electricity.
(2) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment.
(3) Eliminate static body electricity by the use of rings or bracelets connected to ground through high
resistance (on the level of 1 MΩ).
Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize
shock loads is recommended.
(4) Ground all fixtures and instruments, or protect with anti-static measures.
(5) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board
assemblies.
40
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
3. Precautions for Use Environment
Reliability of semiconductor devices depends on ambient temperature and other conditions as described
above.
For reliable performance, do the following:
(1) Humidity
Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high
humidity levels are anticipated, consider anti-humidity processing.
(2) Discharge of Static Electricity
When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation.
In such cases, use anti-static measures or processing to prevent discharges.
(3) Corrosive Gases, Dust, or Oil
Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely
affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to
protect the devices.
(4) Radiation, Including Cosmic Radiation
Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users
should provide shielding as appropriate.
(5) Smoke, Flame
CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible
substances. If devices begin to smoke or burn, there is danger of the release of toxic gases.
Customers considering the use of FUJITSU SEMICONDUCTOR products in other special environmental
conditions should consult with sales representatives.
Please check the latest handling precautions at the following URL.
http://edevice.fujitsu.com/fj/handling-e.pdf
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
41
MB91590 Series
HANDLING DEVICES
This section explains the latch-up prevention and treatment of a pin.
For latch-up prevention
If a voltage higher than VCC or a voltage lower than VSS is applied to an I/O pin, or if a voltage exceeding
the ratings is applied between VCC pin and VSS pin, a latch-up may occur in CMOS IC. If the latch-up
occurs, the power supply current increases excessively and device elements may be damaged by heat. Take
care to prevent any voltage from exceeding the maximum ratings in device application.
Also, the analog power supply (AVCC5, AVRH5), the NTSC power supply (AVCC3, AVR3), analog input
and power supply to high-current output buffer pins must not be exceed the digital power supply (VCC5 or
VCC3) when the power supply to the analog system and high-current output buffer pins is turned on or off.
In the correct power-on sequence of the microcontroller, turn on the digital power supply (VCC5), analog
power supplies (AVCC5, AVRH5), and the power supply of high-current output buffer pins (DVCC)
simultaneously. Or, turn on the digital power supply (VCC5), and then turn on analog power supplies
(AVCC5, AVRH5) and the power supply of high-current output buffer pins (DVCC).
In the correct power-on sequence of GDC, similarly turn on the digital power supply (VCC3) and the NTSC
analog power supply (AVCC3) simultaneously. Or, turn on the digital power supply (VCC3), and then turn
on the NTSC analog power supply (AVCC3).
Treatment of unused pins
If unused input pins are left open, they may cause a permanent damage to the device due to malfunction or
latch-up. Connect a 2kΩ resistor to each of unused pins for pull-up or pull-down processing.
Also, if I/O pins are not used, they must be set to the output state for opening or they must be set to the
input state and treated in the same way as for the input pins.
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Power supply pins
The device is designed to ensure that if the device contains multiple VCC pin or VSS pin, the pins that
should be at the same potential are interconnected to prevent latch-up or other malfunctions. Further,
connect these pins to an external power supply or ground to reduce unwanted radiation, prevent strobe
signals from malfunctioning due to a raised ground level, and fulfill the total output current standard, etc.
As shown in figure 1, all Vss power supply pins must be treated in the similar way. If multiple Vcc or Vss
systems are connected, the device cannot operate correctly even within the guaranteed operating range.
Figure 1 Power Supply Input Pins
Vcc
Vss
Vss
Vcc
Vss
Vcc
Vcc
Vss
Vss
Vcc
The power supply pins should be connected to VCC pin and VSS pin of this device at the low impedance
from the power supply source.
In the area close to this device, a ceramic capacitor having the capacitance larger than the capacitor of C pin
is recommended to use as a bypass capacitor between theVCC pin and the VSS pin.
Crystal oscillation circuit
An external noise to the X0 pin or X1 pin may cause a device malfunction. The printed circuit board must
be designed to lay out the X0 pin and the X1 pin, crystal oscillator (or ceramic resonator), and the bypass
capacitor to be grounded to the close position to the device.
The printed circuit board artwork is recommended to surround the X0 pin and X1 pin by ground circuits.
Mode pins (MD2, MD1, MD0)
Connect the MD2, MD1and MD0 mode pin to the VCC pin or VSS pin directly. To prevent an erroneous
selection of test mode caused by the noise, reduce the pattern length between each mode pin and the VCC
pin or VSS pin on the printed circuit board. Also, use the low-impedance pin connection.
During power-on
To prevent a malfunction of the voltage step-down circuit built in the device, set the voltage rising time to
have 50μs or longer (between 0.2V and 2.7V) during power-on.
Notes during PLL clock operation
When the PLL clock is selected and if the oscillator is disconnected or if the input is stopped, this clock
may continue to operate at the free running frequency of the self oscillator circuit built in the PLL clock.
This operation is not guaranteed.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
43
MB91590 Series
Treatment of A/D converter power supply pins
Connect the pins to have AVCC5=AVRH5=VCC5 and AVSS5/AVRL5=VSS even if the A/D converter is
not used.
Also, similarly connect the pins of NTSC A/D converter power supply to have AVCC3=VCC3 and
AVSS3=VSS. At this time, open VIN/REFOUT.
Notes on using external clock
An external clock is not supported. None of the external direct clock input can be used for both main clock
and sub clock.
Power-on sequence of A/D converter analog inputs
Be sure to turn on the digital power supply (Vcc5) first, and then turn on the A/D converter power supplies
(AVcc5, AVRH5, AVRL5) and analog inputs (AN0 to AN31). Also, turn off the A/D converter power
supplies and analog inputs first, and then turn off the digital power supply (Vcc5). When the AVRH5 pin
voltage is turned on or off, it must not exceed AVCC5. Even if a common analog input pin is used as an
input port, its input voltage must not exceed AVcc5. (However, the analog power supply and digital power
supply can be turned on or off simultaneously.)
Be sure to similarly turn on the digital power supply (VCC3) first, and then turn on the A/D converter
power supply (AVCC3) for NTSC and NTSC inputs (VIN, AVR). Also, turn off the A/D converter power
supplies and analog inputs first, and then turn off the digital power supply (VCC3).
Treatment of power supplies for high current output buffer pins (DVcc,
DVss)
Be sure to turn on the digital power supply (Vcc) first, and then turn on the power supplies for high current
output buffer pins (DVcc, DVss). Also, turn off the power supplies for high current output buffer pins first,
and then turn off the digital power supply (Vcc).
Even if the high current output buffer pins are used as general-purpose ports, the power supplies of high
current output buffer pins (DVcc, DVss) must be powered. (The power supplies of high current output
buffer pins and the digital power supplies can be turned on or off simultaneously. )
Treatment of C pin
This device contains a voltage step-down circuit. A capacitor must always be connected to the C pin to
assure the internal stabilization of the device. For the standard values, see the "Recommended Operating
Conditions" of the latest data sheet.
Function switching of a multiplexed port
To switch between the port function and the multiplexed pin function, use the PFR (port function
register).
Low-power consumption mode
To transit to the sleep mode, watch mode, stop mode, watch mode(power-off) or stop mode(power-off),
follow the procedure explained in the "Activating the sleep mode, watch mode, or stop mode" or the
"Activating the watch mode (power-off) or stop mode(power-off)" of " POWER CONSUMPTION
CONTROL".
Power supply for GDC can be turned off separately from the microcontroller.
Take the following notes when using a monitor debugger.
· Do not set a break point for the low-power consumption transition program.
· Do not execute an operation step for the low-power consumption transition program.
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Precautions when writing to registers including the status flag
When writing data in the register that has a status flag (especially, an interrupt request flag) to control
function, taking care not to clear its status flag erroneously must be followed.
The program must be written not to clear the flag to the status bit, and then to set the control bits to have the
desired value.
Especially, if multiple control bits are used, the bit instruction cannot be used. (The bit instruction can
access to a single bit only.) By the Byte, Half-word, or Word access, data is written to the control bits and
status flag simultaneously. During this time, take care not to clear other bits (in this case, the bits of status
flag) erroneously.
Note: These points can be ignored because the bit instructions to a register which supports RMW are
already taken the points into consideration. Care must be taken when the bit instruction is used to a
register which does not support RMW.
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
45
MB91590 Series
clamp
ADC
FR81S CPU Core
NTSC
Decoder
Video
capture
Frame buffer
Regulator
MPU
Power-on Reset
Instruction
External
I/O ( Digital RGB)
Pixel
FIFO
Debug Interface
Data
CR oscillator
Line
Buffer
Line
Engine
Sprite
Engine
Wild register
XBS
Camera
XBS Crossbar Switch
Display
Controller
LCD
RAM
Command
decoder
RAM
Bus Bridge
AHB
bus
bridge
asynchro
nous
type
SIG
RLD
DMA
Flash
· Main Flash
· WorkFlash 64KB
From Master
On chip bus layer 2
To Slave
From Master
On chip bus layer 1
To Slave
Ext.
BUS
On chip bus
I/O
BLOCK DIAGRAM
Bus master
Ext.bus I/F
RAM ECC Control
(XBS -RAM)
DMAC
Regi ster
Peripheral Bus
Bridge
CAN (3ch)
I/O (Ext. bus)
Bus bridge
External bus pin
(For GDC external memory)
RDY, A00-24,
WEX,REX,
CS0X,CS1X,
D0-15
16
Bus performance
counter
32
Operation mode
register
RAM ECC Backup
-RAM
Control
MD0,MD1,MD2,P127
RTC/WDT1 Calibration
I/O port setting
SOT2-7,SIN2-7,
Lin-UART (6ch)
SCK2-7
I/O Port
FRCK0-1
ICU0-5
OCU0-3
TIOA0-1,
TIOB0-1
TRG0-5,
PPG0-23
ADTG, AN0-31
Multi-function serial interface (2ch)
Free-run timer (2ch)
Input capture (6ch)
Output compare(4ch)
Base-timer (2ch)
16-bit Peripheral bus
SOT0-1,SIN0-1,
SCK0-1
Asynchronous BUS
bridge
(PCLK1 ↔ PCLK2)
CRC
Sound generator (5ch)
SGO0-4,SGA0-4
I/O Port
CAN Prescaler
16-bit Peripheral bus
32-bit Peripheral bus
Asynchronous BUS
bridge
(PCLK1 ↔ PCLK2)
CANRX0-2,
CANTX0-2
External
FLASH
memory
(For video)
Bus Bridge
(32-bit → 16-bit)
External interrupt input (16ch)
PPG (24ch)
Real time clock
A/D converter
Clock supervisor
INT0-15,
Input interception
inhibiting signal
WOT
GDC external control
NMI
Stepping motor controller (6ch)
NMIX
Low-voltage detection (Int. power supply low-voltage detection)
PWM1M0-5,
Low-voltage detection (Ext. power supply low-voltage detection)
PWM1P0-5,
PWM2M0-5
Clock control
(Clock setting, Main timer, Sub timer, PLL timer)
Reload timer (4ch)
TIN0-3,TOT0-3
Watchdog timer (SW and HW)
Clock control (divide setting),
Reset control,
Low-power consumption
control
RSTX
Delay interrupt
Generation and clear of DMA transfer request
Interrupt controller
Interrupt request batch read
46
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
MEMORY MAP
Memory map
MB91F599B/S,
MB91F599BH/S,
MB91F594B/S,
MB91F594BH/S
0000 0000H
0000 4000H
0000 6000H
I/O
Back up RAM (8KB)
I/O
0001 0000H
RAM (64KB)
0002 0000H
Reserved
0003 0000H
AHB
Access inhibit
0007 0000H
Flash memory
(1024+64) KB
0018 0000H
0023 0000H
0024 0000H
Access inhibit
WorkFlash (64KB)
Access inhibit
0040 0000H
AHB
GDC control +
External area (96MB)
0640 0000H
8000 0000H
Access inhibit
FFFF FFFFH
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
47
MB91590 Series
GDC memory map
MB91F599B/S,
MB91F599BH/S,
MB91F594B/S,
MB91F594BH/S
GDC Block
0040 0000H
004C 8000H
00C0 0000H
00C0 2000H
00E0 0000H
0230
0239
023A
023B
023B
023B
023B
023B
023B
023B
023B
023B
023C
023D
023D
023E
023F
023F
0240
0000H
F000H
0000H
0000H
1000H
2000H
3000H
4000H
5000H
6000H
7000H
8000H
0000H
0000H
8000H
0000H
0000H
8000H
0000H
063F FFFCH
0000 0000H
Video RAM (800KB)
0000 4000H
0000 6000H
Reserved
Command RAM
(8KB)
Reserved
I/O
Back up RAM (8KB)
I/O
0001 0000H
RAM (64KB)
Access prohibit
0002 0000H
Reserved (636KB)
Reserved
Command (4KB)
Reserved (64KB)
0003 0000H
SIG (4KB)
AHB
NTSC (4KB)
MCNT (4KB)
MEMC (4KB)
GDC I/O
Access inhibit
HDMAC (4KB)
RLD (4KB)
Reserved (64KB)
0007 0000H
CMDSEQ (4KB)
Flash memory
(1024+64) KB
SPRITE (32KB)
GDC_Bridge (64KB)
Display (32KB)
Capture (32KB)
Reserved (64KB)
0018 0000H
Draw (32KB)
Reserved (32KB)
0023 0000H
External FLASH
(64MB)
0024 0000H
0040 0000H
Access inhibit
WorkFlash (64KB)
Access inhibit
GDC control +
External area
(96MB)
AHB
0640 0000H
8000 0000H
Access inhibit
FFFF FFFFH
Note: The GDC area is executed mapping with the little endian.
48
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Memory map
MB91F597B/S,
MB91F597BH/S,
MB91F592B/S,
MB91F592BH/S
0000 0000H
0000 4000H
0000 6000H
I/O
Back up RAM (8KB)
I/O
0001 0000H
RAM (40KB)
0001 A000H
Reserved
0003 0000H
AHB
Access inhibit
0007 0000H
Flash memory
(512+64) KB
0010 0000H
0023 0000H
0024 0000H
Access inhibit
WorkFlash (64KB)
Access inhibit
0040 0000H
AHB
GDC control +
External area (96MB)
0640 0000H
8000 0000H
Access inhibit
FFFF FFFFH
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
49
MB91590 Series
GDC memory map
MB91F597B/S,
MB91F597BH/S,
MB91F592B/S,
MB91F592BH/S
GDC Block
0040 0000H
004C 8000H
00C0 0000H
00C0 2000H
00E0 0000H
0230
0239
023A
023B
023B
023B
023B
023B
023B
023B
023B
023B
023C
023D
023D
023E
023F
023F
0240
0000H
F000H
0000H
0000H
1000H
2000H
3000H
4000H
5000H
6000H
7000H
8000H
0000H
0000H
8000H
0000H
0000H
8000H
0000H
063F FFFCH
0000 0000H
Video RAM (800KB)
0000 4000H
0000 6000H
Reserved
Command RAM
(8KB)
Reserved
I/O
Back up RAM (8KB)
I/O
0001 0000H
RAM (40KB)
Access inhibit
0001 A000H
Reserved (636KB)
Reserved
Command( 4KB)
Reserved (64KB)
0003 0000H
SIG (4KB)
AHB
NTSC (4KB)
MCNT (4KB)
MEMC (4KB)
GDC I/O
Access inhibit
HDMAC (4KB)
RLD (4KB)
Reserved (64KB)
0007 0000H
CMDSEQ (4KB)
Flash memory
(512+64) KB
SPRITE (32KB)
GDC_Bridge (64KB)
Display (32KB)
Capture (32KB)
Reserved (64KB)
0010 0000H
Draw (32KB)
Reserved (32KB)
0023 0000H
External FLASH
(64MB)
0024 0000H
0040 0000H
Access inhibit
WorkFlash (64KB)
Access inhibit
GDC control +
External area
(96MB)
AHB
0640 0000H
8000 0000H
Access inhibit
FFFF FFFFH
Note: The GDC area is executed mapping with the little endian.
50
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Memory map
MB91F596B/S,
MB91F596BH/S,
MB91F591B/S,
MB91F591BH/S
0000 0000H
0000 4000H
0000 6000H
I/O
Back up RAM (8KB)
I/O
0001 0000H
RAM (40KB)
0001 A000H
Reserved
0003 0000H
AHB
Access inhibit
0007 0000H
Flash memory
(512+64) KB
0010 0000H
0023 0000H
0024 0000H
Access inhibit
WorkFlash (64KB)
Access inhibit
0040 0000H
AHB
GDC control +
External area (96MB)
0640 0000H
8000 0000H
Access inhibit
FFFF FFFFH
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
51
MB91590 Series
GDC memory map
MB91F596B/S,
MB91F596BH/S,
MB91F591B/S,
MB91F591BH/S
GDC Block
0040 0000H
0044 1000H
00C0 0000H
00C0 2000H
00E0 0000H
0230
0239
023A
023B
023B
023B
023B
023B
023B
023B
023B
023B
023C
023D
023D
023E
023F
023F
0240
0000H
F000H
0000H
0000H
1000H
2000H
3000H
4000H
5000H
6000H
7000H
8000H
0000H
0000H
8000H
0000H
0000H
8000H
0000H
063F FFFCH
0000 0000H
Video RAM (260KB)
0000 4000H
0000 6000H
Reserved
Command RAM
(8KB)
Reserved
I/O
Back up RAM (8KB)
I/O
0001 0000H
RAM (40KB)
Access prohibit
0001 A000H
Reserved (636KB)
Reserved
Command (4KB)
Reserved (64KB)
0003 0000H
SIG (4KB)
AHB
NTSC (4KB)
MCNT (4KB)
MEMC (4KB)
GDC I/O
Access inhibit
HDMAC (4KB)
RLD (4KB)
Reserved (64KB)
0007 0000H
CMDSEQ (4KB)
Flash memory
(512+64) KB
SPRITE (32KB)
GDC_Bridge (64KB)
Display (32KB)
Capture (32KB)
Reserved (64KB)
0010 0000H
Draw (32KB)
Reserved (32KB)
0023 0000H
External FLASH
(64MB)
0024 0000H
0040 0000H
Access inhibit
WorkFlash (64KB)
Access inhibit
GDC control +
External area
(96MB)
AHB
0640 0000H
8000 0000H
Access inhibit
FFFF FFFFH
Note: The GDC area is executed mapping with the little endian.
52
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
I/O MAP
The following I/O map shows the relationship between memory space and registers for peripheral
resources.
• Legend of I/O Map
Read/Write attribute (R: Read W: Write)
Address
000090H
000094 H
000098 H
00009C H
0000A8 H
+3
BT1TMR[R] H
BT1TMCR[R/W]B,H,W
0000000000000000
00000000 00000000
BT1STC[R/W]
-
-
B00000000
Base timer 1
BT1PDU T/BT1PRLH/BT1DTBF[R/W] H
0000000000000000
0000000000000000
BTSEL[R/W] B
BTSSSR[W] B,H
-
----000 0
Block
-
BT1PCSR/BT1PRLL[R /W] H
-------- ------11
ADERH [R/W]B, H, W
0000A0 H
0000A4 H
Address offset value/ register name
+1
+2
+0
ADERL [R/W]B, H, W
00000000 00000000
00000000 00000000
ADCS1 [R/W] B, H,W
ADCS0 [R/W] B, H,W
ADCR1 [R] B, H,W
ADCR0 [R] B, H,W
00000000
00000000
------XX
XXXXX XXX
ADCT1 [R/W] B, H,W
ADCT0 [R/W] B, H,W
ADSCH [R/W] B, H,W
ADECH [R/W] B, H,W
00010000
00101100
---00000
---00000
A/D converter
Data access attribute
B: Byte
H: Half-word
W: Word
(Note)The access by the data
access attribute not described
is disabled.
Initial register value after reset
The initial register value after reset indicates as follows:
·
·
·
·
·
"1": Initial value "1"
"0": Initial value "0"
"X": Initial value undefined
"-": Reserved bit/Undefined bit
"*": Initial value "0" or "1" according to the setting
Note: The access by the data access attribute not described is disabled.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
53
MB91590 Series
• I/O Map
Address
Address offset value / Register name
Block
+0
+1
+2
+3
000000H
PDR00[R/W]
B,H,W
XXXXXXXX
PDR01[R/W]
B,H,W
XXXXXXXX
PDR02[R/W]
B,H,W
XXXXXXXX
PDR03[R/W]
B,H,W
XXXXXXXX
000004H
PDR04[R/W]
B,H,W
XXXXXXXX
PDR05[R/W]
B,H,W
XXXXXXXX
PDR06[R/W]
B,H,W
XXXXXXXX
PDR07[R/W]
B,H,W
XXXXXXXX
000008H
PDR08[R/W]
B,H,W
XXXXXXXX
PDR09[R/W]
B,H,W
XXXXXXXX
PDR10[R/W]
B,H,W
XXXXXXXX
PDR11[R/W]
B,H,W
XXXXXXXX
00000CH
PDR12[R/W]
B,H,W
XXXXXXXX
PDR13[R/W]
B,H,W
XX-XXXXX
―
―
000010H
PDRA[R/W]
B,H,W
XXXXXX--
PDRB[R/W]
B,H,W
XXXXXX--
PDRC[R/W]
B,H,W
XXXXXX--
PDRD[R/W]
B,H,W
XXXXXX--
000014H
PDRE[R/W]
B,H,W
XXXXXX--
PDRF[R/W]
B,H,W
XXXXXX--
PDRG[R/W]
B,H,W
XXXXXXXX
PDRH[R/W]
B,H,W
----X---
000018H
to
000028H
―
―
―
―
Reserved
00002CH
to
000030H
―
―
―
―
Reserved
000034H
to
000038H
―
―
―
―
Reserved
00003CH
WDTCR0[R/W]
B,H,W
-0--0000
WDTCPR0[W]
B,H,W
00000000
WDTCR1[R]
B,H,W
----0110
WDTCPR1[W]
B,H,W
00000000
Watchdog timer [S]
000040H
―
―
―
―
Reserved
000044H
DICR [R/W]
B
XXXXXXX0
―
―
―
Delay interrupt
000048H
to
00005CH
―
―
―
―
Reserved
000060H
TMRLRA0 [R/W] H
XXXXXXXX XXXXXXXX
TMR0 [R] H
XXXXXXXX XXXXXXXX
000064H
TMRLRB0 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR0 [R/W] B, H,W
00000000 0-000000
000068H
to
00007CH
―
―
54
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
―
Port data register
Reload timer 0
Reserved
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
000080H
BT0TMR [R] H
0000000000000000
000084H
―
BT0STC
[R/W] B
0000-000
000088H
BT0PCSR/BT0PRLL
[R/W] H
0000000000000000
00008CH
―
000090H
BT1TMR [R] H
0000000000000000
000094H
―
000098H
BT1PCSR/BT1PRLL
[R/W] H
0000000000000000
00009CH
0000A0H
BTSEL01
[R/W] B
----0000
―
BT1STC
[R/W] B
0000-000
+2
Block
BT0TMCR [R/W] H
-0000000 00000000
―
―
Base timer 0
BT0PDUT/BT0PRLH/BT0DTBF
[R/W] H
0000000000000000
―
―
BT1TMCR [R/W] H
-0000000 00000000
―
―
Base timer 1
BT1PDUT/BT1PRLH/BT1DTBF
[R/W] H
0000000000000000
BTSSSR
[W] B,H
-------- ------11
―
ADERH [R/W] B, H, W
00000000 00000000
+3
Base timer 0,1
ADERL [R/W] B, H, W
00000000 00000000
0000A4H
ADCS1
[R/W] B, H,W
0000000-
ADCS0
[R/W] B, H,W
00000000
ADCR1
[R] B, H,W
------XX
ADCR0
[R] B, H,W
XXXXXXXX
0000A8H
ADCT1 [R/W]
B, H,W
00010000
ADCT0 [R/W]
B, H,W
00101100
ADSCH [R/W]
B, H,W
---00000
ADECH [R/W]
B, H,W
---00000
0000ACH
―
―
―
―
Reserved
0000B0H
SCR0/(IBCR0)
[R/W] B,H,W
0--00000
SMR0
[R/W] B,H,W
000-0000
SSR0
[R/W] B,H,W
0-000011
ESCR0/(IBSR0)
[R/W] B,H,W
-0000000
Multi-UART0
0000B4H
RDR0/(TDR0)[R/W] B,H,W *1
-------0 00000000
BGR0 [R/W] H,W
00000000 00000000
0000B8H
― / (ISMK0)
[R/W] B,H,W
-------- *2
― / (ISBA0)
[R/W] B,H,W
-------- *2
―
―
0000BCH
FCR10 [R/W]
B,H,W
---00100
FCR00 [R/W]
B,H,W
-0000000
FBYTE20
[R/W] B,H,W
00000000
FBYTE10
[R/W] B,H,W
00000000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
A/D converter
*1 : Byte access is
possible only for
access to lower 8 bits
*2 : Reserved
because I2C mode is
not set immediately
after reset.
55
MB91590 Series
Address
0000C0H
Address offset value / Register name
+0
+1
+2
+3
SCR1/(IBCR1)
[R/W] B,H,W
0--00000
SMR1 [R/W]
B,H,W
000-0000
SSR1 [R/W]
B,H,W
0-000011
ESCR1/(IBSR1)
[R/W] B,H,W
-0000000
Block
Multi-UART1
*1 : Byte access is
possible only for
access to lower 8 bits
0000C4H
RDR1/(TDR1)[R/W] B,H,W *1
-------0 00000000
BGR1 [R/W] H,W
00000000 00000000
0000C8H
― / (ISMK1)
[R/W] B,H,W
-------- *2
― /( ISBA1)
[R/W] B,H,W
-------- *2
―
0000CCH
FCR11 [R/W]
B, H, W
---00100
FCR01[R/W]
B, H, W
-0000000
FBYTE21
[R/W] B,H,W
00000000
*2 : Reserved
because I2C mode is
FBYTE11[R/W] not set immediately
after reset.
B,H,W
00000000
0000D0H
SCR2 [R/W]
B, H, W
00000000
SMR2 [R/W]
B, H, W
00000000
SSR2 [R/W]
B, H, W
00001000
RDR2 /TDR2
[R/W] B, H, W
00000000
0000D4H
ESCR2 [R/W]
B, H, W
00000X00
ECCR2 [R/W]
B, H, W
-0000-XX
0000D8H
SCR3 [R/W]
B, H, W
00000000
SMR3 [R/W]
B, H, W
00000000
0000DCH
ESCR3 [R/W]
B, H, W
00000X00
ECCR3 [R/W]
B, H, W
-0000-XX
0000E0H
SCR4 [R/W]
B, H, W
00000000
SMR4 [R/W]
B, H, W
00000000
0000E4H
ESCR4 [R/W]
B, H, W
00000X00
ECCR4 [R/W]
B, H, W
-0000-XX
0000E8H
SCR5 [R/W]
B, H, W
00000000
SMR5 [R/W]
B, H, W
00000000
0000ECH
ESCR5 [R/W]
B, H, W
00000X00
ECCR5 [R/W]
B, H, W
-0000-XX
0000F0H
SCR6 [R/W]
B, H, W
00000000
SMR6 [R/W]
B, H, W
00000000
0000F4H
ESCR6 [R/W]
B, H, W
00000X00
ECCR6 [R/W]
B, H, W
-0000-XX
0000F8H
SCR7 [R/W]
B, H, W
00000000
SMR7 [R/W]
B, H, W
00000000
0000FCH
ESCR7 [R/W]
B, H, W
00000X00
ECCR7 [R/W]
B, H, W
-0000-XX
56
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
LIN-UART2
BGR2 [R/W] B, H, W
-0000000 00000000
SSR3 [R/W]
B, H, W
00001000
RDR3 /TDR3
[R/W] B, H, W
00000000
LIN-UART3
BGR3 [R/W] B, H, W
-0000000 00000000
SSR4 [R/W]
B, H, W
00001000
RDR4 /TDR4
[R/W] B, H, W
00000000
LIN-UART4
BGR4 [R/W] B, H, W
-0000000 00000000
SSR5 [R/W]
B, H, W
00001000
RDR5 /TDR5
[R/W] B, H, W
00000000
LIN-UART5
BGR5 [R/W] B, H, W
-0000000 00000000
SSR6 [R/W]
B, H, W
00001000
RDR6 /TDR6
[R/W] B, H, W
00000000
LIN-UART6
BGR6 [R/W] B, H, W
-0000000 00000000
SSR7 [R/W]
B, H, W
00001000
RDR7 /TDR7
[R/W] B, H, W
00000000
LIN-UART7
BGR7 [R/W] B, H, W
-0000000 00000000
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000100H
TMRLRA1 [R/W] H
XXXXXXXX XXXXXXXX
TMR1 [R] H
XXXXXXXX XXXXXXXX
000104H
TMRLRB1 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR1 [R/W] B, H,W
00000000 0-000000
000108H
TMRLRA2 [R/W] H
XXXXXXXX XXXXXXXX
TMR2 [R] H
XXXXXXXX XXXXXXXX
00010CH
TMRLRB2 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR2 [R/W] B, H,W
00000000 0-000000
000110H
TMRLRA3 [R/W] H
XXXXXXXX XXXXXXXX
TMR3 [R] H
XXXXXXXX XXXXXXXX
000114H
TMRLRB3 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR3 [R/W] B, H,W
00000000 0-000000
Block
Reload timer 1
Reload timer 2
Reload timer 3
000118H
to
000140H
―
―
―
―
Reserved
000144H
GCN13
[R/W] H
00110010 00010000
―
GCN23
[R/W] B
----0000
PPG12,13,14,15
control
000148H
GCN14
[R/W] H
00110010 00010000
―
GCN24
[R/W] B
----0000
PPG16,17,18,19
control
00014CH
GCN15
[R/W] H
00110010 00010000
―
GCN25
[R/W] B
----0000
PPG20,21,22,23
control
000150H
PTMR11 [R] H,W
11111111 11111111
PCSR11 [W] H, W
XXXXXXXX XXXXXXXX
000154H
PDUT11 [W] H,W
XXXXXXXX XXXXXXXX
PCN11 [R/W] B, H,W
0000000- 000000-0
000158H
PTMR12 [R] H,W
11111111 11111111
PCSR12 [W] H,W
XXXXXXXX XXXXXXXX
00015CH
PDUT12 [W] H,W
XXXXXXXX XXXXXXXX
PCN12 [R/W] B, H,W
0000000- 000000-0
000160H
PTMR13 [R] H,W
11111111 11111111
PCSR13 [W] H,W
XXXXXXXX XXXXXXXX
000164H
PDUT13 [W] H,W
XXXXXXXX XXXXXXXX
PCN13 [R/W] B, H,W
0000000- 000000-0
000168H
PTMR14 [R] H,W
11111111 11111111
PCSR14 [W] H,W
XXXXXXXX XXXXXXXX
00016CH
PDUT14 [W] H,W
XXXXXXXX XXXXXXXX
PCN14 [R/W] B, H,W
0000000- 000000-0
000170H
PTMR15 [R] H,W
11111111 11111111
PCSR15 [W] H,W
XXXXXXXX XXXXXXXX
000174H
PDUT15 [W] H,W
XXXXXXXX XXXXXXXX
PCN15 [R/W] B, H,W
0000000- 000000-0
000178H
PTMR16 [R] H,W
11111111 11111111
PCSR16 [W] H, W
XXXXXXXX XXXXXXXX
00017CH
PDUT16 [W] H,W
XXXXXXXX XXXXXXXX
PCN16 [R/W] B, H,W
0000000- 000000-0
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
PPG11
PPG12
PPG13
PPG14
PPG15
PPG16
57
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000180H
PTMR17 [R] H,W
11111111 11111111
PCSR17 [W] H,W
XXXXXXXX XXXXXXXX
000184H
PDUT17 [W] H,W
XXXXXXXX XXXXXXXX
PCN17 [R/W] B, H,W
0000000- 000000-0
000188H
PTMR18 [R] H,W
11111111 11111111
PCSR18 [W] H,W
XXXXXXXX XXXXXXXX
00018CH
PDUT18 [W] H,W
XXXXXXXX XXXXXXXX
PCN18 [R/W] B, H,W
0000000- 000000-0
000190H
PTMR19 [R] H,W
11111111 11111111
PCSR19 [W] H,W
XXXXXXXX XXXXXXXX
000194H
PDUT19 [W] H,W
XXXXXXXX XXXXXXXX
PCN19 [R/W] B, H,W
0000000- 000000-0
000198H
PTMR20 [R] H,W
11111111 11111111
PCSR20 [W] H,W
XXXXXXXX XXXXXXXX
00019CH
PDUT20 [W] H,W
XXXXXXXX XXXXXXXX
PCN20 [R/W] B, H,W
0000000- 000000-0
0001A0H
PTMR21 [R] H,W
11111111 11111111
PCSR21 [W] H, W
XXXXXXXX XXXXXXXX
0001A4H
PDUT21 [W] H,W
XXXXXXXX XXXXXXXX
PCN21 [R/W] B, H,W
0000000- 000000-0
0001A8H
PTMR22 [R] H,W
11111111 11111111
PCSR22 [W] H,W
XXXXXXXX XXXXXXXX
0001ACH
PDUT22 [W] H,W
XXXXXXXX XXXXXXXX
PCN22 [R/W] B, H,W
0000000- 000000-0
0001B0H
PTMR23 [R] H,W
11111111 11111111
PCSR23 [W] H,W
XXXXXXXX XXXXXXXX
0001B4H
PDUT23 [W] H,W
XXXXXXXX XXXXXXXX
PCN23 [R/W] B, H,W
0000000- 000000-0
0001B8H
to
0001FCH
000200H
000204H
000208H
00020CH
000210H
―
―
PWC20 [R/W] H,W
------XX XXXXXXXX
―
PWC0 [R/W] B
-00000--
PWC21 [R/W] H,W
------XX XXXXXXXX
―
PWC1 [R/W] B
-00000--
PWC22 [R/W] H,W
------XX XXXXXXXX
58
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
―
Block
PPG17
PPG18
PPG19
PPG20
PPG21
PPG22
PPG23
Reserved
PWC10 [R/W] H,W
------XX XXXXXXXX
PWS20 [R/W]
B,H,W
-0000000
PWS10 [R/W]
B,H,W
--000000
PWC11 [R/W] H,W
------XX XXXXXXXX
PWS21 [R/W]
B,H,W
-0000000
Stepping motor
controller
PWS11 [R/W]
B,H,W
--000000
PWC12 [R/W] H,W
------XX XXXXXXXX
DS705-00010-2v0-E
MB91590 Series
Address
000214H
000218H
00021CH
000220H
000224H
000228H
Address offset value / Register name
+0
+1
+2
+3
―
PWC2 [R/W] B
-00000--
PWS22 [R/W]
B,H,W
-0000000
PWS12 [R/W]
B,H,W
--000000
PWC23 [R/W] H,W
------XX XXXXXXXX
PWC3 [R/W] B
-00000--
―
PWC24 [R/W] H,W
------XX XXXXXXXX
PWC4 [R/W] B
-00000--
―
PWC25 [R/W] H,W
------XX XXXXXXXX
PWC13 [R/W] H,W
------XX XXXXXXXX
PWS23 [R/W]
B,H,W
-0000000
PWS13 [R/W]
B,H,W
--000000
PWC14 [R/W] H,W
------XX XXXXXXXX
PWS24 [R/W]
B,H,W
-0000000
PWC15 [R/W] H,W
------XX XXXXXXXX
―
PWC5 [R/W] B
-00000--
PWS25 [R/W]
B,H,W
-0000000
PWS15 [R/W]
B,H,W
--000000
000230H
to
00023CH
―
―
―
―
000240H
CPCLR0 [R/W] W
11111111 11111111 11111111 11111111
000244H
TCDT0 [R/W] W
00000000 00000000 00000000 00000000
TCCSH0
[R/W]B, H, W
0-----00
Stepping motor
controller
PWS14 [R/W]
B,H,W
--000000
00022CH
000248H
Block
TCCSL0
[R/W]B, H, W
-1-00000
Reserved
Free-run timer 0
―
00024CH
CPCLR1 [R/W] W
11111111 11111111 11111111 11111111
000250H
TCDT1 [R/W] W
00000000 00000000 00000000 00000000
Free-run timer 1
000254H
TCCSH1
[R/W]B, H, W
0-----00
TCCSL1
[R/W]B, H, W
-1-00000
000258H
―
―
―
―
Reserved
00025CH
GCN10 [R/W] H
00110010 00010000
―
GCN20 [R/W] B
----0000
PPG0,1,2,3 control
000260H
GCN11 [R/W] H
00110010 00010000
―
GCN21 [R/W] B
----0000
PPG4,5,6,7 control
000264H
GCN12 [R/W] H
00110010 00010000
―
GCN22 [R/W] B
PPG8,9,10,11 control
----0000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
59
MB91590 Series
Address
000268H
Address offset value / Register name
+0
+1
+2
+3
―
―
―
PPGDIV [R/W]
B
------00
00026CH
PTMR0 [R] H,W
11111111 11111111
PCSR0 [W] H,W
XXXXXXXX XXXXXXXX
000270H
PDUT0 [W] H,W
XXXXXXXX XXXXXXXX
PCN0 [R/W] B, H,W
0000000- 000000-0
000274H
PTMR1 [R] H,W
11111111 11111111
PCSR1 [W] H, W
XXXXXXXX XXXXXXXX
000278H
PDUT1 [W] H,W
XXXXXXXX XXXXXXXX
PCN1 [R/W] B, H,W
0000000- 000000-0
00027CH
PTMR2 [R] H,W
11111111 11111111
PCSR2 [W] H,W
XXXXXXXX XXXXXXXX
000280H
PDUT2 [W] H,W
XXXXXXXX XXXXXXXX
PCN2 [R/W] B, H,W
0000000- 000000-0
000284H
PTMR3 [R] H,W
11111111 11111111
PCSR3 [W] H,W
XXXXXXXX XXXXXXXX
000288H
PDUT3 [W] H,W
XXXXXXXX XXXXXXXX
PCN3 [R/W] B, H,W
0000000- 000000-0
00028CH
PTMR4 [R] H,W
11111111 11111111
PCSR4 [W] H,W
XXXXXXXX XXXXXXXX
000290H
PDUT4 [W] H,W
XXXXXXXX XXXXXXXX
PCN4 [R/W] B, H,W
0000000- 000000-0
000294H
PTMR5 [R] H,W
11111111 11111111
PCSR5 [W] H,W
XXXXXXXX XXXXXXXX
000298H
PDUT5 [W] H,W
XXXXXXXX XXXXXXXX
PCN5 [R/W] B, H,W
0000000- 000000-0
00029CH
PTMR6 [R] H,W
11111111 11111111
PCSR6 [W] H,W
XXXXXXXX XXXXXXXX
0002A0H
PDUT6 [W] H,W
XXXXXXXX XXXXXXXX
PCN6 [R/W] B, H,W
0000000- 000000-0
0002A4H
PTMR7 [R] H,W
11111111 11111111
PCSR7 [W] H,W
XXXXXXXX XXXXXXXX
0002A8H
PDUT7 [W] H,W
XXXXXXXX XXXXXXXX
PCN7 [R/W] B, H,W
0000000- 000000-0
0002ACH
PTMR8 [R] H,W
11111111 11111111
PCSR8 [W] H,W
XXXXXXXX XXXXXXXX
0002B0H
PDUT8 [W] H,W
XXXXXXXX XXXXXXXX
PCN8 [R/W] B, H,W
0000000- 000000-0
0002B4H
PTMR9 [R] H,W
11111111 11111111
PCSR9 [W] H,W
XXXXXXXX XXXXXXXX
0002B8H
PDUT9 [W] H,W
XXXXXXXX XXXXXXXX
PCN9 [R/W] B, H,W
0000000- 000000-0
0002BCH
PTMR10 [R] H,W
11111111 11111111
PCSR10 [W] H,W
XXXXXXXX XXXXXXXX
0002C0H
PDUT10 [W] H,W
XXXXXXXX XXXXXXXX
PCN10 [R/W] B, H,W
0000000- 000000-0
60
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
PPG0
PPG1
PPG2
PPG3
PPG4
PPG5
PPG6
PPG7
PPG8
PPG9
PPG10
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
0002C4H
IPCP0 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0002C8H
IPCP1 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0002CCH
ICFS01 [R/W]
B, H, W
------00
―
LSYNS0 [R/W]
B, H, W
--000000
IPCP2 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0002D4H
IPCP3 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ICFS23 [R/W]
B, H, W
------00
―
IPCP4 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0002E0H
IPCP5 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ICFS45 [R/W]
B, H, W
------00
―
OCCP0 [R/W] W
00000000 00000000 00000000 00000000
0002ECH
OCCP1 [R/W] W
00000000 00000000 00000000 00000000
OCFS01 [R/W]
B, H, W
------11
―
OCSH01[R/W]
B, H, W
---0--00
Output compare 0,1
OCSL01[R/W]
B, H, W
0000--00
0002F4H
OCCP2 [R/W] W
00000000 00000000 00000000 00000000
0002F8H
OCCP3 [R/W] W
00000000 00000000 00000000 00000000
Output compare 2,3
0002FCH
OCFS23 [R/W]
B, H, W
------11
―
OCSH23[R/W]
B, H, W
---0--00
OCSL23[R/W]
B, H, W
0000--00
000300H
to
00030CH
―
―
―
―
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Input Capture 4,5
ICS45 [R/W]
B, H, W
00000000
―
0002E8H
0002F0H
Input Capture 2,3
ICS23 [R/W]
B, H, W
00000000
―
0002DCH
0002E4H
Input Capture 0,1
ICS01 [R/W]
B, H, W
00000000
0002D0H
0002D8H
Block
Reserved
61
MB91590 Series
Address
Address offset value / Register name
+0
+1
000310H
―
―
000314H
―
―
+2
+3
Block
MPUCR [R/W] H
000000-0 ----0100
―
―
―
000318H
00031CH
―
―
000320H
DPVAR [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000324H
―
000328H
DEAR [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00032CH
―
000330H
PABR0 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000334H
―
000338H
PABR1 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
00033CH
―
000340H
PABR2 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000344H
―
000348H
PABR3 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
00034CH
―
000350H
PABR4 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000354H
―
000358H
PABR5 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
00035CH
―
000360H
PABR6 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000364H
―
000368H
PABR7 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
―
―
―
―
―
―
―
―
―
62
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
DPVSR [R/W] H
-------- 00000--0
DESR [R/W] H
-------- 00000--0
PACR0 [R/W] H
000000-0 00000--0
PACR1 [R/W] H
000000-0 00000--0
MPU [S]
(Only the CPU can
access this area)
PACR2 [R/W] H
000000-0 00000--0
PACR3 [R/W] H
000000-0 00000--0
PACR4 [R/W] H
000000-0 00000--0
PACR5 [R/W] H
000000-0 00000--0
PACR6 [R/W] H
000000-0 00000--0
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
00036CH
―
―
000370H
PABR8 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000374H
―
000378H
PABR9[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
00037CH
―
PACR9 [R/W] H
000000-0 00000--0
000380H
PABR10 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000384H
―
000388H
PABR11 [R/W] ,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
00038CH
―
000390H
PABR12 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
000394H
―
000398H
PABR13 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
00039CH
―
0003A0H
PABR14 [R/W]W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
0003A4H
―
0003A8H
PABR15 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXX0000
0003ACH
―
―
0003B0H
to
0003FCH
―
―
―
―
000400H
ICSEL0[R/W]
B, H, W
-----000
ICSEL1[R/W]
B, H, W
-----000
ICSEL2[R/W]
B, H, W
-------0
ICSEL3[R/W]
B, H, W
-------0
000404H
ICSEL4[R/W]
B, H, W
-------0
ICSEL5[R/W]
B, H, W
-------0
ICSEL6[R/W]
B, H, W
-----000
ICSEL7[R/W]
B, H, W
-----000
000408H
ICSEL8[R/W]
B, H, W
------00
ICSEL9[R/W]
B, H, W
------00
ICSEL10[R/W]
B, H, W
------00
ICSEL11[R/W]
B, H, W
------00
―
―
―
―
―
―
―
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
+2
+3
PACR7 [R/W] H
000000-0 00000--0
Block
MPU [S]
(Only the CPU can
access this area)
PACR8 [R/W] H
000000-0 00000--0
PACR10 [R/W] H
000000-0 00000--0
MPU [S]
(Only product
mounting MPU 12ch
or 16ch)
(Only the CPU can
access this area)
PACR11 [R/W] H
000000-0 00000--0
PACR12 [R/W] H
000000-0 00000--0
PACR13 [R/W] H
000000-0 00000--0
MPU [S]
(Only product
mounting MPU 16ch)
(Only the CPU can
access this area)
PACR14 [R/W] H
000000-0 00000--0
PACR15 [R/W] H
000000-0 00000--0
Reserved [S]
Generation and clear
of DMA transfer
request
63
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
00040CH
ICSEL12[R/W]
B, H, W
------00
ICSEL13[R/W]
B, H, W
-------0
ICSEL14[R/W]
B, H, W
-------0
ICSEL15[R/W]
B, H, W
--------
000410H
ICSEL16[R/W]
B, H, W
--------
ICSEL17[R/W]
B, H, W
--------
ICSEL18[R/W]
B, H, W
--------
ICSEL19[R/W]
B, H, W
-----000
000414H
ICSEL20[R/W]
B, H, W
-----000
ICSEL21[R/W]
B, H, W
------00
ICSEL22[R/W]
B, H, W
------00
―
000418H
IRPR0H[R]
B, H, W
00------
IRPR0L[R]
B, H, W
00------
IRPR1H[R]
B, H, W
00------
IRPR1L[R]
B, H, W
00------
00041CH
IRPR2H[R]
B, H, W
00------
IRPR2L[R]
B, H, W
00------
IRPR3H[R]
B, H, W
000000--
IRPR3L[R]
B, H, W
000000--
000420H
IRPR4H[R]
B, H, W
0000----
IRPR4L[R]
B, H, W
0000----
IRPR5H[R]
B, H, W
0000----
IRPR5L[R]
B, H, W
0-------
000424H
IRPR6H[R]
B, H, W
00--0---
IRPR6L[R]
B, H, W
000-----
IRPR7H[R]
B, H, W
-00-----
IRPR7L[R]
B, H, W
------0-
000428H
IRPR8H[R]
B, H, W
00------
IRPR8L[R]
B, H, W
00------
IRPR9H[R]
B, H, W
00------
IRPR9L[R]
B, H, W
00------
00042CH
―
―
―
―
000430H
IRPR12H[R]
B, H, W
00------
IRPR12L[R]
B, H, W
00------
IRPR13H[R]
B, H, W
000-----
IRPR13L[R]
B, H, W
00000---
000434H
IRPR14H[R]
B, H, W
00000000
IRPR14L[R]
B, H, W
00000000
IRPR15H[R]
B, H, W
000-----
―
000438H,
00043CH
―
―
―
―
000440H
ICR00 [R/W]
B, H, W
---11111
ICR01 [R/W]
B, H, W
---11111
ICR02 [R/W]
B, H, W
---11111
ICR03 [R/W]
B, H, W
---11111
000444H
ICR04 [R/W]
B, H, W
---11111
ICR05 [R/W]
B, H, W
---11111
ICR06 [R/W]
B, H, W
---11111
ICR07 [R/W]
B, H, W
---11111
000448H
ICR08 [R/W]
B, H, W
---11111
ICR09 [R/W]
B, H, W
---11111
ICR10 [R/W]
B, H, W
---11111
ICR11 [R/W]
B, H, W
---11111
00044CH
ICR12 [R/W]
B, H, W
---11111
ICR13 [R/W]
B, H, W
---11111
ICR14 [R/W]
B, H, W
---11111
ICR15 [R/W]
B, H, W
---11111
64
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
Generation and clear
of DMA transfer
request
Interrupt request
batch read register
Reserved
Interrupt request
batch read register
Reserved
Interrupt controller
[S]
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000450H
ICR16 [R/W]
B, H, W
---11111
ICR17 [R/W]
B, H, W
---11111
ICR18 [R/W]
B, H, W
---11111
ICR19 [R/W]
B, H, W
---11111
000454H
ICR20 [R/W]
B, H, W
---11111
ICR21 [R/W]
B, H, W
---11111
ICR22 [R/W]
B, H, W
---11111
ICR23 [R/W]
B, H, W
---11111
000458H
ICR24 [R/W]
B, H, W
---11111
ICR25 [R/W]
B, H, W
---11111
ICR26 [R/W]
B, H, W
---11111
ICR27 [R/W]
B, H, W
---11111
00045CH
ICR28 [R/W]
B, H, W
---11111
ICR29 [R/W]
B, H, W
---11111
ICR30 [R/W]
B, H, W
---11111
ICR31 [R/W]
B, H, W
---11111
000460H
ICR32 [R/W]
B, H, W
---11111
ICR33 [R/W]
B, H, W
---11111
ICR34 [R/W]
B, H, W
---11111
ICR35 [R/W]
B, H, W
---11111
000464H
ICR36 [R/W]
B, H, W
---11111
ICR37 [R/W]
B, H, W
---11111
ICR38 [R/W]
B, H, W
---11111
ICR39 [R/W]
B, H, W
---11111
000468H
ICR40 [R/W]
B, H, W
---11111
ICR41 [R/W]
B, H, W
---11111
ICR42 [R/W]
B, H, W
---11111
ICR43 [R/W]
B, H, W
---11111
00046CH
ICR44 [R/W]
B, H, W
---11111
ICR45 [R/W]
B, H, W
---11111
ICR46 [R/W]
B, H, W
---11111
ICR47 [R/W]
B, H, W
---11111
000470H
to
00047CH
―
―
―
―
Block
Interrupt controller
[S]
Reserved [S]
Reset control [S]
Power consumption
control [S]
RSTRR [R]
B, H, W
XXXX--XX
RSTCR [R/W]
B, H, W
111----0
STBCR [R/W]
B, H, W *3
000---11
―
000484H
―
―
―
―
Reserved [S]
000488H
DIVR0 [R/W]
B, H, W
000-----
DIVR1 [R/W]
B, H, W
0001----
DIVR2 [R/W]
B, H, W
0011----
―
Clock control [S]
00048CH
―
―
―
―
Reserved [S]
000490H
IORR0[R/W]
B, H, W
-0000000
IORR1[R/W]
B, H, W
-0000000
IORR2[R/W]
B, H, W
-0000000
IORR3[R/W]
B, H, W
-0000000
000494H
IORR4[R/W]
B, H, W
-0000000
IORR5[R/W]
B, H, W
-0000000
IORR6[R/W]
B, H, W
-0000000
IORR7[R/W]
B, H, W
-0000000
000498H
IORR8[R/W]
B, H, W
-0000000
IORR9[R/W]
B, H, W
-0000000
IORR10[R/W]
B, H, W
-0000000
IORR11[R/W]
B, H, W
-0000000
000480H
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
* 3:Writing to
STBCR by DMA is
disabled
DMA transfer request
from a peripheral [S]
65
MB91590 Series
Address
Address offset value / Register name
Block
+0
+1
+2
+3
00049CH
IORR12[R/W]
B, H, W
-0000000
IORR13[R/W]
B, H, W
-0000000
IORR14[R/W]
B, H, W
-0000000
IORR15[R/W]
B, H, W
-0000000
DMA transfer request
from a peripheral [S]
0004A0H
―
―
―
―
Reserved
0004A4H
CANPRE [R/W]
B,H,W
----0000
―
―
―
CAN prescaler
0004A8H
―
―
―
―
Reserved
0004ACH
―
―
―
―
Reserved
0004B0H
―
―
―
―
Reserved
0004B4H
―
―
―
―
Reserved
0004B8H
CUCR0 [R/W] B,H,W
-------- ---0--00
CUTR0 [R] B,H,W
-------- 00000000 00000000 00000000
0004BCH
0004C0H
0004C4H
CUTD0 [R/W] B,H,W
10000000 00000000
―
―
CUCR1 [R/W] B,H,W
-------- ---0--00
―
―
CUTD1[R/W] B,H,W
11000011 01010000
RTC/WDT1
calibration
(Calibration)
CUTR1 [R] B,H,W
-------- 00000000 00000000 00000000
0004C8H
0004CCH
CRTR [R/W]
B,H,W
01111111
―
―
―
RC trimming
setting register
0004D0H
to
0004DCH
―
―
―
―
Reserved
0004E0H
to
00050CH
―
―
―
―
Reserved
000510H
CSELR [R/W]
B,H,W
001---00
CMONR [R]
B,H,W
001---00
MTMCR [R/W]
B,H,W
00001111
STMCR [R/W]
B,H,W
0000-111
PTMCR [R/W]
B,H,W
00------
Clock control [S]
000514H
PLLCR [R/W] B,H,W
-------- 11110000
CSTBR [R/W]
B,H,W
-0000000
000518H
―
―
CPUAR [R/W]
B,H,W
0----XXX
―
Reset [S]
00051CH
―
―
―
―
Reserved [S]
000520H
CCPSSELR
[R/W] B,H,W
-------0
―
―
CCPSDIVR
[R/W] B,H,W
-000-000
―
CCPLLFBR
[R/W] B,H,W
-0000000
CCSSFBR0
[R/W] B,H,W
--000000
CCSSFBR1
[R/W] B,H,W
---00000
000524H
66
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Clock control 2
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+2
+3
Block
+0
+1
000528H
―
CCSSCCR0
[R/W] B,H,W
----0000
00052CH
―
CCCGRCR0
[R/W] B,H,W
00----00
CCCGRCR1
[R/W] B,H,W
00000000
CCCGRCR2
[R/W] B,H,W
00000000
000530H
CCRTSELR
[R/W] B,H,W
0------0
―
CCPMUCR0
[R/W] B,H,W
0-----00
CCPMUCR1
[R/W] B,H,W
0--00000
000534H
―
―
―
―
000538H
―
―
―
―
00053CH
―
―
―
―
000540H
to
00054CH
―
―
―
―
000550H
EIRR0
[R/W] B,H,W
XXXXXXXX
ENIR0
[R/W] B,H,W
00000000
ELVR0
[R/W] B,H,W
00000000 00000000
External interrupt
(INT0 to INT7)
000554H
EIRR1
[R/W] B,H,W
XXXXXXXX
ENIR1
[R/W] B,H,W
00000000
ELVR1
[R/W] B,H,W
00000000 00000000
External interrupt
(INT8 to INT15)
000558H
―
―
―
00055CH
―
―
WTDR[R/W] H
00000000 00000000
000560H
―
WTCRH
[R/W] B
------00
WTCRM
[R/W] B,H
00000000
WTCRL
[R/W] B,H
----00-0
000564H
―
WTBRH
[R/W] B
--XXXXXX
WTBRM
[R/W] B
XXXXXXXX
WTBRL
[R/W] B
XXXXXXXX
000568H
WTHR
[R/W] B,H
---00000
WTMR
[R/W] B,H
--000000
WTSR
[R/W] B
--000000
―
CCSSCCR1
[R/W] H,W
000----- --------
―
Clock control 2
Reserved
Reserved
Real-time clock
Clock supervisor
00056CH
―
CSVCR
[R/W] B
-001110-001010-*4
000570H
to
00057CH
―
―
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
―
―
―
*4:An initial value is
different by part
number.For details,
refer to the CSVCR
register in chapter
“Clock Supervisor”
Reserved
67
MB91590 Series
Address
Address offset value / Register name
Block
+0
+1
+2
+3
000580H
REGSEL
[R/W] B,H,W
0110011-
―
―
―
000584H
LVD5R
[R/W] B,H,W
-------1
LVD5F
[R/W] B,H,W
0-100--1
LVD
[R/W] B,H,W
01000--0
―
000588H
GLVD5R[R/W]
B,H,W
0-01-0-X
GLVD5F[R/W]
B,H,W
0-0100-X
GLVD[R/W]
B,H,W
010000-X
―
00058CH
―
―
―
―
000590H
PMUSTR
[R/W] B,H,W
0-----1X
PMUCTLR
[R/W] B,H,W
0-00----
PWRTMCTL
[R/W] B,H,W
-----011
―
000594H
PMUINTF0
[R/W] B,H,W
00000000
PMUINTF1
[R/W] B,H,W
00000000
PMUINTF2
[R/W] B,H,W
0000----
―
000598H
GSTR[R]
B,H,W
0-------
GCTLR[R/W]
B,H,W
0000-111
―
―
00059CH
―
―
―
―
0005A0H
to
0005FCH
―
―
―
―
Reserved
000600H
to
00060CH
―
―
―
―
Reserved[S]
000610H
to
00063CH
―
―
―
―
Reserved[S]
000640H
to
00064CH
―
―
―
―
Reserved[S]
000650H
to
00067CH
―
―
―
―
Reserved[S]
000680H
to
00068CH
―
―
―
―
Reserved[S]
000690H
to
0006BCH
―
―
―
―
Reserved[S]
0006C0H
to
0006CCH
―
―
―
―
Reserved[S]
0006D0H
to
0006F0H
―
―
―
―
Reserved
68
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Regulator control
Low-power detection
Reserved
PMU
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
Block
+0
+1
+2
+3
0006F4 H
―
―
―
―
Reserved
0006F8H
to
00070CH
―
―
―
―
Reserved
000710H
BPCCRA[R/W]
B
00000000
BPCCRB[R/W]
B
00000000
BPCCRC[R/W]
B
00000000
―
000714H
BPCTRA[R/W] W
00000000 00000000 00000000 00000000
000718H
BPCTRB[R/W] W
00000000 00000000 00000000 00000000
00071CH
BPCTRC[R/W] W
00000000 00000000 00000000 00000000
Bus performance
counter
000720H
to
0007F8H
―
―
―
―
Reserved
0007FCH
BMODR[R]
B, H, W
XXXXXXXX
―
―
―
Operation mode
000800H
to
00083CH
―
―
―
―
Reserved [S]
―
FSTR[R/W] B
-----001
Flash memory
register [S]
―
Reserved [S]
FCTLR[R/W] H
-0--1000 0--0----
000840H
000844H
to
000854H
―
―
―
000858H
―
―
WREN[R/W] H
00000000 00000000
00085CH
to
00087CH
―
―
―
―
000880H
WRAR00[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
000884H
WRDR00[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000888H
WRAR01[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
00088CH
WRDR01[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000890H
WRAR02[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
000894H
WRDR02[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000898H
WRAR03[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Wild register [S]
Reserved [S]
Wild register [S]
69
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
00089CH
WRDR03[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008A0H
WRAR04[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008A4H
WRDR04[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008A8H
WRAR05[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008ACH
WRDR05[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008B0H
WRAR06[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008B4H
WRDR06[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008B8H
WRAR07[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008BCH
WRDR07[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008C0H
WRAR08[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008C4H
WRDR08[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008C8H
WRAR09[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008CCH
WRDR09[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008D0H
WRAR10[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008D4H
WRDR10[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008D8H
WRAR11[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008DCH
WRDR11[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008E0H
WRAR12[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008E4H
WRDR12[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008E8H
WRAR13[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008ECH
WRDR13[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0008F0H
WRAR14[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008F4H
WRDR14[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
70
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
Wild register [S]
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
0008F8H
WRAR15[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0008FCH
WRDR15[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000900H
to
000BF8H
―
―
000BFCH
―
―
―
―
UER [W] B,H,W
-------- -------X
Wild register [S]
Reserved
OCDU
DCCR0[R/W] W
0----000 --00--00 00000000 0-000000
000C00H
DCSR0[R/W] H
0------- -----000
000C04H
DTCR0[R/W] H
00000000 00000000
000C08H
DSAR0[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C0CH
DDAR0[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C10H
DCCR1[R/W] W
0----000 --00--00 00000000 0-000000
DCSR1[R/W] H
0------- -----000
000C14H
DTCR1[R/W] H
00000000 00000000
000C18H
DSAR1[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C1CH
DDAR1[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C20H
DCCR2[R/W] W
0----000 --00--00 00000000 0-000000
DCSR2[R/W] H
0------- -----000
000C24H
DTCR2[R/W] H
00000000 00000000
000C28H
DSAR2[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C2CH
DDAR2[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C30H
DCCR3[R/W] W
0----000 --00--00 00000000 0-000000
DCSR3[R/W] H
0------- -----000
000C34H
DSAR3[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C3CH
DDAR3[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C40H
DCCR4[R/W] W
0----000 --00--00 00000000 0-000000
DCSR4[R/W] H
0------- -----000
000C44H
DMA controller [S]
DTCR3[R/W] H
00000000 00000000
000C38H
000C48H
Block
DTCR4[R/W] H
00000000 00000000
DSAR4[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
71
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000C4CH
DDAR4[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C50H
DCCR5[R/W] W
0----000 --00--00 00000000 0-000000
000C54H
DCSR5[R/W] H
0------- -----000
DTCR5[R/W] H
00000000 00000000
000C58H
DSAR5[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C5CH
DDAR5[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C60H
DCCR6[R/W] W
0----000 --00--00 00000000 0-000000
000C64H
DCSR6[R/W] H
0------- -----000
DTCR6[R/W] H
00000000 00000000
000C68H
DSAR6[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C6CH
DDAR6[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C70H
DCCR7[R/W] W
0----000 --00--00 00000000 0-000000
000C74H
DCSR7[R/W] H
0------- -----000
DTCR7[R/W] H
00000000 00000000
000C78H
DSAR7[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C7CH
DDAR7[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C80H
DCCR8[R/W] W
0----000 --00--00 00000000 0-000000
000C84H
DCSR8[R/W] H
0------- -----000
DSAR8[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C8CH
DDAR8[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C90H
DCCR9[R/W] W
0----000 --00--00 00000000 0-000000
DCSR9[R/W] H
0------- -----000
DTCR9[R/W] H
00000000 00000000
000C98H
DSAR9[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000C9CH
DDAR9[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CA0H
DCCR10[R/W] W
0----000 --00--00 00000000 0-000000
000CA4H
DCSR10[R/W] H
0------- -----000
72
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DMA controller [S]
DTCR8[R/W] H
00000000 00000000
000C88H
000C94H
Block
DTCR10[R/W] H
00000000 00000000
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000CA8H
DSAR10[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CACH
DDAR10[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CB0H
DCCR11[R/W] W
0----000 --00--00 00000000 0-000000
DCSR11[R/W] H
0------- -----000
000CB4H
DTCR11[R/W] H
00000000 00000000
000CB8H
DSAR11[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CBCH
DDAR11[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CC0H
DCCR12[R/W] W
0----000 --00--00 00000000 0-000000
DCSR12[R/W] H
0------- -----000
000CC4H
DTCR12[R/W] H
00000000 00000000
000CC8H
DSAR12[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CCCH
DDAR12[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CD0H
DCCR13[R/W] W
0----000 --00--00 00000000 0-000000
DCSR13[R/W] H
0------- -----000
000CD4H
DTCR13[R/W] H
00000000 00000000
000CD8H
DSAR13[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CDCH
DDAR13[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CE0H
DCCR14[R/W] W
0----000 --00--00 00000000 0-000000
DCSR14[R/W] H
0------- -----000
000CE4H
DSAR14[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CECH
DDAR14[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CF0H
DCCR15[R/W] W
0----000 --00--00 00000000 0-000000
DCSR15[R/W] H
0------- -----000
DTCR15[R/W] H
00000000 00000000
000CF8H
DSAR15[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000CFCH
DDAR15[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DMA controller [S]
DTCR14[R/W] H
00000000 00000000
000CE8H
000CF4H
Block
73
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000D00H
to
000DF0H
―
―
―
―
000DF4H
―
―
DNMIR[R/W] B DILVR[R/W] B
0------0
---11111
DMACR[R/W] W
0------- -------- 0------- --------
000DF8H
000DFCH
―
―
―
―
000E00H
DDR00[R/W]
B,H,W
00000000
DDR01[R/W]
B,H,W
00000000
DDR02[R/W]
B,H,W
00000000
DDR03[R/W]
B,H,W
00000000
000E04H
DDR04[R/W]
B,H,W
00000000
DDR05[R/W]
B,H,W
00000000
DDR06[R/W]
B,H,W
00000000
DDR07[R/W]
B,H,W
00000000
000E08H
DDR08[R/W]
B,H,W
00000000
DDR09[R/W]
B,H,W
00000000
DDR10[R/W]
B,H,W
00000000
DDR11[R/W]
B,H,W
00000000
000E0CH
DDR12[R/W]
B,H,W
00000000
DDR13[R/W]
B,H,W
00-00000
―
―
000E10H
DDRA[R/W]
B,H,W
000000--
DDRB[R/W]
B,H,W
000000--
DDRC[R/W]
B,H,W
000000--
DDRD[R/W]
B,H,W
000000--
000E14H
DDRE[R/W]
B,H,W
000000--
DDRF[R/W]
B,H,W
000000--
DDRG[R/W]
B,H,W
00000000
DDRH[R/W]
B,H,W
----0---
000E18H
to
000E1CH
―
―
―
―
000E20H
PFR00[R/W]
B,H,W
00000000
PFR01[R/W]
B,H,W
00000000
PFR02[R/W]
B,H,W
00000000
PFR03[R/W]
B,H,W
00000000
000E24H
PFR04[R/W]
B,H,W
00000000
PFR05[R/W]
B,H,W
-0000000
PFR06[R/W]
B,H,W
00000000
PFR07[R/W]
B,H,W
00000000
000E28H
PFR08[R/W]
B,H,W
00000000
PFR09[R/W]
B,H,W
0-000000
PFR10[R/W]
B,H,W
00000000
PFR11[R/W]
B,H,W
00000000
000E2CH
PFR12[R/W]
B,H,W
0-000000
PFR13[R/W]
B,H,W
---00000
―
―
000E30H
PFRA[R/W]
B,H,W
--------
PFRB[R/W]
B,H,W
--------
PFRC[R/W]
B,H,W
--------
PFRD[R/W]
B,H,W
000000--
000E34H
PFRE[R/W]
B,H,W
000000--
PFRF[R/W]
B,H,W
000000--
PFRG[R/W]
B,H,W
00000---
PFRH[R/W]
B,H,W
--------
74
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
Reserved [S]
DMA controller [S]
Reserved [S]
Data direction
register
Reserved
Port function register
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000E38H
to
000E3CH
―
―
―
―
000E40H
PDDR00[R]
B,H,W
XXXXXXXX
PDDR01[R]
B,H,W
XXXXXXXX
PDDR02[R]
B,H,W
XXXXXXXX
PDDR03[R]
B,H,W
XXXXXXXX
000E44H
PDDR04[R]
B,H,W
XXXXXXXX
PDDR05[R]
B,H,W
XXXXXXXX
PDDR06[R]
B,H,W
XXXXXXXX
PDDR07[R]
B,H,W
XXXXXXXX
000E48H
PDDR08[R]
B,H,W
XXXXXXXX
PDDR09[R]
B,H,W
XXXXXXXX
PDDR10[R]
B,H,W
XXXXXXXX
PDDR11[R]
B,H,W
XXXXXXXX
000E4CH
PDDR12[R]
B,H,W
XXXXXXXX
PDDR13[R]
B,H,W
XX-XXXXX
―
―
000E50H
PDDRA[R]
B,H,W
XXXXXX--
PDDRB[R]
B,H,W
XXXXXX--
PDDRC[R]
B,H,W
XXXXXX--
PDDRD[R]
B,H,W
XXXXXX--
000E54H
PDDRE[R]
B,H,W
XXXXXX--
PDDRF[R]
B,H,W
XXXXXX--
PDDRG[R]
B,H,W
XXXXXXXX
PDDRH[R]
B,H,W
----X---
000E58H
to
000E5CH
―
―
―
―
000E60H
EPFR00[R/W]
B,H,W
00000000
EPFR01[R/W]
B,H,W
----0000
EPFR02[R/W]
B,H,W
---00000
EPFR03[R/W]
B,H,W
---00000
000E64H
EPFR04[R/W]
B,H,W
---00000
EPFR05[R/W]
B,H,W
---00000
EPFR06[R/W]
B,H,W
---00000
EPFR07[R/W]
B,H,W
---00000
000E68H
EPFR08[R/W]
B,H,W
---00000
EPFR09[R/W]
B,H,W
---00000
EPFR10[R/W]
B,H,W
-0000000
EPFR11[R/W]
B,H,W
--000000
000E6CH
EPFR12[R/W]
B,H,W
--000000
EPFR13[R/W]
B,H,W
--000000
EPFR14[R/W]
B,H,W
--000000
EPFR15[R/W]
B,H,W
-0000000
000E70H
EPFR16[R/W]
B,H,W
00000000
EPFR17[R/W]
B,H,W
00000000
EPFR18[R/W]
B,H,W
10000000
EPFR19[R/W]
B,H,W
11111111
000E74H
EPFR20[R/W]
B,H,W
-1111111
EPFR21[R/W]
B,H,W
00000000
EPFR22[R/W]
B,H,W
00000000
EPFR23[R/W]
B,H,W
00000000
000E78H
EPFR24[R/W]
B,H,W
-----000
EPFR25[R/W]
B,H,W
-----000
EPFR26[R/W]
B,H,W
----0000
EPFR27[R/W]
B,H,W
---00000
000E7CH
EPFR28[R/W]
B,H,W
------00
EPFR29[R/W]
B,H,W
00000000
EPFR30[R/W]
B,H,W
00000000
EPFR31[R/W]
B,H,W
00000000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
Reserved
Input data direct read
register
Reserved
Extended port
function register
75
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000E80H
EPFR32[R/W]
B,H,W
00000000
EPFR33[R/W]
B,H,W
---00000
EPFR34[R/W]
B,H,W
---00000
EPFR35[R/W]
B,H,W
---00000
000E84H
EPFR36[R/W]
B,H,W
---00000
EPFR37[R/W]
B,H,W
00000000
EPFR38[R/W]
B,H,W
---00000
EPFR39[R/W]
B,H,W
00000000
000E88H
EPFR40[R/W]
B,H,W
--000000
EPFR41[R/W]
B,H,W
-----000
EPFR42[R/W]
B,H,W
------00
EPFR43[R/W]
B,H,W
00000000
000E8CH
EPFR44[R/W]
B,H,W
00000000
EPFR45[R/W]
B,H,W
00000000
EPFR46[R/W]
B,H,W
--000000
EPFR47[R/W]
B,H,W
-------0
000E90H
EPFR48[R/W]
B,H,W
00000000
EPFR49[R/W]
B,H,W
00000000
EPFR50[R/W]
B,H,W
00000000
EPFR51[R/W]
B,H,W
---00000
000E94H
EPFR52[R/W]
B,H,W
-----000
EPFR53[R/W]
B,H,W
---00000
EPFR54[R/W]
B,H,W
----0000
EPFR55[R/W]
B,H,W
------01
000E98H
to
000E9CH
―
―
―
―
000EA0H
PPCR00[R/W]
B,H,W
11111111
PPCR01[R/W]
B,H,W
11111111
PPCR02[R/W]
B,H,W
11111111
PPCR03[R/W]
B,H,W
11111111
000EA4H
PPCR04[R/W]
B,H,W
11111111
PPCR05[R/W]
B,H,W
11111111
PPCR06[R/W]
B,H,W
11111111
PPCR07[R/W]
B,H,W
11111111
000EA8H
PPCR08[R/W]
B,H,W
11111111
PPCR09[R/W]
B,H,W
11111111
PPCR10[R/W]
B,H,W
11111111
PPCR11[R/W]
B,H,W
11111111
000EACH
PPCR12[R/W]
B,H,W
11111111
PPCR13[R/W]
B,H,W
11-11111
―
―
000EB0H
PPCRA[R/W]
B,H,W
111111--
PPCRB[R/W]
B,H,W
111111--
PPCRC[R/W]
B,H,W
111111--
PPCRD[R/W]
B,H,W
111111--
000EB4H
PPCRE[R/W]
B,H,W
111111--
PPCRF[R/W]
B,H,W
111111--
PPCRG[R/W]
B,H,W
11111111
PPCRH[R/W]
B,H,W
----1---
000EB8H
to
000EBCH
―
―
―
―
000EC0H
PPER00[R/W]
B,H,W
00000000
PPER01[R/W]
B,H,W
00000000
PPER02[R/W]
B,H,W
00000000
PPER03[R/W]
B,H,W
00000000
PPER04[R/W]
B,H,W
00000000
PPER05[R/W]
B,H,W
00000000
PPER06[R/W]
B,H,W
00000000
PPER07[R/W]
B,H,W
00000000
000EC4H
76
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
Extended port
function register
Extended port
function register
Reserved
Port pull-up/down
control register
Reserved
Port pull-up/down
enable register
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
000EC8H
PPER08[R/W]
B,H,W
00000000
PPER09[R/W]
B,H,W
00000000
PPER10[R/W]
B,H,W
00000000
PPER11[R/W]
B,H,W
00000000
000ECCH
PPER12[R/W]
B,H,W
00000000
PPER13[R/W]
B,H,W
00-00000
―
―
000ED0H
PPERA[R/W]
B,H,W
000000--
PPERB[R/W]
B,H,W
000000--
PPERC[R/W]
B,H,W
000000--
PPERD[R/W]
B,H,W
000000--
000ED4H
PPERE[R/W]
B,H,W
000000--
PPERF[R/W]
B,H,W
000000--
PPERG[R/W]
B,H,W
00000000
PPERH[R/W]
B,H,W
----0---
000ED8H
to
000EDCH
―
―
―
―
000EE0H
PILR00[R/W]
B,H,W
11111111
PILR01[R/W]
B,H,W
11111111
PILR02[R/W]
B,H,W
11111111
PILR03[R/W]
B,H,W
11111111
000EE4H
PILR04[R/W]
B,H,W
11111111
PILR05[R/W]
B,H,W
11111111
PILR06[R/W]
B,H,W
11111111
PILR07[R/W]
B,H,W
11111111
000EE8H
PILR08[R/W]
B,H,W
11111111
PILR09[R/W]
B,H,W
11111111
PILR10[R/W]
B,H,W
11111111
PILR11[R/W]
B,H,W
11111111
000EECH
PILR12[R/W]
B,H,W
11111111
PILR13[R/W]
B,H,W
11-11111
―
―
000EF0H
PILRA[R/W]
B,H,W
111111--
PILRB[R/W]
B,H,W
111111--
PILRC[R/W]
B,H,W
111111--
PILRD[R/W]
B,H,W
111111--
000EF4H
PILRE[R/W]
B,H,W
111111--
PILRF[R/W]
B,H,W
111111--
PILRG[R/W]
B,H,W
11111111
PILRH[R/W]
B,H,W
----1---
000EF8H
to
000EFCH
―
―
―
―
000F00H
―
―
―
―
000F04H
―
―
EPILR06[R/W]
B,H,W
00000000
EPILR07[R/W]
B,H,W
00000000
000F08H
EPILR08[R/W]
B,H,W
00000000
EPILR09[R/W]
B,H,W
00000000
EPILR10[R/W]
B,H,W
00000000
EPILR11[R/W]
B,H,W
00000000
000F0CH
EPILR12[R/W]
B,H,W
00000000
EPILR13[R/W]
B,H,W
00-00000
―
―
000F10H
―
―
―
―
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
Port pull-up/down
enable register
Port pull-up/down
enable register
Reserved
Port input level
selection register
Reserved
Extended Port input
level selection
register
77
MB91590 Series
Address
Address offset value / Register name
Block
+0
+1
+2
+3
000F14H
―
―
―
―
Extended Port input
level selection
register
000F18H
to
000F1CH
―
―
―
―
Reserved
000F20H
―
―
―
―
000F24H
―
―
PODR06[R/W]
B,H,W
00000000
PODR07[R/W]
B,H,W
00000000
000F28H
PODR08[R/W]
B,H,W
00000000
PODR09[R/W]
B,H,W
00000000
PODR10[R/W]
B,H,W
00000000
PODR11[R/W]
B,H,W
00000000
000F2CH
PODR12[R/W]
B,H,W
00000000
PODR13[R/W]
B,H,W
00-00000
―
―
000F30H
―
―
―
―
000F34H
―
―
―
―
000F38H
EPODR06[R/W] EPODR07[R/W] EPODR08[R/W]
B,H,W
B,H,W
B,H,W
00000000
00000000
00000000
Port output drive
register
―
Extended Port output
drive register
000F3CH
EPODRGD
[R/W]B,H,W
----1010
EPODRGF
[R/W]B,H,W
--101010
―
―
000F40H
PORTEN [R/W]
B,H,W
-------0
―
―
―
Port input enable
register
000F44H
to
000F4CH
―
―
―
―
Reserved
000F50H
―
GPLLCR[R/W]
B,H,W
0------0
PTIMCR[R/W] PEDIVCR[R/W]
B,H,W
B,H,W
----1111
-000-000
000F54H
―
PDIVCR[R/W]
B,H,W
-0000000
SDIVCR0[R/W] SDIVCR1[R/W]
B,H,W
B,H,W
--000000
---00000
000F58H
―
SSSCR0[R/W]
B,H,W
----0000
SSSCR1[R/W]
H,W
000----- --------
000F5CH
―
PGRCR0[R/W]
B,H,W
00----00
PGRCR1[R/W]
B,H,W
00000000
PGRCR2[R/W]
B,H,W
00000000
000F60H
―
SGRCR0[R/W]
B,H,W
00----00
SGRCR1[R/W]
B,H,W
00000000
SGRCR2[R/W]
B,H,W
00000000
78
FUJITSU SEMICONDUCTOR CONFIDENTIAL
GDC control register
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
Block
+0
+1
+2
+3
000F64H
―
GDCCR[R/W]
B,H,W
--000001
GDCTRGR
[R/W]
B,H,W
0000--00
GDCSWPR
[R/W]
B,H,W
---00101
GDC control register
000F68H
to
000F9CH
―
―
―
―
Reserved
000FA0H
CPCLR2 [R/W] W
11111111 11111111 11111111 11111111
000FA4H
TCDT2 [R/W] W
00000000 00000000 00000000 00000000
000FA8H
TCCSH2 [R/W]
B, H, W
0-----00
TCCSL2 [R/W]
B, H, W
-1-00000
Dedicated LSYN
input capture
free-run timer 2
―
000FACH
CPCLR3 [R/W] W
11111111 11111111 11111111 11111111
000FB0H
TCDT3 [R/W] W
00000000 00000000 00000000 00000000
Dedicated LSYN
input capture
free-run timer 3
000FB4H
TCCSH3 [R/W]
B, H, W
0-----00
TCCSL3 [R/W]
B, H, W
-1-00000
000FB8H
to
000FCCH
―
―
000FD0H
IPCP6 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000FD4H
IPCP7 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
―
―
―
Reserved
Dedicated LSYN
input capture 6,7
000FD8H
ICFS67 [R/W]
B, H, W
------00
―
LSYNS1 [R/W]
B,H,W
------00
ICS67 [R/W]
B, H, W
00000000
000FDCH
to
000FFCH
―
―
―
―
Reserved
001000H
SACR [R/W]
B,H,W
-------0
PICD [R/W]
B,H,W
----0011
―
―
Synchronous/asynchr
onous switching
control
001004H
to
00103CH
―
―
―
―
Reserved
001040H
―
SGDER0[R/W]
B,H,W
00000000
001044H
SGAR0[R/W] B,H,W
00000000 00000000
001048H
SGTCR0[R/W]
B,H,W
00000000
SGIDR0[R/W]
B,H,W
00000000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
SGCR0[R/W] B,H,W
-0000-0- 000--000
SGFR0[R/W]
B,H,W
00000000
SGNR0[R/W]
B,H,W
00000000
Sound generator 0
SGPCR0[R/W] B,H,W
00000000 11111111
79
MB91590 Series
Address
Address offset value / Register name
+0
+1
001050H
to
00105CH
―
―
001060H
―
SGDER1[R/W]
B,H,W
00000000
001064H
SGAR1[R/W] B,H,W
00000000 00000000
SGTCR1[R/W]
B,H,W
00000000
SGIDR1[R/W]
B,H,W
00000000
001070H
to
00107CH
―
―
001080H
―
SGDER2[R/W]
B,H,W
00000000
001084H
SGAR2[R/W] B,H,W
00000000 00000000
SGTCR2[R/W]
B,H,W
00000000
SGIDR2[R/W]
B,H,W
00000000
001090H
to
00109CH
―
―
0010A0H
―
SGDER3[R/W]
B,H,W
00000000
0010A4H
SGAR3[R/W] B,H,W
00000000 00000000
SGTCR3[R/W]
B,H,W
00000000
―
Reserved
SGCR1[R/W] B,H,W
-0000-0- 000--000
SGFR1[R/W]
B,H,W
00000000
SGNR1[R/W]
B,H,W
00000000
Sound generator 1
SGPCR1[R/W] B,H,W
00000000 11111111
―
―
Reserved
SGCR2[R/W] B,H,W
-0000-0- 000--000
SGFR2[R/W]
B,H,W
00000000
SGNR2[R/W]
B,H,W
00000000
Sound generator 2
SGPCR2[R/W] B,H,W
00000000 11111111
SGIDR3[R/W]
B,H,W
00000000
―
―
Reserved
SGCR3[R/W] B,H,W
-0000-0- 000—000
SGFR3[R/W]
B,H,W
00000000
SGNR3[R/W]
B,H,W
00000000
Sound generator 3
SGPCR3[R/W] B,H,W
00000000 11111111
SGDMAR3[W] B,H,W
00000000 00000000 00000000 00000000
0010ACH
0010B0H
to
0010BCH
Sound generator 0
SGDMAR2[W] B,H,W
00000000 00000000 00000000 00000000
00108CH
0010A8H
―
Block
SGDMAR1[W] B,H,W
00000000 00000000 00000000 00000000
00106CH
001088H
+3
SGDMAR0[W] B,H,W
00000000 00000000 00000000 00000000
00104CH
001068H
+2
―
―
80
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
―
Reserved
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
0010C0H
―
SGDER4[R/W]
B,H,W
00000000
0010C4H
SGAR4[R/W] B,H,W
00000000 00000000
0010C8H
SGTCR4[R/W]
B,H,W
00000000
SGIDR4[R/W]
B,H,W
00000000
+2
+3
Block
SGCR4[R/W] B,H,W
-0000-0- 000--000
SGFR4[R/W]
B,H,W
00000000
SGNR4[R/W]
B,H,W
00000000
Sound generator 4
SGPCR4[R/W] B,H,W
00000000 11111111
SGDMAR4[W] B,H,W
00000000 00000000 00000000 00000000
0010CCH
0010D0H
to
00112CH
―
―
―
―
001130H
―
―
―
CRCCR[R/W]
B,H,W
-0000000
001134H
CRCINIT[R/W] B,H,W
1111111 1111111 1111111 1111111
001138H
CRCIN[R/W] B,H,W
00000000 00000000 00000000 00000000
00113CH
CRCR[R] B,H,W
1111111 1111111 1111111 1111111
Reserved
CRC arithmetic
operation
001140H
to
0013FCH
―
―
―
―
Reserved
001400H
to
001FFCH
―
―
―
―
Reserved (3KB)
002000H
CTRLR0 [R/W] B,H,W
-------- 000-0001
STATR0[R/W] B,H,W
-------- 00000000
002004H
ERRCNT0
[R] B,H,W
00000000 00000000
BTR0[R/W] B,H,W
-0100011 00000001
002008H
INTR0
[R] B,H,W
00000000 00000000
TESTR0[R/W] B,H,W
-------- X00000--
00200CH
BRPER0
[R/W] B,H,W
-------- ----0000
―
002010H
IF1CREQ0
[R/W] B,H,W
0------- 00000001
IF1CMSK0
[R/W] B,H,W
-------- 00000000
002014H
IF1MSK20
[R/W] B,H,W
11-11111 11111111
IF1MSK10
[R/W] B,H,W
11111111 11111111
002018H
IF1ARB20
[R/W] B,H,W
00000000 00000000
IF1ARB10
[R/W] B,H,W
00000000 00000000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
CAN0
(64msg)
81
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
00201CH
IF1MCTR0
[R/W] B,H,W
00000000 0---0000
―
002020H
IF1DTA10
[R/W] B,H,W
00000000 00000000
IF1DTA20[R/W] B,H,W
00000000 00000000
002024H
IF1DTB10
[R/W] B,H,W
00000000 00000000
IF1DTB20
[R/W] B,H,W
00000000 00000000
002028H,
00202CH
Reserved
002030H,
002034H
Reserved (IF1 data mirror)
002038H,
00203CH
Reserved
002040H
IF2CREQ0
[R/W] B,H,W
0------- 00000001
IF2CMSK0
[R/W] B,H,W
-------- 00000000
002044H
IF2MSK20
[R/W] B,H,W
11-11111 11111111
IF2MSK10
[R/W] B,H,W
11111111 11111111
002048H
IF2ARB20
[R/W] B,H,W
00000000 00000000
IF2ARB10
[R/W] B,H,W
00000000 00000000
00204CH
IF2MCTR0
[R/W] B,H,W
00000000 0---0000
―
002050H
IF2DTA10
[R/W] B,H,W
00000000 00000000
IF2DTA20
[R/W] B,H,W
00000000 00000000
002054H
IF2DTB10
[R/W] B,H,W
00000000 00000000
IF2DTB20
[R/W] B,H,W
00000000 00000000
002058H,
00205CH
Reserved
002060H,
002064H
Reserved (IF2 data mirror)
002068H
to
00207CH
Reserved
002080H
TREQR20
[R] B,H,W
00000000 00000000
TREQR10
[R] B,H,W
00000000 00000000
002084H
TREQR40
[R] B,H,W
00000000 00000000
TREQR30
[R] B,H,W
00000000 00000000
002088H
―
―
82
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
CAN0
(64msg)
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
00208CH
―
―
002090H
NEWDT20
[R] B,H,W
00000000 00000000
NEWDT10
[R] B,H,W
00000000 00000000
002094H
NEWDT40
[R] B,H,W
00000000 00000000
NEWDT30
[R]B,H,W
00000000 00000000
002098H
―
―
00209CH
―
―
0020A0H
INTPND20
[R] B,H,W
00000000 00000000
INTPND10
[R] B,H,W
00000000 00000000
0020A4H
INTPND40
[R] B,H,W
00000000 00000000
INTPND30
[R] B,H,W
00000000 00000000
0020A8 H
―
―
0020ACH
―
―
0020B0H
MSGVAL20
[R] B,H,W
00000000 00000000
MSGVAL10
[R] B,H,W
00000000 00000000
0020B4H
MSGVAL40
[R] B,H,W
00000000 00000000
MSGVAL30
[R] B,H,W
00000000 00000000
0020B8H
―
―
0020BCH
―
―
0020C0H
to
0020FCH
Block
CAN0
(64msg)
Reserved
002100H
CTRLR1
[R/W] B,H,W
-------- 000-0001
STATR1[R/W] B,H,W
-------- 00000000
002104H
ERRCNT1
[R] B,H,W
00000000 00000000
BTR1[R/W] B,H,W
-0100011 00000001
002108H
INTR1
[R] B,H,W
00000000 00000000
TESTR1[R/W] B,H,W
-------- X00000--
00210CH
BRPER1
[R/W] B,H,W
-------- ----0000
―
002110H
IF1CREQ1
[R/W] B,H,W
0------- 00000001
IF1CMSK1
[R/W] B,H,W
-------- 00000000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
CAN1
(32msg)
83
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
002114H
IF1MSK21
[R/W] B,H,W
11-11111 11111111
IF1MSK11
[R/W] B,H,W
11111111 11111111
002118H
IF1ARB21
[R/W] B,H,W
00000000 00000000
IF1ARB11
[R/W] B,H,W
00000000 00000000
00211CH
IF1MCTR1
[R/W] B,H,W
00000000 0---0000
―
002120H
IF1DTA11
[R/W] B,H,W
00000000 00000000
IF1DTA21
[R/W] B,H,W
00000000 00000000
002124H
IF1DTB11
[R/W] B,H,W
00000000 00000000
IF1DTB21
[R/W] B,H,W
00000000 00000000
002128H,
00212CH
Reserved
002130H,
002134H
Reserved (IF1 data mirror)
002138H,
00213CH
Reserved
002140H
IF2CREQ1
[R/W] B,H,W
0------- 00000001
IF2CMSK1
[R/W] B,H,W
-------- 00000000
002144H
IF2MSK21
[R/W] B,H,W
11-11111 11111111
IF2MSK11
[R/W] B,H,W
11111111 11111111
002148H
IF2ARB21
[R/W] B,H,W
00000000 00000000
IF2ARB11
[R/W] B,H,W
00000000 00000000
00214CH
IF2MCTR1
[R/W] B,H,W
00000000 0---0000
―
002150H
IF2DTA11
[R/W] B,H,W
00000000 00000000
IF2DTA21
[R/W] B,H,W
00000000 00000000
002154H
IF2DTB11
[R/W] B,H,W
00000000 00000000
IF2DTB21
[R/W] B,H,W
00000000 00000000
002158H,
00215CH
Reserved
002160H,
002164H
Reserved (IF2 data mirror)
002168H
to
00217CH
Reserved
002180H
TREQR21
[R] B,H,W
00000000 00000000
84
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
CAN1
(32msg)
TREQR11
[R] B,H,W
00000000 00000000
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
002184H
―
―
002188H
―
―
00218CH
―
―
002190H
NEWDT21
[R] B,H,W
00000000 00000000
NEWDT11
[R] B,H,W
00000000 00000000
002194H
―
―
002198H
―
―
00219CH
―
―
0021A0H
INTPND21
[R] B,H,W
00000000 00000000
INTPND11
[R] B,H,W
00000000 00000000
0021A4H
―
―
0021A8H
―
―
0021ACH
―
―
0021B0H
MSGVAL21
[R] B,H,W
00000000 00000000
MSGVAL11
[R] B,H,W
00000000 00000000
0021B4H
―
―
0021B8H
―
―
0021BCH
―
―
0021C0H
to
0021FCH
Block
CAN1
(32msg)
Reserved
002200H
CTRLR2
[R/W] B,H,W
-------- 000-0001
STATR2[R/W] B,H,W
-------- 00000000
002204H
ERRCNT2[R] B,H,W
00000000 00000000
BTR2[R/W] B,H,W
-0100011 00000001
002208H
INTR2[R] B,H,W
00000000 00000000
TESTR2[R/W] B,H,W
-------- X00000--
00220CH
BRPER2
[R/W] B,H,W
-------- ----0000
―
002210H
IF1CREQ2[R/W] B,H,W
0------- 00000001
IF1CMSK2[R/W] B,H,W
-------- 00000000
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
CAN2
(32msg)
85
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
002214H
IF1MSK22
[R/W] B,H,W
11-11111 11111111
IF1MSK12
[R/W] B,H,W
11111111 11111111
002218H
IF1ARB22
[R/W] B,H,W
00000000 00000000
IF1ARB12
[R/W] B,H,W
00000000 00000000
00221CH
IF1MCTR2[R/W] B,H,W
00000000 0---0000
―
002220H
IF1DTA12
[R/W] B,H,W
00000000 00000000
IF1DTA22
[R/W] B,H,W
00000000 00000000
002224H
IF1DTB12
[R/W] B,H,W
00000000 00000000
IF1DTB22
[R/W] B,H,W
00000000 00000000
002228 H,
00222CH
Reserved
002230 H,
002234H
Reserved (IF1 data mirror)
002238H,
00223CH
Reserved
002240H
IF2CREQ2[R/W] B,H,W
0------- 00000001
IF2CMSK2[R/W] B,H,W
-------- 00000000
002244H
IF2MSK22
[R/W] B,H,W
11-11111 11111111
IF2MSK12[R/W] B,H,W
11111111 11111111
002248H
IF2ARB22[R/W] B,H,W
00000000 00000000
IF2ARB12[R/W] B,H,W
00000000 00000000
00224CH
IF2MCTR2[R/W] B,H,W
00000000 0---0000
―
002250H
IF2DTA12[R/W] B,H,W
00000000 00000000
IF2DTA22[R/W] B,H,W
00000000 00000000
002254H
IF2DTB12[R/W] B,H,W
00000000 00000000
IF2DTB22[R/W] B,H,W
00000000 00000000
002258H,
00225CH
Reserved
002260H,
002264H
Reserved (IF2 data mirror)
002268H
to
00227CH
Reserved
002280H
TREQR22[R] B,H,W
00000000 00000000
TREQR12[R] B,H,W
00000000 00000000
002284H
―
―
002288H
―
―
00228CH
―
―
86
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Block
CAN2
(32msg)
DS705-00010-2v0-E
MB91590 Series
Address
Address offset value / Register name
+0
+1
+2
+3
002290 H
NEWDT22[R] B,H,W
00000000 00000000
NEWDT12[R] B,H,W
00000000 00000000
002294H
―
―
002298H
―
―
00229CH
―
―
0022A0H
INTPND22[R] B,H,W
00000000 00000000
INTPND12[R] B,H,W
00000000 00000000
0022A4H
―
―
0022A8H
―
―
0022ACH
―
―
0022B0H
MSGVAL22[R] B,H,W
00000000 00000000
MSGVAL12[R] B,H,W
00000000 00000000
0022B4H
―
―
0022B8H
―
―
0022BCH
―
―
0022C0H
to
0022FCH
002300H
―
―
DFCTLR[R/W]B,H,W
-0------ --------
CAN2
(32msg)
―
―
―
DFSTR
[R/W] B,H,W
-----001
002304H
―
―
―
―
002308H
FLIFCTLR
[R/W] B,H,W
---0--00
―
FLIFFER1
[R/W] B,H,W
--------
FLIFFER2
[R/W] B,H,W
--------
00230CH
to
0023FCH
―
―
―
―
002400H
SEEARX[R] B,H,W
--000000 00000000
002404H
EECSRX
[R/W] B,H,W
----0000
002408H
―
00240CH
to
002FFCH
―
Block
Reserved
WorkFlash
Reserved
DEEARX[R] B,H,W
--000000 00000000
EFEARX[R/W] B,H,W
--000000 00000000
―
XBS RAM
ECC control register
EFECRX[R/W] B,H,W
-------0 00000000 00000000
―
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
―
―
Reserved
87
MB91590 Series
Address
003000H
Address offset value / Register name
+0
+1
+2
EECSRA
[R/W] B,H,W
----0000
003008H
―
00300CH
to
003FFCH
―
Block
DEEARA[R] B,H,W
-----000 00000000
SEEARA[R] B,H,W
-----000 00000000
003004H
+3
EFEARA[R/W] B,H,W
-----000 00000000
―
Backup RAM
ECC control register
EFECRA[R/W] B,H,W
-------0 00000000 00000000
―
004000H
to
005FFCH
―
―
Backup RAM
Reserved
Backup RAM area
006000H
to
00EFFCH
―
―
―
―
Reserved
00F000H
to
00FEFCH
―
―
―
―
Reserved [S]
―
―
OCDU [S]
―
―
Reserved [S]
00FF00H
DSUCR [R/W] B,H,W
-------- -------0
00FF04H
to
00FF0CH
―
00FF10H
PCSR [R/W] B,H,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00FF14H
PSSR [R/W] B,H,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00FF18H
to
00FFF4H
―
00FFF8H
EDIR1 [R] B,H,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00FFFCH
EDIR0 [R] B,H,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
―
―
―
―
OCDU [S]
Reserved [S]
OCDU [S]
[S]: It is a system register. The illegal instruction exception (data access error) is generated in these registers
in the user mode when reading and writing to it.
88
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
INTERRUPT VECTOR TABLE
This list shows the assignments of interrupt factors and interrupt vectors/interrupt control registers.
Interrupt vector
Interrupt factor
Interrupt
number
Interrupt
level
Offset
Default
address for
TBR
RN*1
Deci
mal
Hexadecimal
Reset
0
00
-
3FCH
000FFFFCH
-
System reserved
1
01
-
3F8H
000FFFF8H
-
System reserved
2
02
-
3F4H
000FFFF4H
-
System reserved
3
03
-
3F0H
000FFFF0H
-
System reserved
4
04
-
3ECH
000FFFECH
-
FPU exception
5
05
-
3E8H
000FFFE8H
-
6
06
-
3E4H
000FFFE4H
-
7
07
-
3E0H
000FFFE0H
-
Data access error interrupt
8
08
-
3DCH
000FFFDCH
-
INTE instruction
9
09
-
3D8H
000FFFD8H
-
Instruction break
10
0A
-
3D4H
000FFFD4H
-
System Reserved
11
0B
-
3D0H
000FFFD0H
-
System Reserved
12
0C
-
3CCH
000FFFCCH
-
System Reserved
13
0D
-
3C8H
000FFFC8H
-
Exception of invalid instruction
14
0E
-
3C4H
000FFFC4H
-
15
0F
15 (FH)
Fixed
3C0H
000FFFC0H
-
16
10
ICR00
3BCH
000FFFBCH
0
External interrupt 8-15
17
11
ICR01
3B8H
000FFFB8H
1
Reload timer 0/1
18
12
ICR02
3B4H
000FFFB4H
2
Reload timer 2/3
19
13
ICR03
3B0H
000FFFB0H
3
Multi-function serial interface ch.0(reception
completed)/
Multi-function serial interface ch.0(status)
20
14
ICR04
3ACH
000FFFACH
4 *2
Multi-function serial interface
ch.0(transmission completed)
21
15
ICR05
3A8H
000FFFA8H
5
Multi-function serial interface ch.1(reception
completed)/
Multi-function serial interface ch.1(status)
22
16
ICR06
3A4H
000FFFA4H
6*2
Multi-function serial interface
ch.1(transmission completed)
23
17
ICR07
3A0H
000FFFA0H
7
LIN-UART2(reception completed)
24
18
ICR08
39CH
000FFF9CH
8
Exception of instruction access protection
violation
Exception of data access protection violation
NMI request/
XBS RAM double-bit error generation/
Backup RAM double-bit error generation
External interrupt 0-7
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
89
MB91590 Series
Interrupt factor
Interrupt
number
Interrupt
level
Offset
Default
address for
TBR
RN*1
Deci
mal
Hexadecimal
LIN-UART2(transmission completed)
25
19
ICR09
398H
000FFF98H
9
LIN-UART3(reception completed)
26
1A
ICR10
394H
000FFF94H
10
LIN-UART3(transmission completed)
27
1B
ICR11
390H
000FFF90H
11
LIN-UART4(reception completed)
28
1C
ICR12
38CH
000FFF8CH
12
LIN-UART4(transmission completed)
29
1D
ICR13
388H
000FFF88H
13
LIN-UART5(reception completed)
30
1E
ICR14
384H
000FFF84H
14
LIN-UART5(transmission completed)
31
1F
ICR15
380H
000FFF80H
15
LIN-UART6(reception completed)
32
20
ICR16
37CH
000FFF7CH
16
LIN-UART6(transmission completed)
33
21
ICR17
378H
000FFF78H
17
CAN0
34
22
ICR18
374H
000FFF74H
-
CAN1
35
23
ICR19
370H
000FFF70H
-
CAN2
36
24
ICR20
36CH
000FFF6CH
-
Real time clock
37
25
ICR21
368H
000FFF68H
-
Sound generator 0 /
LIN-UART7(reception completed)
38
26
ICR22
364H
000FFF64H
22
Sound generator 1 /
LIN-UART7(transmission completed)
39
27
ICR23
360H
000FFF60H
23
PPG0/1/10/11/20/21
40
28
ICR24
35CH
000FFF5CH
24
PPG2/3/12/13/22/23
41
29
ICR25
358H
000FFF58H
25
PPG4/5/14/15
42
2A
ICR26
354H
000FFF54H
26
PPG6/7/16/17
43
2B
ICR27
350H
000FFF50H
27
PPG8/9/18/19
44
2C
ICR28
34CH
000FFF4CH
28
GDC / GDC_ALM
45
2D
ICR29
348H
000FFF48H
29
Main timer/Sub timer/PLL timer
Clock calibration unit
(Sub oscillation) / Sound generator 4
46
2E
ICR30
344H
000FFF44H
30
47
2F
ICR31
340H
000FFF40H
31*3
A/D converter
Clock calibration Unit
( CR oscillation)
48
30
ICR32
33CH
000FFF3CH
32
49
31
ICR33
338H
000FFF38H
33*3
Free-run timer 0/2
50
32
ICR34
334H
000FFF34H
-
Free-run timer 1/3
51
33
ICR35
330H
000FFF30H
-
ICU0/6(fetching)
52
34
ICR36
32CH
000FFF2CH
36
ICU1/7(fetching)
53
35
ICR37
328H
000FFF28H
37
ICU2(fetching)
54
36
ICR38
324H
000FFF24H
38
ICU3(fetching)
55
37
ICR39
320H
000FFF20H
39
ICU4(fetching)
56
38
ICR40
31CH
000FFF1CH
40
ICU5(fetching)
57
39
ICR41
318H
000FFF18H
41
OCU0/1(match)
58
3A
ICR42
314H
000FFF14H
42
OCU2/3(match)
Base timer 0 IRQ0 /
Base timer 0 IRQ1 /
Sound generator 2
59
3B
ICR43
310H
000FFF10H
43
60
3C
ICR44
30CH
000FFF0CH
44
90
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Interrupt factor
Interrupt
number
Interrupt
level
Offset
Default
address for
TBR
RN*1
Deci
mal
Hexadecimal
Base timer 1 IRQ0 /
Base timer 1 IRQ1/
Sound generator3 /
XBS RAM single bit error generation /
Backup RAM single bit error generation
61
3D
ICR45
308H
000FFF08H
45*4
DMAC0/1/2/3/4/5/6/7/8/9/10/11/12/13/14/15
62
3E
ICR46
304H
000FFF04H
-
Delay interrupt
System Reserved
(Used for REALOSTM*5.)
System Reserved
(Used for REALOS.)
63
3F
ICR47
300H
000FFF00H
-
64
40
-
2FCH
000FFEFCH
-
65
41
-
2F8H
000FFEF8H
-
66
42
2F4H
000FFEF4H
|
|
|
|
255
FF
000H
000FFC00H
*1: Does not support a DMA transfer request caused by an interrupt generated from a peripheral to which
no RN (Resource Number) is assigned.
*2: The status of the multi function serial interface does not support a DMA transfer request caused by I2C
reception.
*3: The clock calibration unit does not support a DMA transfer caused by an interrupt.
*4: No support for a DMA transfer caused by an interrupt because of the RAM ECC bit error.
*5: REALOS is a trademark of Fujitsu Semiconductor Limited, Japan.
Used with the INT instruction.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
91
MB91590 Series
ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter
Power supply voltage*1,*2
Analog power supply
voltage*1,*2
Analog reference voltage*1
Input voltage*1
Analog pin input voltage*1
Output voltage*1
Maximum clamp current
Total maximum clamp current
"L" level maximum output
current *3
"L" level average output
current *4
"L" level total output
current *5
"H" level maximum output
current *3
"H" level average output
current *4
Rating
Symbol
Unit
Min
Max
VCC5
VCC3
DVCC
Vss-0.3
Vss-0.3
Vss-0.3
Vss+6.0
Vss+4.0
Vss+6.0
V
V
V
AVCC5
Vss-0.3
Vss+6.0
V
AVCC3
Vss-0.3
Vss+4.0
V
AVRH5
AVR3
Vss-0.3
Vss-0.3
Vss+6.0
Vss+4.0
V
V
VI1
Vss-0.3
Vcc5+0.3
V
VI2
VI3
VIA5
VIA3
Vss-0.3
Vss-0.3
Vss-0.3
Vss-0.3
Vcc3+0.3
Vcc5+0.3
Vcc5+0.3
Vcc3+0.3
V
V
V
V
VO1
Vss-0.3
Vcc5+0.3
V
VO2
VO3
ICLAMP
Σ|ICLAMP |
Vss-0.3
Vss-0.3
–
–
Vcc3+0.3
Vcc5+0.3
4
20
V
V
mA
mA
IOL1
–
7
mA
IOL2
–
40
mA
IOL3
–
30
mA
IOLAV1
–
2
mA
IOLAV2
–
30
mA
IOLAV3
–
20
mA
ΣIOL1
ΣIOL2
ΣIOL3
–
–
–
50
250
50
mA
mA
mA
IOH1
–
-7
mA
IOH2
–
-40
mA
IOH3
–
-30
mA
IOHAV1
–
-2
mA
IOHAV2
–
-30
mA
IOHAV3
–
-20
mA
92
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Remarks
Vcc3 ≤ Vcc5
DVcc ≤ Vcc5
AVRH5 ≤ AVcc5 ≤
Vcc5
AVR3 ≤ AVcc3 ≤
Vcc3
AVRH5 ≤ AVcc5
AVR3 ≤ AVcc3
5V pins other than
SMC multiplied pins
3.3V dedicated pin
SMC shared pin
5V pins other than
SMC multiplied pins
3.3V dedicated pin
SMC shared pin
*9
*9
When setting to
2mA*6
When setting to
30mA*7
When setting to
20mA*8
When setting to
2mA*6
When setting to
30mA*7
When setting to
20mA*8
*6
*7
*8
When setting to
2mA*6
When setting to
30mA*7
When setting to
20mA*8
When setting to
2mA*6
When setting to
30mA*7
When setting to
20mA*8
DS705-00010-2v0-E
MB91590 Series
Parameter
Symbol
Rating
Min
Max
Unit
Remarks
ΣIOH1
ΣIOH2
ΣIOH3
–
-50
mA *6
–
-250
mA *7
–
-50
mA *8
–
1250
mW LQFP product
Power consumption
PD
–
2500
mW HQFP product
Operating temperature
TA
-40
+105
°C
Storage temperature
Tstg
-55
+150
°C
*1: These parameters are based on the condition that VSS=AVSS=DVSS=0.0V
*2: Caution must be taken that AVCC5 and DVCC do not exceed VCC5.Similarly,AVCC3 must not exceed VCC3.
*3: The maximum output current is defined as the value of the peak current flowing through any one of the
corresponding pins.
*4: The average output current is defined as the value of the average current flowing through any one of the
corresponding pins for a 10 ms period. The average value is the operation current × the operation ratio.
*5: The total output current is defined as the maximum current value flowing through all of corresponding pins.
*6: Outputs other than p60-p87 and 3V pin.
*7: Output of P60-P87 pins.
*8: Output of 3V pin.
*9: · Corresponding pins: all general-purpose ports except P90/ADTG.(Except for the dedicated analog port)
· Use within recommended operating conditions.
· Use at DC voltage (current).
· The + B signal should always be applied by connecting a limiting resistor between the + B signal and the
microcontroller.
· The value of the limiting resistor should be set so that the current input to the microcontroller pin does not
exceed rated values at any time regardless of instantaneously or constantly when the + B signal is input.
· Note that when the microcontroller drive current is low, such as in the low power consumption modes, the
+ B input potential can increase the potential at the VCC pin via a protective diode, possibly affecting
other devices.
· Note that if the + B signal is input when the microcontroller is off (not fixed at 0 V), since the power is
supplied through the pin, the microcontroller may operate incompletely.
· Note that if the +B signal is input at power-on, since the power is supplied through the pin, the power-on
reset may not function in the power supply voltage.
· Do not leave + B input pins open.
"H" level total output
current *5
Sample recommended circuit
MB91590 series
Protective diode
Limiting resistor current
+B input (12 to 16V)
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
93
MB91590 Series
2. Recommended operating conditions
(VSS=DVSS=AVSS=0.0V)
Parameter
Symbol
VCC5
DVCC
AVCC5
VCC3
AVCC3
VCC5
DVCC
AVCC5
VCC3
AVCC3
Power supply
voltage
Smoothing
capacitor*
CS
Value
Min
Max
4.5
4.5
4.5
3.0
3.0
3.5
3.5
3.5
2.7
2.7
5.5
5.5
5.5
3.6
3.6
5.5
5.5
5.5
3.6
3.6
4.7
(tolerance within
±50%)
Unit
V
V
V
V
V
V
V
V
V
V
µF
Remarks
Recommended operation guarantee range
Operation guarantee range
Use a ceramic capacitor or a capacitor that has
the similar frequency characteristics. Use a
capacitor with a capacitance greater than CS as
the smoothing capacitor on the VCC pin.
Operating
TA
-40
+105
°C
temperature
*: Refer to the following diagram for details on the connection of smoothing capacitor CS.
C Pin Connection Diagram
C_3
C_1
CS
VSS
C_2
DVSS
AVSS
CS
CS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the electrical characteristics of the device are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact
sales representatives beforehand.
94
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
3. DC characteristics
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VCC3=3.3V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter
Sym
bol
VIH1
VIH2
VIH3
VIH4
VIH5
"H" level
input voltage
Pin name
P060 to P067
P070 to P077
P080 to P087
P090 to P097
P100 to P107
P110 to P117
P120 to P127
P130 to P137
RSTX,NMIX,
MD2
Conditions
CMOS input level is
selected
CMOS hysteresis
input level is selected
Automotive
input level is selected
TTL
input level is selected
–
VIH7
MD0,MD1
–
VIH8
DEBUGIF
–
VIH10
VIH11
P000 to P007
P010 to P017
P020 to P027
P030 to P037
P040 to P047
P050 to P057
PA2 to PA7
PB2 to PB7
PC2 to PC7
PD2 to PD7
PE2 to PE7
PF2 to PF7
PG0 to PG7
PH3
CMOS hysteresis
input level is selected
Value
Min
0.7
VCC5
0.7
VCC5
0.8
VCC5
2.0
0.7
VCC5
0.7
VCC5
Typ
–
–
–
–
–
–
2.0
–
0.7
VCC3
–
Max
VCC5+
0.3
VCC5+
0.3
VCC5+
0.3
VCC5+
0.3
VCC5+
0.3
VCC5+
0.3
VCC5+
0.3
VCC3+
0.3
Unit
Remarks
V
V
V
V
V
V
V
V
3.3V dedicated
pin
TTL
input level is selected
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
2.0
–
VCC3+
0.3
V
95
MB91590 Series
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VCC3=3.3V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter Symbol
VOH1
VOH2
VOH3
"H" level
output voltage
VOH4
VOH5
VOH6
VOH7
Pin name
P060 to P067
P070 to P077
P080 to P087
P090 to P097
P100 to P107
P110 to P117
P120 to P127
P130 to P137
P060 to P067
P070 to P077
P080 to P087
P000 to P007
P010 to P017
P020 to P027
P030 to P037
P040 to P047
P050 to P057
PA2 to PA7
PB2 to PB7
PC2 to PC7
PD2 to PD7
PE2 to PE7
PF2 to PF7
PG0 to PG7
PH3
Conditions
Value
Unit
Remarks
Min
Typ
Max
VCC5 = 4.5V
IOH = -1.0mA
VCC50.5
–
VCC5
V
VCC5 = 4.5V
IOH = -2.0mA
VCC50.5
–
VCC5
V
DVCC = 4.5V
IOH = -30.0mA
DVCC0.5
–
DVCC
V
SMC shared pin
VCC30.5
–
VCC3
V
3.3V dedicated
pin
VCC3 = 3.0V
IOH = -2.0mA
VCC3 = 3.0V
IOH = -5.0mA
VCC3 = 3.0V
IOH = -10.0mA
VCC3 = 3.0V
IOH = -20.0mA
96
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VCC3=3.3V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter
Sym
bol
VIL1
VIL2
VIL3
VIL4
"L" level
input voltage
Pin name
P060 to P067
P070 to P077
P080 to P087
P090 to P097
P100 to P107
P110 to P117
P120 to P127
P130 to P137
Conditions
Min
Typ
Max
CMOS input
level is selected
Vss0.3
–
0.3×
VCC5
CMOS hysteresis
Input level is selected
Automotive
input level is selected
TTL
input level is selected
Vss0.3
Vss0.3
Vss0.3
Vss0.3
Vss0.3
Vss0.3
VIL5
RSTX,NMIX,
MD2
–
VIL7
MD0,MD1
–
VIL8
DEBUGIF
–
VIL10
VIL11
P000 to P007
P010 to P017
P020 to P027
P030 to P037
P040 to P047
P050 to P057
PA2 to PA7
PB2 to PB7
PC2 to PC7
PD2 to PD7
PE2 to PE7
PF2 to PF7
PG0 to PG7
PH3
Value
CMOS hysteresis
input level is selected
Vss0.3
–
–
–
–
–
0.3×
VCC5
0.5×
VCC5
0.8
0.3×
VCC5
0.3×
VCC5
Unit
Remarks
V
V
V
V
V
V
–
0.8
V
–
0.3×
VCC3
V
3.3V dedicated
pin
TTL
input level is selected
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Vss0.3
–
0.8
V
97
MB91590 Series
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VCC3=3.3V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter
Sym
bol
VOL1
VOL2
VOL3
VOL4
"L" level
output voltage
VOL5
VOL6
VOL7
VOL8
VOL9
Pin name
P060 to P067
P070 to P077
P080 to P087
P090 to P097
P100 to P107
P110 to P117
P120 to P127
P130 to P137
P060 to P067
P070 to P077
P080 to P087
P127
P130
P132
P133
DEBUGIF
P000 to P007
P010 to P017
P020 to P027
P030 to P037
P040 to P047
P050 to P057
PA2 to PA7
PB2 to PB7
PC2 to PC7
PD2 to PD7
PE2 to PE7
PF2 to PF7
PG0 to PG7
PH3
Conditions
Value
Unit
Remarks
Min
Typ
Max
VCC5 = 4.5V
IOL = 1.0mA
0
–
0.4
V
VCC5 = 4.5V
IOL = 2.0mA
0
–
0.4
V
DVCC = 4.5V
IOL = 30.0mA
0
–
0.55
V
SMC shared pin
VCC5 = 4.5V
IOL = 3.0mA
0
–
0.4
V
I2C shared pin
(I2C is selected)
VCC5 = 2.7V
IOL = 25.0mA
0
–
0.25
V
0
–
0.4
V
VCC3 = 3.0V
IOL = 2.0mA
VCC3 = 3.0V
IOL = 5.0mA
3.3V dedicated
pin
VCC3 = 3.0V
IOL = 10.0mA
VCC3 = 3.0V
IOL = 20.0mA
98
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VCC3=3.3V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter
Symbol
Pin name
Input leak current
IIL
All input pins
RUP1
RSTX,NMIX
RUP2
All 5V port
input pins
RUP3
All 3V port
input pins
RDOWN1
MD2
RDOWN2
All 5V port
input pins
RDOWN3
All 3V port
input pins
Pull-up resistance
Pull-down
resistance
CIN1
Input capacitance
CIN2
Conditions
VCC=DVCC=
AVCC=5.5V
VSS<VI<VCC
–
Pull-up
resistance is
selected
Pull-up
resistance is
selected
–
Pull-down
resistance is
selected
Pull-down
resistance is
selected
Other than VCC3,
VCC5, VSS,
DVCC, DVSS,
AVCC3,AVSS3,
AVCC5,AVSS5,
–
C1,C2,C3,
P060 to P067,
P070 to P077,
P080 to P087
P060 to P067,
When using
P070 to P077,
SMC
P080 to P087
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Value
Min
Typ Max
Unit Remarks
-5
–
+5
µA
25
–
100
kΩ
25
–
100
kΩ
17
–
66
kΩ
25
–
100
kΩ
25
–
100
kΩ
17
–
66
kΩ
–
5
15
pF
–
15
45
pF
99
MB91590 Series
(TA:Recommended operating conditions, VCC=5.0V±10%, VCC3=3.3V±10%, VSS=DVSS=AVSS=0.0V)
Parameter
Sym Pin
bol name
ICC5
ICCS5
VCC5
ICCBS5
Power
supply
current
ICCT5
ICCTS5
Conditions
At normal operation
FCP=128MHz,
Fcpp=32MHz
At normal operation
FCP=80MHz,
Fcpp=40MHz
At FLASH write
FCP=128MHz,
Fcpp=32MHz
At FLASH erase
FCP=128MHz,
Fcpp=32MHz
At sleep mode
FCP=128MHz,
Fcpp=32MHz
At bus sleep mode
FCP=128MHz,
Fcpp=32MHz
At RTC mode,
4 MHz source oscillation
When RTC mode
shutdown,
4 MHz source oscillation
ICCH5
At stop mode
When stop mode
ICCHS5
shutdown
When GDC normal
operation
FgdC=81MHz,
ICC3
VCC3 FgdC-IF=108MHz,
When GDC operation stop
When GDC side regulator
stop
When NTSC operates
IA3
AVCC3
When NTSC stop
100
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Value
Min Typ Max
Unit
Remarks
–
80
120
mA
–
60
100
mA
–
95
135
mA *3
–
95
135
mA *3
–
25
65
mA
–
15
55
mA
–
650
1800
–
800
1950
–
130
230
µA
–
280
380
µA
–
250
1400
µA
When using external
clock*1, TA=+25°C
When using crystal
TA=+25°C
When using external
clock*1, TA=+25°C
When using crystal
TA=+25°C
TA=+25°C
–
100
200
µA
TA=+25°C
–
100
200
mA
–
2
100
mA
–
70
200
µA
–
–
30
5
60
10
mA At AVR3=AVss3
mA At AVR3=AVss3
µA
DS705-00010-2v0-E
MB91590 Series
(TA:Recommended operating conditions, VCC=5.0V ± 10%, VCC3=3.3V±10%, VSS=DVSS=AVSS=0.0V)
Parameter
Symbol
Pin name
Conditions
Value
Min
Typ Max
Unit Remarks
PWM1Pn,
DVcc=4.5V
PWM1Mn,
IOH=30.0mA
PWM2Pn,
ΔVOH3
Maximum
–
–
90
mV *2
PWM2Mn,
deviation of
n=0 to 5
VOH3
PWM1Pn,
Vcc=4.5V
High current output
PWM1Mn,
IOL=30.0mA
drive capacity
PWM2Pn,
ΔVOL3
Maximum
–
–
90
mV *2
Phase-to-phase
PWM2Mn,
deviation of
deviation2
n=0 to 5
VOL2
*1: The power supply current value when the external clock is supplied from the X1 pin. Note that the power
supply current value when using the external clock is different from that using the oscillator.
*2: If PWM1P0/PWM1M0/PWM2P0/PWM2M0 of ch.0 is turned on simultaneously, the maximum deviation of
VOH3 / VOL3 for each pin is defined. Same for other channels.
*3: This product contains both program flash and WorkFlash. This parameter is defined when only one of them
is in the write/erase state.
High current output
drive capacity
Phase-to-phase
deviation1
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
101
MB91590 Series
4. AC Characteristics
(1) Main Clock Timing
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter
Source oscillation clock
frequency
Source oscillation clock
cycle time
Internal operating clock
frequency*
Internal operating clock
cycle time*
CAN PLL jitter
(when lock)
Symbol
Value
Pin Cond
name itions
FC
X0,X1
tCYL
X0,X1
FCP
FCPP
tCP
tCPP
–
–
–
–
tPJ
–
Min
Typ Max
Unit
–
4
–
MHz
–
250
–
ns
–
–
–
2
2
7.8125
25
–
–
–
–
128
40
500
500
MHz
MHz
ns
ns
–
-10
–
+10
ns
–
Remarks
–
CPU clock
Peripheral bus clock
CPU clock
Peripheral bus clock
FCP=80MHz
(4MHzMultiplied by
20)
Built-in CR oscillation
FCCR
–
–
50
100 200 kHz
frequency
*: The maximum / minimum value is defined when using the main clock and PLL clock.
X0,X1 clock timing
tCYL
X0
CAN PLL jitter
Deviation time from the ideal clock is assured per cycle out of 20, 000 cycles.
PLL output
tn-1
t3
t2
t1
tn
Ideal clock
Slow
Deviation time
t1
t2
t3
tn-1
tn
Fast
102
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
(1-2) Sub clock timing(products without s-suffix)
(TA:Recommended operating conditions, VCC5=5.0V ± 10%, VSS=DVSS=AVSS=0.0V)
Parameter
Symbol
Pin
name
FCL
X0A,X1A
Source oscillation clock
frequency
Source oscillation clock
cycle time
Conditions
Value
Min Typ Max
Unit
–
32.768
–
kHz
–
30.52
–
µs
Remarks
–
tLCYL
X0A,X1A
X0A,X1A clock timing
tLCYL
X0A
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
103
MB91590 Series
Guaranteed operation range(5V operating microcontroller section)
Internal operation clock frequency vs. Power supply voltage
Recommended guaranteed
operation range
Guaranteed
operation range
Power supply voltage VCC5 (V)
5.5
4.5
3.5
PLL guaranteed operation
range
2
4
128
Internal operation clock frequency FCP (MHz)
Note: The CPU will be reset at the power supply voltage 4V±0.3V or less.
Oscillation clock frequency vs. Internal operation clock frequency
Internal operation clock frequency
PLL clock
Main
Multipli Multipli
Multipli Multipli Multipli Multipli
Clock
...
ed by ed by
ed by 1 ed by 2 ed by 3 ed by 4
20
32
Oscillation
clock
frequency
4MHz
2MHz
4MHz
8MHz
12MHz
16MHz
...
80MHz 128MHz
Example of oscillation circuit
X0
X1
R=0Ω
4MHz
C1=10pF
C2=10pF
Note: As to the product with its clock supervisor’s initial value is “ON”, when the oscillator is unable
to start within 20ms from the stop state the clock supervisor will detect the oscillation stop. As
a result, the CPU moves to the fail safe operation.
Design your print circuit board so that the oscillator can start oscillation within 20ms.
104
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
AC characteristics are specified by the following measurement reference voltage values.
Input Signal Waveform
Output Signal Waveform
Hysteresis Input Pin (Automotive)
Output Pin
0.8Vcc5
2.4V
0.5Vcc5
0.8V
Hysteresis Input Pin (CMOS Normal)
0.7Vcc5
0.3Vcc5
Hysteresis Input Pin (CMOS Hysteresis)
0.7Vcc5
0.3Vcc5
TTL Input Pin
2.0V
0.8V
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
105
MB91590 Series
(2) Reset Input
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Con
Sym Pin
ditio
bol name
ns
Parameter
Reset input time
tRSTL
RSTX
–
Value
Unit
Remarks
Min
Max
10
–
µs
When normal
operation
–
ms
At Stop mode
Oscillation time of oscillator*+
100μs
100μs
–
µs At RTC mode
Width for reset
1μs
–
µs
input removal
*: The oscillation time of the oscillator is the time it takes for the amplitude of the oscillations to reach 90%. For
crystal oscillators, this time is between several ms and several tens of ms, for ceramic oscillators the time is
between several hundred μs and several ms, and for an external clock, the time is 0 ms.
tRSTL
RSTX
0.2Vcc5
At Stop mode
0.2Vcc5
tRSTL
RSTX
0.2 VCC5
0.2 VCC5
90% of
amplitude
X0
Internal operation
clock
100 μs
Oscillation time
of oscillator
Internal reset
106
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Oscillation stabilization
waiting time
Instruction
execution
DS705-00010-2v0-E
MB91590 Series
(3) Power-on Conditions
(TA: Recommended operating conditions, VSS=0.0V)
Parameter
Level detection
voltage
Level detection
hysteresis width
Level detection time
Slope detection
undetected standard
Power off time
Symbol
Pin
name
Conditions
–
VCC5
–
Value
Unit
Min
Typ Max
–
2.1
2.3
2.5
V
VCC5
–
–
–
125
mV
–
–
–
–
30
us
–
VCC5
–
VCC5 = at level
detection release
level time
–
–
4
tOFF
VCC5
50
–
–
–
Remarks
When turning on
power for
microcontroller
During voltage
drop
*1
mV/µs *2
ms
*3
*1: If the fluctuation of the power supply is faster than the low voltage detection time, there is the possibility to
generate or release after the power supply voltage has exceeded the detection voltage range.
*2: When setting the power supply fluctuation to this standard or less, it is possible to suppress the slope
detection. This is the standard when the power supply fluctuation is stable.
*3: This time is to start the slope detection at next power on after power down and internal charge loss.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
107
MB91590 Series
(4) Multi-function Serial
(4-1) UART timing
Bit setting: SMR: MD2=0, SMR: MD1=1, SMR: MD0=0, SMR: SCINV=0, SCR: SPI=0
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Con
Sym
Pin name ditio
bol
ns
Min
Max
Serial clock cycle time
tSCYC SCK0,SCK1
4tCPP
–
ns
SCK ↓ →
SOT delay time
tSLOVI
-30
+30
ns
Valid SIN →
SCK ↑setup time
tIVSHI
34
–
ns
SCK ↑ →
Valid SIN hold time
tSHIXI
0
–
ns
tCPP+10
–
ns
2tCPP-10
–
ns
–
33
ns
10
–
ns
20
–
ns
Parameter
SCK0,SCK1
SOT0,SOT1
Value
Unit
–
SCK0,SCK1
SIN0,SIN1
Serial clock "H"pulse width tSHSL
Remarks
Internal shift clock mode:
CL=50pF(When drive
capability is 2mA or more.)
CL=20pF(When drive
capability is 1mA)
SCK0,SCK1
Serial clock "L" pulse width tSLSH
SCK ↓ →
SOT delay time
tSLOVE
Valid SIN →
SCK ↑setup time
tIVSHE
SCK ↑ →
Valid SIN hold time
tSHIXE
SCK0,SCK1
SOT0,SOT1
–
SCK0,SCK1
SIN0,SIN1
SCK fall time
tF
SCK0,SCK1
–
5
ns
SCK rise time
tR
SCK0,SCK1
–
5
ns
External shift clock mode:
CL=50pF(When drive
capability is 2mA or more.)
CL=20pF(When drive
capability is 1mA)
Notes: AC characteristic in CLK synchronized mode.
CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
108
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
• Internal shift clock mode
tSCYC
2.4V
SCKx
0.8V
0.8V
tSLOVI
2.4V
SOTx
0.8V
tIVSHI
SINx
tSHIXI
VIH
VIH
VIL
VIL
• External shift clock mode
tSLSH
SCKx
VIL
VIL
tSLOVE
VIL
tR
2.4V
0.8V
tIVSHE
SINx
VIH
VIH
VIH
tF
SOTx
tSHSL
tSHIXE
VIH
VIH
VIL
VIL
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
109
MB91590 Series
Bit setting: SMR: MD2=0, SMR: MD1=1, SMR: MD0=0, SMR: SCINV=1, SCR: SPI=0
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Value
Cond
Sym
Pin name
Unit
itions Min Max
bol
Serial clock cycle time
tSCYC SCK0,SCK1
4tCPP
–
ns
SCK ↑ →
SOT delay time
tSHOVI
-30
+30
ns
Valid SIN →
SCK ↓setup time
tIVSLI
34
–
ns
SCK ↓ →
Valid SIN hold time
tSLIXI
0
–
ns
Serial clock "H" pulse
width
tSHSL
tCPP+10
–
ns
2tCPP-10
–
ns
–
33
ns
10
–
ns
20
–
ns
SCK0,SCK1
SOT0,SOT1
–
SCK0,SCK1
SIN0,SIN1
Remarks
Internal shift clock mode:
CL=50pF(When drive
capability is 2mA or more.)
CL=20pF(When drive
capability is 1mA)
SCK0,SCK1
Serial clock "L"pulse
width
tSLSH
SCK ↑ →
SOT delay time
tSHOVE
Valid SIN →
SCK ↓setup time
tIVSLE
SCK↓ →
Valid SIN hold time
tSLIXE
SCK0,SCK1
SOT0,SOT1
–
SCK0,SCK1
SIN0,SIN1
SCK fall time
tF
SCK0,SCK1
–
5
ns
SCK rise time
tR
SCK0,SCK1
–
5
ns
External shift clock mode:
CL=50pF(When drive
capability is 2mA or more.)
CL=20pF(When drive
capability is 1mA)
Notes: AC characteristic in CLK synchronized mode.
CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
110
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Internal shift clock mode
tSCYC
2.4V
2.4V
SCKx
0.8V
tSHOVI
2.4V
SOTx
0.8V
tIVSLI
SINx
tSLIXI
VIH
VIH
VIL
VIL
External shift clock mode
tSLSH
tSHSL
VIH
VIH
VIL
SCKx
tR
SOTx
VIH
VIL
VIL
tSHOVE
tF
2.4V
0.8V
tIVSLE
SINx
tSLIXE
VIH
VIH
VIL
VIL
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
111
MB91590 Series
Bit setting: SMR: MD2=0, SMR: MD1=1, SMR: MD0=0, SMR: SCINV=0, SCR: SPI=1
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Symbol
Pin name
Serial clock cycle time
tSCYC
SCK0,SCK1
SCK↑→SOT
delay time
tSHOVI
Valid SIN→SCK↓
setup time
tIVSLI
SCK↓→
Valid SIN hold time
tSLIXI
SOT→SCK↓
delay time
tSOVLI
Serial clock "H" pulse
width
tSHSL
Serial clock "L" pulse
width
tSLSH
SCK↑→SOT
delay time
tSHOVE
Valid SIN→SCK↓
setup time
tIVSLE
SCK↓→
Valid SIN hold time
tSLIXE
Conditions
SCK0,SCK1,
SOT0,SOT1 Internal shift clock mode
CL=50pF(When drive capability is
2mA or more.)
SCK0,SCK1, CL=20pF(When drive capability is
SIN0,SIN1 1mA)
SCK0,SCK1,
SOT0,SOT1
Value
Unit
Min
Min
4tCPP
–
ns
-30
+30
ns
34
–
ns
0
–
ns
2tCPP-30
–
ns
tCPP+10
–
ns
2tCPP-10
–
ns
–
33
ns
10
–
ns
20
–
ns
SCK0,SCK1
SCK0,SCK1,
SOT0,SOT1 External shift clock mode
CL=50pF(When drive capability is
2mA or more.)
SCK0,SCK1, CL=20pF(When drive capability is
SIN0,SIN1 1mA)
SCK fall time
tF
SCK0,SCK1
–
5
ns
SCK rise time
tR
SCK0,SCK1
–
5
ns
Notes: AC characteristic in CLK synchronized mode.
CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
112
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Internal shift clock mode
tSCYC
2.4V
SCKx
tSHOVI
0.8V
0.8V
tSOVLI
SOTx
2.4V
2.4V
0.8V
0.8V
tIVSLI
SINx
tSLIXI
VIH
VIH
VIL
VIL
External shift clock mode
tSLSH
VIH
SCKx
VIH
VIL
VIL
tR
tSHOVE
2.4V
2.4V
0.8V
0.8V
tIVSLE
SINx
VIH
VIL
tF
*
SOTx
tSHSL
tSLIXE
VIH
VIH
VIL
VIL
*: Changes when writing to TDR register
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
113
MB91590 Series
Bit setting: SMR: MD2=0, SMR: MD1=1, SMR: MD0=0, SMR: SCINV=1, SCR: SPI=1
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Symbol Pin name
Serial clock cycle time
tSCYC
SCK↓→SOT
delay time
tSLOVI
Valid SIN→SCK↑
setup time
tIVSHI
SCK↑→
Valid SIN hold time
tSHIXI
SOT→SCK↑
delay time
tSOVHI
Serial clock "H"pulse
width
tSHSL
Serial clock "L" pulse
width
tSLSH
SCK↓→SOT
delay time
tSLOVE
Valid SIN→SCK↑
setup time
tIVSHE
SCK↑→
Valid SIN hold time
tSHIXE
Conditions
SCK0,SCK1
SCK0,SCK1,
SOT0,SOT1 Internal shift clock mode
CL=50pF(When drive capability is
2mA or more.)
SCK0,SCK1, CL=20pF(When drive capability is
SIN0,SIN1 1mA)
SCK0,SCK1,
SOT0,SOT1
Value
Unit
Min
Min
4tCPP
–
ns
-30
+30
ns
34
–
ns
0
–
ns
2tCPP-30
–
ns
tCPP+10
–
ns
2tCPP-10
–
ns
–
33
ns
10
–
ns
20
–
ns
SCK0,SCK1
SCK0,SCK1,
SOT0,SOT1 External shift clock mode
CL=50pF(When drive capability is
2mA or more.)
SCK0,SCK1, CL=20pF(When drive capability is
SIN0,SIN1 1mA)
SCK fall time
tF
SCK0,SCK1
–
5
ns
SCK rise time
tR
SCK0,SCK1
–
5
ns
Notes: AC characteristic in CLK synchronized mode.
CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
114
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Internal shift clock mode
tSCYC
2.4V
SCKx
2.4V
0.8V
tSOVHI
SOTx
tSLOVI
2.4V
2.4V
0.8V
0.8V
tIVSHI
SINx
tSHIXI
VIH
VIH
VIL
VIL
External shift clock mode
tSHSL
tSLSH
tR
tF
VIH
SCKx
VIH
VIL
VIL
2.4V
2.4V
0.8V
0.8V
tIVSHE
SINx
VIL
tSLOVE
*
SOTx
VIH
tSHIXE
VIH
VIH
VIL
VIL
*: Changes when writing to TDR register
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
115
MB91590 Series
(4-2)External clock (EXT = 1): asynchronous only
(TA: Recommended operating conditions, VCC5=5.0V±10%, VSS=AVSS=0.0V)
Parameter
Symbol
Serial clock "H" pulse width
tSHSL
Serial clock "L" pulse width
tSLSH
SCK fall time
tF
SCK rise time
tR
tR
SCK
Value
Pin
name
Conditions
SCK0,
SCK1
CL=50pF
(When drive capability is
2mA or more.)
CL=20pF
(When drive capability is
1mA)
VIH
116
FUJITSU SEMICONDUCTOR CONFIDENTIAL
Min
Max
tCPP+10
-
ns
tCPP+10
-
ns
-
5
ns
-
5
ns
tF
tSLSH
tSHSL
VIL
Unit
VIH
VIL
VIL
VIH
DS705-00010-2v0-E
MB91590 Series
(4-3) I2C timing
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
SCL clock frequency
Repeat "start"
condition hold time
SDA ↓ → SCL ↓
Sym
bol
fSCL
tHDSTA
Pin name
Conditions
SCK0,SCK1,
SOT0,SOT1,
(SDA)
SCK0,SCK1,
(SCL)
Standard
mode
Min Max
High-speed
Rem
mode*3
Unit
arks
Min Max
0
100
0
400
kHz
4.0
–
0.6
–
μs
Period of "L" for SCL
clock
tLOW
SCK0,SCK1,
(SCL)
4.7
–
1.3
–
μs
Period of "H" for SCL
clock
tHIGH
SCK0,SCK1,
(SCL)
4.0
–
0.6
–
μs
Repeat "start"
condition setup time
SCL ↑ → SDA ↓
tSUSTA
4.7
–
0.6
–
μs
Data hold time
SCL ↓ → SDA ↓ ↑
tHDDAT
0
3.45*2
0
0.9*3
μs
Data setup time
SDA ↓ ↑ → SCL ↑
tSUDAT
250
–
100
–
ns
"Stop" condition setup
time
SCL ↑ → SDA ↑
tSUSTO
4.0
–
0.6
–
μs
Bus-free time between
"stop" condition and
"start" condition
tBUF
–
4.7
–
1.3
–
μs
Noise filter
tSP
–
2tCPP*4
–
2tCPP*4
–
ns
CL=50pF
SCK0,SCK1, (When drive
capability is
(SCL)
2mA or more.)
SOT0,SOT1, CL=20pF
(SDA)
(When drive
SCK0,SCK1, capability is
(SCL)
1mA)
SOT0,SOT1, R = (VP/IOL) *1
(SDA)
SCK0,SCK1,
(SCL)
SOT0,SOT1,
(SDA)
SCK0,SCK1,
(SCL)
–
*1: R and CL represent the pull-up resistance and load capacitance of the SCL and SDA output lines,
respectively.
Vp shows that the power-supply voltage of the pull-up resistor and IOL shows the VOL guarantee current.
*2: The maximum tHDDAT only has to be met if the device does not extend the "L" width (tLOW) of the SCL signal.
*3: A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device
satisfies the requirement of "tSUDAT ≥ 250 ns".
*4: tCPP is the peripheral clock cycle time. Adjust the clock of the bus in the surrounding to 8MHz or more when
use I2C.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
117
MB91590 Series
SDA
tSUDAT
tSUSTA
tBUF
tLOW
SCL
tHDSTA
tHDDAT
tHIGH
118
FUJITSU SEMICONDUCTOR CONFIDENTIAL
tHDSTA
tSP
tSUSTO
DS705-00010-2v0-E
MB91590 Series
(5)LIN-UART timing
Bit setting: ESCR: SCES=0, ECCR: SCDE=0
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Serial clock cycle time
SCK ↓ →
SOT delay time
Valid SIN →
SCK ↑setup time
SCK ↑ →
Valid SIN hold time
Serial clock "L" pulse
width
Serial clock "H" pulse
width
SCK ↓ →
SOT delay time
Sym
Pin name
bol
SCK2,SCK3,
tSCYC SCK4,SCK5,
SCK6,SCK7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
tSLOVI
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
SCK2,SCK3,
tIVSHI SCK4,SCK5,
SCK6,SCK7,
SIN2,SIN3,
tSHIXI SIN4,SIN5,
SIN6,SIN7
Con
ditio
ns
tSLOVE
Valid SIN →
SCK ↑setup time
tIVSHE
SCK ↑ →
Valid SIN hold time
tSHIXE
SCK fall time
tF
SCK rise time
tR
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7
Unit
Min
Max
5tCPP
–
ns
-50
+50
ns
tCPP+80
–
ns
0
–
ns
3tCPP-tR
–
ns
tCPP+10
–
ns
–
2tCPP+60
ns
–
tSLSH SCK2,SCK3,
SCK4,SCK5,
tSHSL SCK6,SCK7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SIN2,SIN3,
SIN4,SIN5,
SIN6,SIN7
Value
–
30
–
ns
tCPP+30
–
ns
–
10
ns
–
40
ns
Remarks
Internal shift clock
mode:
CL=80pF + 1 ∙ TTL
External shift clock
mode:
CL=80pF + 1 ∙ TTL
Notes: CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
119
MB91590 Series
Internal shift clock mode
tSCYC
2.4V
SCKx
0.8V
tSLOVI
2.4V
SOTx
0.8V
tIVSHI
SINx
tSHIXI
VIH
VIH
VIL
VIL
External shift clock mode
tSLSH
VIH
SCKx
VIH
VIL
tF
SOTx
tSHSL
VIH
VIL
VIL
tR
tSLOVE
2.4V
0.8V
tIVSHE
SINx
tSHIXE
VIH
VIH
VIL
VIL
120
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Bit setting: ESCR: SCES=1, ECCR: SCDE=0
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Serial clock cycle time
SCK ↑ →
SOT delay time
Valid SIN →
SCK ↓setup time
SCK ↓ →
Valid SIN hold time
Serial clock "H" pulse
width
Serial clock "L" pulse
width
SCK ↑ →
SOT delay time
Sym
bol
Pin name
SCK2,SCK3,
tSCYC SCK4,SCK5,
SCK6,SCK7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
tSHOVI
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
SCK2,SCK3,
tIVSLI SCK4,SCK5,
SCK6,SCK7,
SIN2,SIN3,
tSLIXI SIN4,SIN5,
SIN6,SIN7
Con
ditio
ns
tSHOVE
Valid SIN →
SCK ↓setup time
tIVSLE
SCK ↓ →
Valid SIN hold time
tSLIXE
SCK fall time
tF
SCK rise time
tR
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7
Unit
Min
Max
5tCPP
–
ns
-50
+50
ns
Remarks
Internal shift clock mode:
CL=80pF+1 · TTL
–
tSHSL SCK2,SCK3,
SCK4,SCK5,
tSLSH SCK6,SCK7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SIN2,SIN3,
SIN4,SIN5,
SIN6,SIN7
Value
tCPP+80
–
ns
0
–
ns
3tCPP-tR
–
ns
tCPP+10
–
ns
–
2tCPP+60
ns
–
30
–
ns
tCPP+30
–
ns
–
10
ns
–
40
ns
External shift clock
mode:
CL=80pF+1 · TTL
Notes: CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
121
MB91590 Series
Internal shift clock mode
tSCYC
SCKx
2.4V
0.8V
tSHOVI
2.4V
SOTx
0.8V
tIVSLI
tSLIXI
VIH
VIH
VIL
SINx
VIL
External shift clock mode
tS LS H
tS H S L
VIH
VIH
SCKx
VIL
tR
SOTx
tS LO V E
VIL
tF
2 .4 V
0 .8 V
tIV S LE
S IN x
VIH
VIL
tS LIX E
VIH
VIH
VIL
VIL
122
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
Bit setting: ESCR: SCES=0, ECCR: SCDE=1
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Sym
bol
Serial clock cycle time
tSCYC
SCK ↑ →
SOT delay time
tSHOVI
Valid SIN→
SCK ↓ setup time
tIVSLI
SCK ↓ →
Valid SIN hold time
tSLIXI
SOT →
SCK ↓ delay time
tSOVLI
Pin name
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SIN2,SIN3,
SIN4,SIN5,
SIN6,SIN7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
Value
Conditi
ons
–
Unit
Min
Max
5tCPP
–
ns
-50
+50
ns
tCPP+80
–
ns
0
–
ns
3tCPP-70
–
ns
Remarks
Internal shift clock
Mode:
CL=80pF + 1 · TTL
Notes: CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
Internal shift clock mode
tSCYC
2.4V
SCKx
0.8V
tSHOVI
0.8V
t SOVLI
SOTx
2.4V
2.4V
0.8V
0.8V
t IVSLI
SINx
t SLIXI
VIH
VIH
VIL
VIL
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
123
MB91590 Series
Bit setting: ESCR: SCES=1, ECCR: SCDE=1
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Serial clock cycle time
SCK ↓ →
SOT delay time
Valid SIN →
SCK ↑setup time
SCK ↑ →
Valid SIN hold time
SOT →
SCK ↑ delay time
Sym
Pin name
bol
SCK2,SCK3,
tSCYC SCK4,SCK5,
SCK6,SCK7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
tSLOVI
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
SCK2,SCK3,
tIVSHI SCK4,SCK5,
SCK6,SCK7,
SIN2,SIN3,
tSHIXI SIN4,SIN5,
SIN6,SIN7
SCK2,SCK3,
SCK4,SCK5,
SCK6,SCK7,
tSOVHI
SOT2,SOT3,
SOT4,SOT5,
SOT6,SOT7
Value
Conditi
ons
–
Unit
Min
Max
5tCPP
–
ns
-50
+50
ns
tCPP+80
–
ns
0
–
ns
3tCPP-70
–
ns
Remarks
Internal shift clock
mode:
CL=80pF+1 · TTL
Notes: CL is the load capacitance applied to pins during testing.
The maximum bard rate is limited by internal operation clock used and other parameters.
Refer to Hardware Manual for details.
Internal shift clock mode
tSCYC
2.4V
SCKx
2.4V
0.8V
tSOVHI
SOTx
2.4V
2.4V
0.8V
0.8V
tIVSHI
SINx
tSLOVI
VIH
VIL
124
FUJITSU SEMICONDUCTOR CONFIDENTIAL
tSHIXI
VIH
VIL
DS705-00010-2v0-E
MB91590 Series
(6) Timer input timing
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Symbol
Pin name
Conditions
tTIWH
tTIWL
TIN0,TIN1,
TIN2,TIN3,
ICU0 to ICU5,
FRCK0,FRCK1,
TIOA,TIOB
–
Input pulse width
Value
Min
Max
4tCPP
–
Unit
Remarks
ns
Timer input timing
TINx
ICUx
FRCK0,
FRCK1
TIOA, TIOB
tTIWH
tTIWL
VIH
VIH
VIL
VIL
(7) Trigger input timing
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Input pulse width
Symbol Pin name Conditions
INT0 to
INT15,
ADTG,
RX0,
RX1,
RX2
tTRGH
tTRGL
Value
Unit
Min
Max
5tCPP
–
ns
1
–
μs
Remarks
–
At stop mode
Trigger input timing
tTRGL
tTRGH
INTx
ADTG
RXx
VIH
VIH
VIL
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
VIL
125
MB91590 Series
(8) NMI input timing
(TA: Recommended operating conditions, VCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Input pulse width
Symb
ol
Pin
name
Conditions
tNMIL
NMIX
–
Value
Min
Max
4tCPP
–
Unit
Remarks
ns
NMIX input timing
tNMIL
NMIX
VIH
VIH
VIL
VIL
126
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
(9) Low voltage detection (External low-voltage detection)
(TA: Recommended operating conditions, VSS=AVSS=0.0V)
Parameter
Power supply voltage
range
Detection voltage
Hysteresis width
Symbol
Value
Pin
Unit
Conditions
name
Min Typ Max
VCC5
VCC5
–
–
–
5.5
V
VCC3
VCC3
–
–
–
3.6
V
VCC5
*1
3.9
4.1
4.3
V
VCC3
*1
2.2
2.4
2.6
V
VCC5/
VCC3
–
–
–
125
mV
VDL
VHYS
Remarks
Microcontroller
unit
GDC unit
When
power-supply
voltage falls at
microcontroller
unit and detection
level is set
initially
When
power-supply
voltage falls at
GDC unit and
detection level is
set initially
When
power-supply
voltage rises
Low voltage detection
Td
–
–
–
–
30
μs
time
Power supply voltage
VCC5
–
–
-2
–
2
V/ms *2
fluctuation rate
VCC3
*1: If the power supply voltage fluctuates within the time less than the low voltage detection time (Td), there is a
possibility that the low-voltage detection will occur or stop after the power supply voltage passes the
detection range.
*2: In order to perform the low-voltage detection at the detection voltage (VDL), be sure to suppress fluctuation
of the power supply voltage within the limits of the power supply voltage fluctuation rate.
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
127
MB91590 Series
(10) Low voltage detection (Internal low-voltage detection)
(TA: Recommended operating conditions, VSS=AVSS=0.0V)
Parameter
Symbol
Value
Pin
Unit
Conditions
name
Min Typ Max
Power supply voltage
range
VRDP5
–
–
–
1.3
V
Detection voltage
VRDL
*
0.8
0.9
1.0
V
Hysteresis width
VRHYS
–
–
–
50
mV
VCC
Remarks
When
power-supply
voltage falls
When
power-supply
voltage rises
Low voltage detection
Td
–
–
–
–
30
µs
time
*: If the fluctuation of the power supply is faster than the low voltage detection time(Td), there is a possibility to
generate or release after the power supply voltage has exceeded the detection voltage range.
128
FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E
MB91590 Series
(11) High current output slew rate
(TA: Recommended operating conditions, VCC5=AVCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Parameter
Symbol
Pin name
Conditions
tR2
tF2
P060 to P067,
P070 to P077,
P080 to P087
–
Output rise /fall
time
Value
Min
Typ
Max
15
–
100
Unit
Remarks
ns
load capacitance
85pF
Slew rate output timing
VH
VH
VL
tR2
VH=VOL2+0.9 (VOH2-VOL2)
VL=VOL2+0.1 (VOH2-VOL2)
+ +
VL
tF2
DS705-00010-2v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL
129
MB91590 Series
(12) Memory controller
(TA: Recommended operating conditions, VCC3=3.3V ± 10%, VSS=AVSS=0.0V)
Value
Parameter
Symbol
Pin name
Conditions
MEM_XCS0
MEM_XCS1
MEM_EA[24:0]
Unit
Min
Max
–
18
ns
–
18
ns
Chip Select delay time
tcso
Address delay time
tao
Data output delay time
tdo
–
18
ns
Data output → HiZ time
NOR Flash
data setup time
NOR Flash
data hold time
NOR Flash page Read
data setup time
NOR Flash page Read
data hold time
XRD delay time
tdoz
–
18
ns
tdsr
20
–
ns
0
–
ns
tdsp
20
–
ns
tdhp
0
–
ns
trdo
MEM_XRD
–
18
ns
XWR delay time
twro
MEM_XWR
–
18
ns
tdhr
MEM_ED[15:0]
–
Remarks
Output delay is reference clock is an internal clock. The reference clock of MEM_RDY is an internal clock.
NOR Flash read timing
Internal CLK
t cso
t cso
t ao
t ao
MEM_XCS0
MEM_XCS1
MEM_EA[24:0]
MEM_RDY
t rdo
t rdo
MEM_XRD
t dsr
t dhr
MEM_ED[15:0]
130
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MB91590 Series
NOR Flash write timing
Internal CLK
t cso
t cso
t ao
t ao
MEM_XCS0
MEM_XCS1
MEM_EA[24:0]
MEM_RDY
twro
t wro
MEM_XWR
t do
t do
MEM_ED[15:0]
tdo
X
NOR Flash Page read timing
Internal CLK
t cso
t cso
MEM_XCS0
MEM_XCS1
t ao
t ao
t ao
MEM_EA[24:0]
MEM_RDY
t rdo
MEM_XRD
t dsp
t dhp
t dsp
t dhp
MEM_ED[15:0]
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MB91590 Series
(13) GDC display signal
(13-1) Clock
AC timing of video interface clock signal
(TA: Recommended operating conditions, VCC3=3.3V ± 10%, VSS=AVSS=0.0V)
Parameter
DCLKI frequency
DCLKI "H"width
DCLKI "L"width
Symbol
Pin name
Fdclki0
Thdclki0
Tldclki0
DCLKI
Value
Min
Max
–
18
18
54
–
–
Unit
Remarks
MHz
ns
ns
DCLK
–
54
MHz *1
(internal)
DCLKO frequency
Fdclko0
DCLKO
–
54
MHz *2
*1: The internal display clock of PLL synchronous mode is generated with internal PLL of display clock
prescaler.
*2: DCLKI or PLL internal display clock is output.
DCLK frequency
Tldclk0
Apply only DCLKI synchronous mode. (reference clock= DCLKI)
AC timing of video interface input signal
(TA: Recommended operating conditions, VCC3=3.3V ± 10%, VSS=AVSS=0.0V)
Parameter
Symbol
HSYNC input setup time
HSYNC input hold time
VSYNC input pulse width
Pin name
Tshsync0
Thhsync0
Twvsync0
HSYNC(i)
VSYNC(i)
Value
Min Typ Max
4
1
1
–
–
–
–
–
–
Unit
Remarks
ns
ns
HSYNC
Display input signal timing
DCLK In
1/Fdclkin
Thdclkin
Tldclkin
Twhsyncn
HSYNCn (i)
Tshsyncn Thhsyncn
Twvsyncn
VSYNCn (i)
Tsvsyncn
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Thvsyncn
DS705-00010-2v0-E
MB91590 Series
(13-2) AC Characteristics of Display Output Signal
Clock Mode
There are multiple clock modes for display output clocks, as shown in Table 1. The AC timing parameters
vary depending on modes. The AC timing parameters are specified for each mode.
Table 1 Clock Mode for Display Output
Setting register bit field
DCM1
DCM3
Clock mode name
CKS DCKed DCKD DCKinv
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
Other than 0
Other than 0
Other than 0
Other than 0
0
0
0
0
Other than 0
Other than 0
Other than 0
Other than 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Built-in PLL standard mode
Built-in PLL reverse edge mode
Cannot be used.
Built-in PLL delay mode
Built-in PLL reverse edge and delay mode
Built-in PLL both edge and delay mode
DCLKI input standard mode
DCLKI input reverse edge mode
Cannot be used.
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MB91590 Series
AC Timing Parameters
This section describes parameters used for AC timing specifications. Select whether you use the DCLKO
reverse edge mode, depending on the use/non-use of delay mode.
When the delay mode is not used:
Use the DCLKO reverse edge mode when the external display device (TFT) receives the signal at the rising
edge of DCLKO.
Use the DCLKO standard mode when the external display device (TFT) receives the signal at the falling
edge of DCLKO.
When the delay mode is used:
Use the DCLKO standard mode when the external display device (TFT) receives the signal at the rising
edge of DCLKO.
Use the DCLKO reverse edge mode when the external display device (TFT) receives the signal at the
falling edge of DCLKO.
Note: Clock duty ratio when the clock frequency division ratio is even or odd
AC specifications use the half-cycle of the display output clock DCLKO as a parameter. In AC
specifications, the first half-cycle is indicated as tdcyc_f, and the second half-cycle is indicated as tdcyc_l.
Note that clock duty ratio will not be 50%:50% when the clock frequency division ratio (specified in SC
field of DCM1 register) is odd. If the clock frequency division ratio is odd, the first half-cycle tdcyc_f
becomes different from the second half-cycle tdcyc_l.
Figure 1 Clock duty ratio when the clock frequency division ratio is even or odd
When the frequency division ratio is even
tdcyc
tdcyc_f
tdcyc_l
tdcyc / 2
tdcyc / 2
DCLKO
(DCKinv=1)
Example: When the frequency division ratio is odd (frequency division ratio = 3)
tdcyc
tdcyc_f
tdcyc_l
DCLKO
(DCKinv=1)
tdcyc / 3
2×(tdcyc / 3)
When the clock frequency division ratio is 5, tdcyc_f : tdcyc_l will be 2:3.
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Built-in PLL reverse edge mode (DCM3.DCKinv=1)
Figure 2 shows the setup/hold definition when the external display device receives the signal at the
rising edge of DCLKO.
Figure 2 Built-in PLL Reverse Edge Mode Setup/Hold Definition
Use the clock mode of DCM3 register DCKinv=1
tdcyc
tdcyc_f
tdcyc_l
DCLKO
(DCKinv=1)
tdohd
tdosu
Data signal
Data signal:
ROUT7~0, GOUT7~0, BOUT7~0, HSYNC, VSYNC, CSOUT/GV, DEOUT
Built-in PLL standard mode (DCM3.DCKinv=0)
Figure 3 shows the setup/hold definition when the external display device receives the signal at the
falling edge of DCLKO.
Figure 3 Built-in PLL Standard Mode Setup/Hold Definition
Use the clock mode of DCM3 register DCKinv=0
tdcyc
tdcyc_l
tdcyc_f
DCLKO
(DCKinv=0)
tdosu
tdohd
Data signal
Data signal:
ROUT7~0, GOUT7~0, BOUT7~0, HSYNC, VSYNC, CSOUT/GV, DEOUT
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MB91590 Series
Built-in PLL delay mode (DCM3.DCKinv=0)
Figure 4 shows the setup/hold definition when the external display device receives the signal at the
rising edge of DCLKO. (Example: When frequency division ratio = 4)
Figure 4 Built-in PLL Delay Mode Setup/Hold Definition
tdcyc
tpllcyc
DCLKO
(DCKinv=0)
(delay=0)
tdcyc_f
tdcyc_l
DCLKO
(DCKinv=0)
(delay=3)
tdosu
ROUT7-0
GOUT7-0
BOUT7-0
HSYNC
VSYNC
DEOUT
CSOUT/GV
tdohd
Built-in PLL reverse edge and delay mode (DCM3.DCKinv=1)
Figure 5 shows the setup/hold definition when the external display device receives the signal at the
falling edge of DCLKO. (Example: When frequency division ratio = 4)
Figure 5 Built-in PLL Reverse Edge and Delay Mode Setup/Hold Definition
tdcyc
tpllcyc
DCLKO
(DCKinv=1)
(delay=0)
tdcyc_f
tdcyc_l
DCLKO
(DCKinv=1)
(delay=3)
ROUT7-0
GOUT7-0
BOUT7-0
HSYNC
VSYNC
DEOUT
CSOUT/GV
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tdosu
tdohd
DS705-00010-2v0-E
MB91590 Series
Built-in PLL both edge and delay mode (DCM3.DCKinv=0)
Figure 6 shows the setup/hold definition when the external display device (TFT) receives the signal both
at the rising edge and the falling edge of DCLKO. (Example: When frequency division ratio = 4)
Although there are two sampling locations in both edge mode; one at the rising edge and the other at the
falling edge, the values of setup/hold definition are same.
Figure 6 Built-in PLL Both Edge and Delay Mode Setup/Hold Definition
tdcyc
tpllcyc
DCLKO
(delay=0)
tdcyc_f
tdcyc_l
DCLKO
(delay=3)
tdosu
ROUT7-0
GOUT7-0
BOUT7-0
HSYNC
VSYNC
DEOUT
CSOUT/GV
tdohd
tdosu
tdohd
Setup/Hold Definition in Delay Mode
The delay mode is a mode realized with DCLKO delay function, and it can provide delay to DCLKO signal
output itself. This can be used when both the following conditions are satisfied.
The internal PLL is used to generate DCLKO (CKS field of DCM register = 0)
The frequency division ratio to the internal PLL of DCLKO is 2 or more (SC field of DCM register > 0)
The delay value is set as the unit for internal PLL clock by DCKD field of DCM3 register. The meanings of
DCKD setting value are shown below.
When the internal PLL
frequency division ratio = 2
DCKD
000000
000100
When the internal PLL frequency
division ratio > 2
Delay
No additional delay
+1 PLL clock
DCKD
000000
000010
000100
000110
:
111110
Delay
No additional delay
+2 PLL clock
+3 PLL clock
+4 PLL clock
:
+17 PLL clock
In delay mode, tdcyc_f and tdcyc_l are defined by the delay value above (e.g. "2" of "+2 PLL clock") as shown
below.
tdcyc_f = Delay value × tpllcyc
tdcyc_l = tdcyc – tdcyc_f
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MB91590 Series
DCLKI Input Standard Mode (DCM3.DCKinv=0)
Figure 7 shows the setup/hold definition when the external display device (TFT) receives the signal at
the falling edge of DCLKO.
Figure 7 DCLKI Input Standard Mode Setup/Hold Definition
Use the clock mode of DCM3 register DCKinv=0
tdcyc
tdcyc_l
tdcyc_f
DCLKO
(DCKinv= 0)
tdohd
tdosu
Data signal
Data signal:
ROUT7~0, GOUT7~0, BOUT7~0, HSYNC, VSYNC, CSOUT/GV, DEOUT
DCLKI Input Reverse Edge Mode (DCM3.DCKinv=1)
Figure 8 shows the setup/hold definition when the external display device (TFT) receives the signal at
the rising edge of DCLKO.
Figure 8 DCLKI Input Reverse Edge Mode Setup/Hold Definition
Use the clock mode of DCM3 register DCKinv=1
tdcyc
tdcyc_l
tdcyc_f
DCLKO
(DCKinv=1)
tdosu
tdohd
Data signal
Data signal:
ROUT7~0, GOUT7~0, BOUT7~0, HSYNC, VSYNC, CSOUT/GV, DEOUT
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AC Timing Specifications
Parameter
Symbol
min.
tdcyc
18.5 ns
Display clock cycle time
External load condition 50 pF
DCLKO Reference
Parameter
Symbol
edge
IO drive capability setting
10 mA
2 mA
Setup time
tdosu
tdcyc_f - 8.5ns
tdcyc_f - 10.2ns
neg, pos *
Hold time
tdohd
tdcyc l - 1.7ns
tdcyc_l - 3.3ns
*: DCLKO reference edge: This is the reference clock edge for setup time and hold time.
Pos = The external display device receives the signal at the rising edge of DCLKO.
Neg = The external display device receives the signal at the falling edge of DCLKO.
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MB91590 Series
(13-3) Video capture input
1/Fc i
CCLK
BIN7-2
GIN7-2
RIN7-2
HSIN
VSIN
VIN7-0
Parameter
Tc ih d
Tc is u
Symbol
Pin name
Capture input frequency
Fci
CCLK
Capture input setup time
Tcisu
Capture input hold time
Tcihd
BIN7-2, GIN7-2,
RIN7-2,
HSIN, VSIN,
VIN7-0
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
Value
Min Max
Unit
–
81.0
MHz
3.0
–
ns
0.0
–
ns
Remarks
DS705-00010-2v0-E
MB91590 Series
(14) GDC command trigger signal
Parameter
Input trigger pulse width
Symbol
Pin name
Ttrg
CMDTRG
Value
Min
Max
160
–
Unit
Remarks
ns
CMDTRG
Ttrg
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MB91590 Series
5. A/D Converter
(1) Electrical Characteristics
(TA: Recommended operating conditions, VCC5=AVCC5=5.0V ± 10%, VSS=AVSS=0.0V)
Sym
bol
Pin name
Resolution
–
Total error
Parameter
Value
Unit
Min
Typ
Max
–
–
–
10
bit
–
–
–
–
±3
LSB
Non linearity error
–
–
–
–
LSB
Differential linearity error
–
–
AN0 to
AN31
AN0 to
AN31
–
AVSS1.5LSB
AVRH53.5LSB
–
±2.5
±1.9
Zero transition voltage
VOT
Full-scale transition voltage
VFST
Sampling time
tSMP
–
1.2
–
Compare time
tCMP
–
1.8
A/D conversion time
tCNV
Analog port input current
IAIN
Analog input voltage
VAIN
–
AN0 to
AN31
AN0 to
AN31
Reference voltage
V
V
1LSB=
(AVCC-AVSS) /
1024
–
μs
*1
–
–
μs
*1
3.0
–
–
μs
-5
–
+5
μA
*1
VAVSS ≤
VAIN ≤ VAVCC
AVSS
–
AVRH5
V
–
AVRH5
4.5
–
5.5
V
AVRL
AVSS
–
0.0
–
V
–
–
4.0
mA
–
–
6.0
μA
–
600
900
μA
–
–
5
μA
–
–
4
LSB
IAH
IR
IRH
Variation between channels
AVSS+
2.5LSB
AVRH5+
0.5LSB
LSB
AVRH
IA
Power supply current
–
–
AVCC
AVRH5
AN0 to
AN31
Remarks
AVRH5 ≤
AVCC5
*2
*2
*1: Time for each channel.
*2: Power supply current (VCC = AVCC = 5.0 V) is specified if A/D converter is not operating and CPU is stopped.
Note: Be sure to use the clock with a frequency between 8MHz and 17MHz for the ADC compare clock in order
to ensure its accuracy.
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(2) Definition of A/D Converter Terms
Resolution
: Analog variation that is recognized by an A/D converter.
Non linearity error
: Deviation of the actual conversion characteristics from a straight line that
connects the zero transition point ("00 0000 0000"← →"00 0000 0001") to the
full-scale transition point ("111111 1110" ← →"11 1111 1111").
Differential linearity
error
: Deviation of the input voltage from the ideal value that is required to change the
output code by LSB.
Total error
: Difference between the actual value and the theoretical value. The total error
includes zero transition error, full-scale transition error, and non linearity error.
Total error
3FF
3FE
Actual conversion
characteristics
1.5 LSB
Digital output
3FD
{1 LSB × (N - 1) + 0.5 LSB}
004
VNT
(Actually-measured value)
003
Actual conversion
characteristics
Ideal characteristics
002
001
0.5 LSB
AVSS
AVRH5
Analog input
VNT - {1LSB} × (N - 1) + 0.5LSB}
1LSB
AVRH5 - AVSS
[V]
1024
Total error of digital output N =
1LSB (Ideal value) =
[LSB]
N: A/D converter digital output value.
VOT (Ideal value) = AVSS + 0.5 LSB[V]
VFST (Ideal value) = AVRH5 - 1.5 LSB[V]
VNT: Voltage at which the digital output changes from (N - 1) to N.
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MB91590 Series
Non linearity error
Differential linearity error
Ideal
characteristics
3FF
Actual conversion
characteristics
{1 LSB × (N - 1)
+ VOT}
Digital output
3FD
N+1
(actual
measurement
value)
VNT (actual
measurement value)
004
Actual conversion
characteristics
003
Actual conversion
characteristics
VFST
Digital output
3FE
N
V(N + 1) T
(actual measurement
value)
VNT
(actual measurement value)
N-1
002
Ideal characteristics
Actual conversion
characteristics
N-2
001
VOT (actual measurement value)
AVSS
(AVRL)
AVRH5
AVSS
(AVRL)
Analog input
Linearity error of digital output N =
AVRH5
Analog input
VNT - {1LSB} × (N - 1) + VOT
1LSB
V(N + 1) T - VNT
Differential linearity error of digital output N =
[LSB]
- 1 [LSB]
1LSB
1LSB =
VOT
VFST
VFST - VOT
1022
[V]
: Voltage at which the digital output changes from “000H” to “001 H”.
: Voltage at which the digital output changes from “3FE H” to “3FF H”.
(3) Notes on Using A/D Converter
<About the output impedance of the analog input of external circuit>
· External impedance values of the external input of 4.2 kΩ or lower (sampling time = 1.2 μs@ machine
clock of 16 MHz) are recommended. When the external impedance is too high, the sampling time for
analog voltages may not be sufficient. In this case, it is recommended to connect the capacitor
(approx. 0.1 μF) to the analog input pin.
Analog input circuit model
R
Comparator
Analog input
C
During sampling: ON
MB91590series
R
4.0kΩ (Max)
C
16.1pF (Max)
Note: Listed values must be considered as reference values.
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6. Flash memory
(1) Electrical Characteristics
Parameter
Min
Value
Typ
Max
Unit
–
200
800
ms
–
300
1100
ms
–
400
2000
ms
–
700
3700
ms
8-bit writing time
–
9
288
µs
16-bit writing time
–
12
384
µs
ECC writing time
–
9
288
µs
Sector erase time
Remarks
8 Kbyte sector*1,
excluding internal
preprogramming time
8 Kbyte sector*1,
including internal
preprogramming time
64 Kbyte sector*1,
excluding internal
preprogramming time
64 Kbyte sector*1,
including internal
preprogramming time
Exclusive of overhead time at
system level*1
Exclusive of overhead time at
system level*1
Exclusive of overhead time at
system level*1
1,000 cycles/
20 years,
Temperature at writing/erasing
Erase cycle*2/
10,000 cycles/
Tj<+105°C,
–
–
–
Data retain time
10 years,
Average TA=+85°C*3
100,000 cycles/
5 years
*1: The guaranteed value for erasure up to 100,000 cycles.
*2: Number of erase cycles for each sector.
*3: This value comes from the technology qualification (using Arrhenius equation to translate high temperature
measurements into normalized value at + 85°C).
(2) Notes
While the Flash memory is written, shutdown of the external power (Vcc5) is prohibited.
In the application system where Vcc5 might be shut down while writing, be sure to turn the power off by
using an external voltage detector.
To put it concretely, after the external power supply voltage falls below the detection
voltage (VDL*1), hold Vcc5 at 2.7V or more within the duration calculated by the following expression:
Td*1[µs] + (period of PCLK [µs] x 257) + 50 [µs]
*1: See “4.AC Characteristics (9) Low-voltage detection (External low-voltage detection) ”
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MB91590 Series
ORDERING INFORMATION
Part number
Package
MB91F591BPMC-GSE1
MB91F591BSPMC-GSE1
MB91F591BHPMC-GSE1
MB91F591BHSPMC-GSE1
MB91F592BPMC-GSE1
MB91F592BSPMC-GSE1
MB91F592BHPMC-GSE1
208-pin plastic LQFP
(FPT-208P-M06)
MB91F592BHSPMC-GSE1
MB91F594BPMC-GSE1
MB91F594BSPMC-GSE1
MB91F594BHPMC-GSE1
MB91F594BHSPMC-GSE1
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DS705-00010-2v0-E
r2.0
MB91590 Series
PACKAGE DIMENSIONS
Dimension of LQFP-208(FPT-208P-M06)
208-pin plastic LQFP
Lead pitch
0.50 mm
Package width ×
package length
28.0 × 28.0 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.70 mm MAX
Weight
2.55 g
Code
(Reference)
P-LFQFP208-28×28-0.50
(FPT-208P-M06)
208-pin plastic LQFP
(FPT-208P-M06)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
30.00±0.20(1.181±.008)SQ
* 28.00±0.10(1.102±.004)SQ
156
0.145±0.055
(.006±.002)
105
157
104
0.08(.003)
Details of "A" part
+0.20
1.50 –0.10
+.008 (Mounting height)
.059 –.004
INDEX
0°~8°
208
LEAD No.
53
1
52
0.50(.020)
C
0.22±0.05
(.009±.002)
0.10±0.05
(.004±.002)
(Stand off)
"A"
0.60±0.15
(.024±.006)
0.25(.010)
0.08(.003) M
2003-2010 FUJITSU SEMICONDUCTOR LIMITED F208027S-c-3-5
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
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MB91590 Series
Dimension of HQFP-208(FPT-208P-M04)(Under consideration)
208-pin plastic QFP
Lead pitch
0.50 mm
Package width ×
package length
28.0 mm × 28.0 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
3.95 mm MAX
Weight
5.71g
Remark
Low heat resistance type
(FPT-208P-M04)
208-pin plastic QFP
(FPT-208P-M04)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
30.60±0.20(1.205±.008)SQ
+0.03
156
0.17 –0.08
+.001
.007 –.003
105
157
104
0.08(.003)
Details of "A" part
+0.20
3.75 –0.30
+.008 (Mounting height)
.148 –.012
+0.10
INDEX
0°~8°
208
LEAD No.
53
1
52
0.50(.020)
C
0.22±0.05
(.009±.002)
"A"
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.40 –0.15
+.004
.016 –.006
(Stand off)
0.25(.010)
0.08(.003) M
2003-2010 FUJITSU SEMICONDUCTOR LIMITED F208020S-c-3-6
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
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MAJOR CHANGES IN THIS EDITION
Page
Section
-
-
Page Change Results (See this data sheet for the detail.)
Contact the sales representative for the detail of changed parts.
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MB91590 Series
FUJITSU SEMICONDUCTOR LIMITED
Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,
Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
North and South America
FUJITSU SEMICONDUCTOR AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://us.fujitsu.com/micro/
Asia Pacific
FUJITSU SEMICONDUCTOR ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://sg.fujitsu.com/semiconductor/
Europe
FUJITSU SEMICONDUCTOR EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/semiconductor/
FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD.
30F, Kerry Parkside, 1155 Fang Dian Road,
Pudong District, Shanghai 201204, China
Tel : +86-21-6146-3688 Fax : +86-21-6146-3660
http://cn.fujitsu.com/fss/
Korea
FUJITSU SEMICONDUCTOR KOREA LTD.
902 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fsk/
FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fsp/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely
for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU
SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When
you develop equipment incorporating the device based on such information, you must assume any responsibility arising
out of such use of the information.
FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as
license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of
FUJITSU SEMICONDUCTOR or any third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of
any third-party's intellectual property right or other right by using such information. FUJITSU SEMICONDUCTOR
assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would
result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use,
including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not
designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless
extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury,
severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use
requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or
damages arising in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such
failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the
regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department
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FUJITSU SEMICONDUCTOR CONFIDENTIAL
DS705-00010-2v0-E