PDTA114T series PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open Rev. 07 — 20 April 2007 Product data sheet 1. Product profile 1.1 General description PNP Resistor-Equipped Transistors (RET) family in small plastic packages. Table 1. Product overview Type number Package NPN complement NXP JEITA JEDEC PDTA114TE SOT416 SC-75 - PDTC114TE PDTA114TK SOT346 SC-59A TO-236 PDTC114TK PDTA114TM SOT883 SC-101 - PDTC114TM PDTA114TS[1] SOT54 SC-43A TO-92 PDTC114TS PDTA114TT SOT23 - TO-236AB PDTC114TT PDTA114TU SOT323 SC-70 - PDTC114TU [1] Also available in SOT54A and SOT54 variant packages (see Section 2). 1.2 Features n 100 mA output current capability n Built-in bias resistors n Simplifies circuit design n Reduces component count n Reduces pick and place costs 1.3 Applications n Digital applications n Control of IC inputs n Cost-saving alternative to BC857 series in digital applications n Low current peripheral driver 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - −50 V IO output current - - −100 mA R1 bias resistor 1 (input) 7 10 13 kΩ PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 2. Pinning information Table 3. Pinning Pin Description Simplified outline Symbol SOT54 1 input (base) 2 output (collector) 3 GND (emitter) 2 1 2 3 R1 1 001aab347 3 006aaa217 SOT54A 1 input (base) 2 output (collector) 3 GND (emitter) 2 1 2 R1 1 3 001aab348 3 006aaa217 SOT54 variant 1 input (base) 2 output (collector) 3 GND (emitter) 2 1 2 3 R1 1 001aab447 3 006aaa217 SOT23; SOT323; SOT346; SOT416 1 input (base) 2 GND (emitter) 3 output (collector) 3 3 R1 1 1 2 2 006aaa144 sym009 SOT883 1 input (base) 2 GND (emitter) 1 3 output (collector) 2 3 3 R1 Transparent top view 1 2 sym009 PDTA114T_SER_7 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 2 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PDTA114TE SC-75 plastic surface-mounted package; 3 leads SOT416 PDTA114TK SC-59A plastic surface-mounted package; 3 leads SOT346 PDTA114TM SC-101 leadless ultra small plastic package; 3 solder lands; SOT883 body 1.0 × 0.6 × 0.5 mm PDTA114TS[1] SC-43A plastic single-ended leaded (through hole) package; SOT54 3 leads PDTA114TT - plastic surface-mounted package; 3 leads SOT23 PDTA114TU SC-70 plastic surface-mounted package; 3 leads SOT323 [1] Also available in SOT54A and SOT54 variant packages (see Section 2 and Section 9). 4. Marking Table 5. Marking codes Type number Marking code[1] PDTA114TE 11 PDTA114TK 23 PDTA114TM DE PDTA114TS TA114T PDTA114TT *11 PDTA114TU *23 [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China PDTA114T_SER_7 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 3 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - −50 V VCEO collector-emitter voltage open base - −50 V VEBO emitter-base voltage open collector - −5 V IO output current - −100 mA ICM peak collector current single pulse; tp ≤ 1 ms - −100 mA Ptot total power dissipation Tamb ≤ 25 °C PDTA114TE [1] - 150 mW PDTA114TK [1] - 250 mW PDTA114TM [2][3] - 250 mW PDTA114TS [1] - 500 mW PDTA114TT [1] - 250 mW PDTA114TU [1] - 200 mW Tj junction temperature - 150 °C Tamb ambient temperature −65 +150 °C Tstg storage temperature −65 +150 °C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. [3] Device mounted on an FR4 PCB with 60 µm copper strip line, standard footprint. 6. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Typ Max Unit PDTA114TE [1] - - 833 K/W PDTA114TK [1] - - 500 K/W PDTA114TM [2][3] - - 500 K/W PDTA114TS [1] - - 250 K/W PDTA114TT [1] - - 500 K/W PDTA114TU [1] - - 625 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. [3] Device mounted on an FR4 PCB with 60 µm copper strip line, standard footprint. PDTA114T_SER_7 Product data sheet Min © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 4 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 7. Characteristics Table 8. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current VCB = −50 V; IE = 0 A - - −100 nA ICEO collector-emitter cut-off current VCE = −30 V; IB = 0 A - - −1 µA VCE = −30 V; IB = 0 A; Tj = 150 °C - - −50 µA IEBO emitter-base cut-off current VEB = −5 V; IC = 0 A - - −100 nA hFE DC current gain VCE = −5 V; IC = −1 mA 200 - - VCEsat collector-emitter saturation voltage IC = −10 mA; IB = −0.5 mA - - −150 mV R1 bias resistor 1 (input) 7 10 13 kΩ Cc collector capacitance - - 3 pF 006aaa554 600 VCB = −10 V; IE = ie = 0 A; f = 1 MHz 006aaa555 −1 hFE VCEsat (V) (1) 400 −10−1 (2) 200 0 −10−1 (1) (2) (3) (3) −1 −10 −102 −10−2 −10−1 IC (mA) −10 −102 IC (mA) VCE = −5 V IC/IB = 20 (1) Tamb = 150 °C (1) Tamb = 100 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = −40 °C (3) Tamb = −40 °C Fig 1. DC current gain as a function of collector current; typical values Fig 2. Collector-emitter saturation voltage as a function of collector current; typical values PDTA114T_SER_7 Product data sheet −1 © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 5 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 8. Package outline 3 3 0.45 0.15 0.6 0.2 3.0 1.7 2.5 1.3 1.75 0.9 1.45 0.7 1 2 1 0.30 0.15 2 0.25 0.10 Dimensions in mm 04-11-04 Fig 3. Package outline SOT416 (SC-75) 0.62 0.55 0.55 0.47 0.50 0.35 1.9 1 0.26 0.10 Dimensions in mm 04-11-11 Fig 4. Package outline SOT346 (SC-59A/TO-236) 0.50 0.46 0.45 0.38 4.2 3.6 3 0.30 0.22 0.48 0.40 1.02 0.95 0.65 0.30 0.22 1.3 1.0 3.1 2.7 0.95 0.60 1.8 1.4 1 2 4.8 4.4 2 2.54 3 1 0.20 0.12 5.2 5.0 0.35 Dimensions in mm 03-04-03 Fig 5. Package outline SOT883 (SC-101) 14.5 12.7 Dimensions in mm 04-11-16 Fig 6. Package outline SOT54 (SC-43A/TO-92) 0.45 0.38 0.45 0.38 4.2 3.6 1.27 4.2 3.6 1.27 0.48 0.40 3 max 1 2.5 max 0.48 0.40 1 2 4.8 4.4 5.08 2.54 2 4.8 4.4 2.54 3 1.27 3 5.2 5.0 5.2 5.0 14.5 12.7 Dimensions in mm Fig 7. Package outline SOT54A 04-06-28 Dimensions in mm 05-01-10 Fig 8. Package outline SOT54 variant PDTA114T_SER_7 Product data sheet 14.5 12.7 © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 6 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 3.0 2.8 1.1 0.9 2.2 1.8 1.1 0.8 0.45 0.15 3 3 0.45 0.15 2.5 1.4 2.1 1.2 2.2 1.35 2.0 1.15 1 1 2 1.9 0.48 0.38 Dimensions in mm Fig 9. Package outline SOT23 (TO-236AB) 0.4 0.3 0.15 0.09 04-11-04 0.25 0.10 1.3 Dimensions in mm 04-11-04 Fig 10. Package outline SOT323 (SC-70) PDTA114T_SER_7 Product data sheet 2 © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 7 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 9. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description 3000 5000 10000 PDTA114TE SOT416 4 mm pitch, 8 mm tape and reel -115 - -135 PDTA114TK SOT346 4 mm pitch, 8 mm tape and reel -115 - -135 PDTA114TM SOT883 2 mm pitch, 8 mm tape and reel - - -315 PDTA114TS SOT54 bulk, straight leads - -412 - SOT54A tape and reel, wide pitch - - -116 tape ammopack, wide pitch - - -126 SOT54 variant bulk, delta pinning - -112 - PDTA114TT SOT23 4 mm pitch, 8 mm tape and reel -215 - -235 PDTA114TU SOT323 4 mm pitch, 8 mm tape and reel -115 - -135 [1] For further information and the availability of packing methods, see Section 12. PDTA114T_SER_7 Product data sheet Packing quantity © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 8 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 10. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes PDTA114T_SER_7 20070420 Product data sheet - PDTA114T_SERIES_6 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • • • • • • • • Legal texts have been adapted to the new company name where appropriate. Type number PDTA114TEF removed Section 1.2 “Features”: amended Section 1.3 “Applications”: amended Table 4 “Ordering information”: added Table 5 “Marking codes”: enhanced table note section Table 6 “Limiting values”: ICM peak collector current conditions added Figure 1, 2, 7 and 8: added Figure 3, 4, 5, 6, 9 and 10: superseded by minimized package outline drawings Section 9 “Packing information”: added Section 11 “Legal information”: updated PDTA114T_SERIES_6 20040802 Product specification - PDTA114T_SERIES_5 PDTA114T_SERIES_5 20030909 Product specification - PDTA114T_SERIES_4 PDTA114T_SERIES_4 20030410 Product specification - PDTA114TE_2 PDTA114TK_3 PDTA114TS_2 PDTA114TT_3 PDTA114TU_3 PDTA114TE_2 19980723 Preliminary specification - PDTA114TE_1 PDTA114TK_3 19980515 Product specification - PDTA114TK_2 PDTA114TS_2 19980515 Product specification - PDTA114TS_1 PDTA114TT_3 19990413 Objective specification - PDTA114TT_2 PDTA114TU_3 19990413 Product specification - PDTA114TU_2 PDTA114T_SER_7 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 9 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 11. Legal information 11.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 11.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 11.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 11.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 12. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] PDTA114T_SER_7 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 07 — 20 April 2007 10 of 11 PDTA114T series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = open 13. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 11.1 11.2 11.3 11.4 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6 Packing information. . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contact information. . . . . . . . . . . . . . . . . . . . . 10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 April 2007 Document identifier: PDTA114T_SER_7