LTM4648 Low VIN, 10A Step-Down µModule Regulator Features Description n n n The LTM ® 4648 is a 10A low V IN step-down DC/DC µModule® (micromodule) regulator. Included in the package are the switching controller, power FETs, inductor and all support components. Operating over an input voltage range of 2.375V to 5.5V, the LTM4648 supports an output voltage range of 0.6V to 5V, set by a single external resistor. This high efficiency design delivers up to 10A continuous current. Only bulk input and output capacitors are needed. 10A DC Output Current Input Voltage Range: 2.375V to 5.5V Output Voltage Range: 0.6V to 5V No Heat Sink or Current Derating Up to 85°C Ambient Temperature n ±1.5% Maximum Total DC Output Error n Multiphase Operation with Current Sharing n Remote Sense Amplifier n Built-In Temperature Monitor n Selectable Pulse-Skipping Mode/Burst Mode® Operation for High Efficiency at Light Load n Soft-Start/Voltage Tracking n Protection: Output Overvoltage and Overcurrent Foldback nSee LTM4649 for Up to 16V Operation IN n9mm × 15mm × 4.92mm BGA Package n High switching frequency and a current mode architecture enable a very fast transient response to line and load changes without sacrificing stability. The device supports frequency synchronization, programmable multiphase operation and output voltage tracking for supply rail sequencing. Fault protection features include overvoltage protection, overcurrent protection and thermal shutdown. The LTM4648 is offered in a small 9mm × 15mm × 4.92mm BGA package. The LTM4648 is RoHS compliant. For up to 16VIN operation, see the LTM4649. Applications Telecom, Networking and Industrial Equipment Point of Load Regulation n n L, LT, LTC, LTM, Burst Mode, µModule, PolyPhase, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 5705919, 5929620, 6100678, 6144194, 6177787, 6304066 and 6580258. Other patents pending. Typical Application Efficiency and Power Loss at 5V and 3.3V Input 2.375V to 5.5V Input, 1.5V Output DC/DC µModule Regulator DIFFP DIFFN LTM4648 MODE VOUT_LCL DIFFOUT TRACK/SS 0.1µF GND VFB 6.65k 4648 TA01a 100 2.8 12 95 2.4 10 90 2.0 85 1.6 80 1.2 75 0.8 70 VIN = 3.3V 0.4 VIN = 5V 0 10 8 65 0 2 4 6 LOAD CURRENT (A) 4648 TA01b LOAD CURRENT (A) VOUT 1.5V 100µF 10A 6.3V ×2 VOUT POWER LOSS (W) PINS NOT USED IN THIS CIRCUIT: INTVCC SW RUN PHMODE TEMP COMP PGOOD CLKIN CLKOUT 22µF 10V ×2 VIN EFFICIENCY (%) VIN 2.375V TO 5.5V Current Derating, 5V to 1.5VOUT with No Heat Sink 8 6 4 400LFM 200LFM 0LFM 2 0 0 40 60 80 100 20 AMBIENT TEMPERATURE (°C) 120 4648 TA01c 4648f For more information www.linear.com/LTM4648 1 LTM4648 Absolute Maximum Ratings (Note 1) VIN................................................................ –0.3V to 6V VOUT, INTVCC, PGOOD, RUN (Note 5)........... –0.3V to 6V MODE, CLKIN, TRACK/SS, DIFFP, DIFFN, DIFFOUT, PHASMD................................ –0.3V to INTVCC VFB............................................................. –0.3V to 2.7V COMP (Note 6)........................................... –0.3V to 2.7V INTVCC Peak Output Current (Note 6)...................100mA Internal Operating Temperature Range (Note 2)................................................... –55°C to 125°C Storage Temperature Range................... –55°C to 125°C Peak Solder Reflow Body Temperature.................. 245°C Pin Configuration A B GND 1 VIN F G GND CLKOUT 2 CLKIN TOP VIEW C D E NC FREQ 3 PHMODE 4 MODE TRACK/SS 5 TEMP 6 NC 7 PGOOD SW COMP FB DIFFN 8 DIFFP DIFFOUT 9 VOUT_LCL 10 11 GND VOUT BGA PACKAGE 68-LEAD (9mm × 15mm × 4.92mm) TJMAX = 125°C, θJA = 14°C/W, θJCbottom = 5°C/W, θJCtop = 20°C/W WEIGHT = 1.0g Order Information LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION LTM4648EY#PBF LTM4648EY#TRPBF LTM4648Y 68-Lead (9mm × 15mm × 4.92mm) BGA –40°C to 125°C TEMPERATURE RANGE LTM4648IY#PBF LTM4648IY#TRPBF LTM4648Y 68-Lead (9mm × 15mm × 4.92mm) BGA –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ 2 4648f For more information www.linear.com/LTM4648 LTM4648 Electrical Characteristics The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 5V per typical application. SYMBOL PARAMETER VIN Input DC Voltage CONDITIONS l 2.375 5.5 V VOUT(RANGE) Output Voltage Range l 0.6 5 V VOUT(DC) Output Voltage, Total Variation with Line and Load l 1.477 1.50 1.523 V 1.1 1.25 1.4 V CIN = 10µF × 1,COUT = 100µF Ceramic, 100µF POSCAP, RFB = 6.65k, MODE = GND, VIN = 2.375V to 5.5V, IOUT = 0A to 10A MIN TYP MAX UNITS Input Specifications VRUN RUN Pin On Threshold VRUN Rising VRUN(HYS) RUN Pin On Hysteresis 150 mV IQ(VIN) Input Supply Bias Current VIN = 5V, VOUT = 1.5V, Burst Mode Operation VIN = 5V, VOUT = 1.5V, Pulse-Skipping Mode VIN = 5V, VOUT = 1.5V, Switching Continuous Shutdown, RUN = 0, VIN = 5V 5.5 25 100 2.5 mA mA mA mA IS(VIN) Input Supply Current VIN = 5.5V, VOUT = 1.5V, IOUT = 10A 3.3 A Output Specifications IOUT(DC) Output Continuous Current Range VIN = 5V, VOUT = 1.5V (Note 4) ΔVOUT(LINE) VOUT Line Regulation Accuracy VOUT = 1.5V, VIN from 2.375V to 5.5V IOUT = 0A l 0 0.010 0.04 10 %/V ΔVOUT(LOAD) VOUT Load Regulation Accuracy VOUT = 1.5V, IOUT = 0A to 10A, VIN = 5V (Note 4) l 0.15 0.5 % VOUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 100µF Ceramic, 100µF POSCAP, VIN = 5V, VOUT = 1.5V 15 mV ΔVOUT(START) Turn-On Overshoot COUT = 100µF Ceramic, 100µF POSCAP, VOUT = 1.5V, IOUT = 0A, VIN = 5V 20 mV tSTART Turn-On Time COUT = 100µF Ceramic, 100µF POSCAP, No Load, TRACK/SS = 0.01µF, VIN = 5V 5 ms ΔVOUTLS Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, COUT = 100µF Ceramic, 100µF POSCAP, VIN = 5V, VOUT = 1.5V 60 mV tSETTLE Settling Time for Dynamic Load Step Load: 0% to 50% to 0% of Full Load, COUT = 100µF Ceramic, 100µF POSCAP, VIN = 5V, VOUT=1.5V 20 µs IOUTPK Output Current Limit VIN = 5V, VOUT = 1.5V (Note 4) 11 A A Control Specifications VFB Voltage at VFB Pin IFB Current at VFB Pin IOUT = 0A, VOUT = 1.5V VOVL Feedback Overvoltage Lockout ITRACK/SS Track Pin Soft-Start Pull-Up Current TRACK/SS = 0V tON(MIN) Minimum On-Time (Note 3) RFBHI Resistor Between VOUT_LCL and VFB Pins DIFFP, DIFFN CM RANGE Common Mode Input Range VIN = 5V, Run > 1.4V VDIFFOUT(MAX) Maximum DIFFOUT Voltage IDIFFOUT = 300µA VOSNS+ = VDIFFOUT = 1.5V, IDIFFOUT = 100µA l l 0.593 0.60 0.607 V –12 –25 nA 0.64 0.66 0.68 V 1.0 1.2 1.4 µA 90 9.90 10 0 ns 10.10 3.6 INTVCC – 1.4 kΩ V V VOS Input Offset Voltage AV Differential Gain 1 4 V/V mV SR Slew Rate 2 V/µs 4648f For more information www.linear.com/LTM4648 3 LTM4648 Electrical Characteristics The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 5V per typical application. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS GBP Gain Bandwidth Product CMRR Common Mode Rejection (Note 6) 3 MHz 60 dB IDIFFOUT DIFFOUT Current Sourcing RIN Input Resistance VOSNS+ to GND 80 kΩ VPGOOD PGOOD Trip Level VFB With Respect to Set Output VFB Ramping Negative VFB Ramping Positive –10 10 % % VPGL PGOOD Voltage Low IPGOOD = 2mA 0.1 0.3 V 5 5.25 5.2 5.35 V V 2 mA INTVCC Linear Regulator VINTVCC Internal VCC Voltage VINTVCC Load Reg INTVCC Load Regulation 2.375V ≤ VIN ≤ 5V VIN = 5.5V 4.8 5.15 ICC = 0mA to 50mA 0.5 % Oscillator and Phase-Locked Loop fSYNC SYNC Capture Range 250 400 fS Nominal Switching Frequency RMODE Mode Input Resistance VIH_CLKIN Clock Input Level High VIL_CLKIN Clock Input Level Low kHz 500 kHz 250 kΩ 2.0 V 0.8 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Notes are automatically numbered when you apply the note style. Note 2: The LTM4648 is tested under pulsed load conditions such that TJ ≈ TA. The LTM4648E is guaranteed to meet performance specifications over the 0°C to 125°C internal operating temperature range. Specifications over the –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4648I is guaranteed to meet specifications over the –40°C to 125°C internal operating temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 4 450 650 V Note 3: The minimum on-time condition is tested at wafer sort. Note 4: See output current derating curves for different VIN, VOUT and TA. Note 5: Guaranteed by design. Note 6: 100% tested at wafer level. 4648f For more information www.linear.com/LTM4648 LTM4648 Typical Performance Characteristics 3.3VIN Efficiency 5VIN Efficiency 100 95 95 95 90 90 90 85 80 75 65 0 2 4 6 80 VOUT = 1V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V 70 65 10 8 85 75 VOUT = 1V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V 70 0 LOAD CURRENT (A) 2 4 6 90 80 70 70 EFFICIENCY (%) EFFICIENCY (%) 100 90 60 50 40 30 0 0.01 70 65 0 10 4648 G03 4648 G06 20µs/DIV 3.3VIN, 1VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 1210 CERAMIC CAPACITORS NO CFF CAPACITOR 30 CCM Burst Mode OPERATION PULSE SKIPPING 0.1 1 LOAD CURRENT (A) 10 4648 G05 5VIN, 1VOUT Load Transient 3.3VIN, 1.5VOUT Load Transient 5VIN, 1.5VOUT Load Transient VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED IOUT 5A/DIV AC-COUPLED IOUT 5A/DIV AC-COUPLED IOUT 5A/DIV AC-COUPLED 4648 G07 20µs/DIV 5VIN, 1VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 6.3V 1210 CERAMIC CAPACITORS NO CFF CAPACITOR 10 8 IOUT 5A/DIV AC-COUPLED 40 4648 G04 6 VOUT 100mV/DIV AC-COUPLED 50 0 0.01 4 3.3VIN, 1VOUT Load Transient 60 10 2 LOAD CURRENT (A) CCM, Burst Mode and PulseSkipping Mode Efficiency (VIN = 5V, VOUT = 1.5V) 20 CCM Burst Mode OPERATION PULSE SKIPPING 0.1 1 LOAD CURRENT (A) VOUT = 1V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V 4648 G02 80 10 80 LOAD CURRENT (A) CCM, Burst Mode and PulseSkipping Mode Efficiency (VIN = 3.3V, VOUT = 1.5V) 20 85 75 10 8 4648 G01 100 EFFICIENCY (%) 100 EFFICIENCY (%) EFFICIENCY (%) 2.5VIN Efficiency 100 4648 G08 20µs/DIV 3.3VIN, 1.5VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 6.3V 1210 CERAMIC CAPACITORS NO CFF CAPACITOR 4648 G09 20µs/DIV 5VIN, 1.5VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 6.3V 1210 CERAMIC CAPACITORS NO CFF CAPACITOR 4648f For more information www.linear.com/LTM4648 5 LTM4648 Typical Performance Characteristics 3.3VIN, 2.5VOUT Load Transient 5VIN, 2.5VOUT Load Transient 5VIN, 3.3VOUT Load Transient VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED IOUT 5A/DIV AC-COUPLED IOUT 5A/DIV AC-COUPLED IOUT 5A/DIV AC-COUPLED 4648 G10 20µs/DIV 3.3VIN, 2.5VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 6.3V 1210 CERAMIC CAPACITORS NO CFF CAPACITOR 4648 G11 20µs/DIV 5VIN, 2.5VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 6.3V 1210 CERAMIC CAPACITORS NO CFF CAPACITOR Output Start-Up Output Start-Up RUN 2V/DIV RUN 2V/DIV PGOOD 2V/DIV PGOOD 2V/DIV VOUT 0.5V/DIV IIN 0.5A/DIV VOUT 0.5V/DIV IIN 0.5A/DIV 10ms/DIV 5VIN 1.5VOUT IO = 0A START-UP CSS = 0.1µF 4648 G12 20µs/DIV 5VIN, 3.3VOUT, 5A TO 10A LOAD STEP, 5A/µs COUT = 1 • 22µF, 6.3V, 1210 + 2 • 100µF 6.3V 1210 CERAMIC CAPACITORS NO CFF CAPACITOR 4648 G13 Output Short Circuit 10ms/DIV 5VIN 1.5VOUT IO = 10A START-UP CSS = 0.1µF 4648 G14 Output Short Circuit VOUT 0.5V/DIV IIN 0.5V/DIV VOUT 0.5V/DIV IIN 0.5A/DIV 5VIN 1.5VOUT IOUT = 0A 6 50µs/DIV 4648 G15 5VIN 1.5VOUT IOUT = 10A 50µs/DIV 4648 G16 4648f For more information www.linear.com/LTM4648 LTM4648 Pin Functions PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY. GND (A1-A5, A7-A11, B1, B9-B11, E1, F3, F5, G1-G7): Ground Pins for Both Input and Output Returns. All ground pins need to connect with large copper areas underneath the unit. TEMP (A6): Onboard Temperature Diode for Monitoring the VBE Junction Voltage Change with Temperature. See the Applications Information section. CLKIN (B3): External Synchronization Input to Phase Detector Pin. A clock on this pin will enable synchronization with forced continuous operation. See the Applications Information section. PHMODE (B4): This pin can be tied to GND, tied to INTVCC or left floating. This pin determines the relative phases between the internal controllers and the phasing of the CLKOUT signal. See Table 2 in the Operation section. MODE (B5): Mode Select Input. Connect this pin to INTVCC to enable Burst Mode operation. Connect to ground to enable forced continuous mode of operation. Floating this pin will enable pulse-skipping mode of operation. NC (B7-B8, C3-C4): No Connection Pins. Either float these pins or connect them to GND for thermal purpose. VIN (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. VOUT (C10-C11, D10-D11, E9-E11, F9-F11, G10-G11): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. See Table 1. SW (C5): Switching Node of the Circuit. This pin is used to check the switching frequency. Leave pin floating. A resistor-capacitor snubber can be placed from SW to PGND to eliminate high frequency switch node ringing. See the Applications Information section. PGOOD (C7): Output Voltage Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point. VOUT_LCL (G9): This pin is connected to the top of the internal top feedback resistor for the output. When the remote sense amplifier is used in the LTM4648, connect the remote sense amplifier output DIFFOUT to VOUT_LCL to drive the 10k top feedback resistor. When the remote sense amplifier is not used in the LTM4648, connect VOUT_LCL to VOUT directly. FREQ (E3): Frequency Set Pin. A 10µA current is sourced from this pin. A resistor from this pin to ground sets a voltage, that in turn, programs the operating frequency. Alternatively, this pin can be driven with a DC voltage that can set the operating frequency. See the Applications Information section. The LTM4648 has an internal resistor to program frequency to 450kHz. TRACK/SS (E5): Output Voltage Tracking Pin and SoftStart Inputs. The pin has a 1.2µA pull-up current source. A capacitor from this pin to ground will set a soft-start ramp rate. In tracking, the regulator output can be tracked to a different voltage. The different voltage is applied to a voltage divider then the slave output’s track pin. This voltage divider is equal to the slave output’s feedback divider for coincidental tracking. See the Applications Information section. FB (E7): The Negative Input of the Error Amplifier. Internally, this pin is connected to VOUT_LCL with a 10k precision resistor. Different output voltages can be programmed with an additional resistor between VFB and ground pins. In PolyPhase operation, tying the VFB pins together allows for parallel operation. See the Applications Information section for details. RUN (F1): Run Control Pin. A voltage above 1.4V will turn on the module. The RUN pin has a 1µA pull-up current, once the RUN pin reaches 1.2V an additional 4.5µA pull-up current is added to this pin. CLKOUT (F2): Output Clock Signal for PolyPhase Operation. The phase of CLKOUT is determined by the state of the PHMODE pin. INTVCC (F4): Internal 5V LDO for Driving the Control Circuitry and the Power MOSFET Drivers. The 5V LDO has a 100mA current limit. For more information www.linear.com/LTM4648 4648f 7 LTM4648 Pin Functions COMP (F6): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Tie all COMP pins together in parallel operation. DIFFN (F7): Input to the Remote Sense Amplifier. This pin connects to the ground remote sense point. Connect to GND when not used. DIFFP (F8): Input to the Remote Sense Amplifier. This pin connects to the output remote sense point. Connect to GND when not used. DIFFOUT (G8): Output of the Remote Sense Amplifier. This pin connects to the VOUT_LCL pin for remote sense applications. Otherwise float when not used. Block Diagram INTVCC VOUT_LCL 1M VIN R1 > 1.4V = ON < 1.1V = OFF MAX = 5V VOUT 10k PGOOD RUN VIN BOOST CONVERTER 1µF R2 VIN 2.375V TO 5.5V + CIN COMP 10k 0.5% 5V M1 INTERNAL COMP 0.35µH GND POWER CONTROL VFB fSET + VOUT 1.5V 10A GND INTERNAL LOOP FILTER INTVCC + CLKIN MODE DIFF AMP – 250k + RfSET 115k TRACK/SS CSS COUT M2 – 6.65k 1% VOUT DIFFN DIFFP DIFF_OUT INTVCC TEMP 1µF 4648 F01 Figure 1. Simplified LTM4648 Block Diagram 8 4648f For more information www.linear.com/LTM4648 LTM4648 Operation Power Module Description The LTM4648 is a high performance single output standalone nonisolated switching mode DC/DC power supply. It can provide up to 10A output current with few external input and output capacitors. This module provides precisely regulated output voltage programmable via an external resistor from 0.6VDC to 5VDC over a 2.375V to 5.5V input range. The typical application schematic is shown in Figure 18. The LTM4648 has an integrated constant-frequency current mode regulator, power MOSFETs, inductor, and other supporting discrete components. The typical switching frequency is 450kHz. For switching noise-sensitive applications, it can be externally synchronized from 350kHz to 650kHz. See the Applications Information section. With current mode control and internal feedback loop compensation, the LTM4648 module has sufficient stability margins and good transient performance with a wide range of output capacitors, especially with all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit in an overcurrent condition. An internal overvoltage monitor protects the output voltage in the event of an overvoltage >10%. The top MOSFET is turned off and the bottom MOSFET is turned on until the output is cleared. Pulling the RUN pin below 1.1V forces the regulator into a shutdown state. The TRACK/SS pin is used for programming the output voltage ramp and voltage tracking during start-up. See the Application Information section. The LTM4648 is internally compensated to be stable over all operating conditions. Table 3 provides a guideline for input and output capacitances for several operating conditions. The Linear Technology µModule Power Design Tool will be provided for transient and stability analysis. The VFB pin is used to program the output voltage with a single external resistor to ground. A remote sense amplifier is provided in the LTM4648 for accurately sensing output voltages ≤3.3V at the load point. Multiphase operation can be easily employed with the synchronization inputs using an external clock source. See application examples. High efficiency at light loads can be accomplished with selectable Burst Mode operation using the MODE pin. These light load features will accommodate battery operation. Efficiency graphs are provided for light load operation in the Typical Performance Characteristics section. A diode connected PNP transistor with base and collector grounded is included in the module as a general purpose single-ended temperature monitor. The temperature monitor is intended to be used as a general temperature monitor, see Applications Information section The switching node pins are available for functional operation monitoring and a resistor-capacitor snubber circuit can be careful placed on the switching node pin to ground to dampen any high frequency ringing on the transition edges. See the Applications Information section for details. 4648f For more information www.linear.com/LTM4648 9 LTM4648 Applications Information The typical LTM4648 application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 3 for specific external capacitor requirements for particular applications. VIN to VOUT Step-Down Ratios There are restrictions in the VIN to VOUT step-down ratio that can be achieved for a given input voltage. The VIN to VOUT minimum dropout is a function of load current and at very low input voltage and high duty cycle applications output power may be limited as the internal top power MOSFET is not rated for 10A operation at higher ambient temperatures. At very low duty cycles the minimum 90ns on-time must be maintained. See the Frequency Adjustment section and temperature derating curves. Output Voltage Programming The PWM controller has an internal 0.6V ±1% reference voltage. As shown in the Block Diagram, a 10k 0.5% internal feedback resistor connects the VOUT_LCL and VFB pins together. When the remote sense amplifier is used, then DIFFOUT is connected to the VOUT_LCL pin. If the remote sense amplifier is not used, then VOUT_LCL connects to VOUT. The output voltage will default to 0.6V with no feedback resistor. Adding a resistor RFB from VFB to ground programs the output voltage: VOUT 10k + RFB = 0.6V • RFB RFB(k) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 OPEN 15 10 6.65 4.99 3.09 2.21 1.37 For parallel operation of N LTM4648, the following equation can be used to solve for RFB: RFB = 10k N VOUT –1 0.6 In parallel operation the VFB pins have an IFB current of 20nA maximum each channel. To reduce output voltage 10 Input Capacitors The LTM4648 module should be connected to a low AC impedance DC source. Additional input capacitors are needed for the RMS input ripple current rating. The ICIN(RMS) equation which follows can be used to calculate the input capacitor requirement. Typically 22µF X7R ceramics are a good choice with RMS ripple current ratings of ~2A each. A 47µF to 100µF surface mount aluminum electrolytic bulk capacitor can be used for more input bulk capacitance. This bulk input capacitor is only needed if the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. If low impedance power planes are used, then this bulk capacitor is not needed. For a buck converter, the switching duty cycle can be estimated as: D= VOUT VIN Without considering the inductor ripple current, for each output, the RMS current of the input capacitor can be estimated as: Table 1. VFB Resistor Table vs Various Output Voltages VOUT(V) error due to this current, an additional VOUT_LCL pin can be tied to VOUT, and an additional RFB resistor can be used to lower the total Thevenin equivalent resistance seen by this current. ICIN(RMS) = IOUT(MAX) η% • D • (1− D) In the previous equation, η% is the estimated efficiency of the power module. The bulk capacitor can be a switcherrated electrolytic aluminum capacitor or a Polymer capacitor. Output Capacitors The LTM4648 is designed for low output voltage ripple noise. The bulk output capacitors defined as COUT are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, low ESR Polymer capacitor or ceramic capacitors. The typical output capacitance range is from 200µF to 470µF. Additional 4648f For more information www.linear.com/LTM4648 LTM4648 Applications Information output filtering may be required by the system designer if further reduction of output ripple or dynamic transient spikes is required. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 5A/µs transient. The table optimizes total equivalent ESR and total bulk capacitance to optimize the transient performance. Stability criteria are considered in the Table 3 matrix, and the Linear Technology µModule Power Design Tool will be provided for stability analysis. Multiphase operation will reduce effective output ripple as a function of the number of phases. Application Note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance should be considered carefully as a function of stability and transient response. The Linear Technology µModule Power Design Tool can calculate the output ripple reduction as the number of implemented phase’s increases by N times. Burst Mode Operation The LTM4648 is capable of Burst Mode operation in which the power MOSFETs operate intermittently based on load demand, thus saving quiescent current. For applications where maximizing the efficiency at very light loads is a high priority, Burst Mode operation should be applied. To enable Burst Mode operation, simply tie the MODE pin to INTVCC. During Burst Mode operation, the peak current of the inductor is set to approximately 30% of the maximum peak current value in normal operation even though the voltage at the COMP pin indicates a lower value. The voltage at the COMP pin drops when the inductor’s average current is greater than the load requirement. As the COMP voltage drops below 0.5V, the burst comparator trips, causing the internal sleep line to go high and turn off both power MOSFETs. In sleep mode, the internal circuitry is partially turned off, reducing the quiescent current. The load current is now being supplied from the output capacitors. When the output voltage drops, causing COMP to rise, the internal sleep line goes low, and the LTM4648 resumes normal operation. The next oscillator cycle will turn on the top power MOSFET and the switching cycle repeats. Pulse-Skipping Mode Operation In applications where low output ripple and high efficiency at intermediate currents are desired, pulse-skipping mode should be used. Pulse-skipping operation allows the LTM4648 to skip cycles at low output loads, thus increasing efficiency by reducing switching loss. Floating the MODE pin enables pulse-skipping operation. With pulse-skipping mode at light load, the internal current comparator may remain tripped for several cycles, thus skipping operation cycles. This mode has lower ripple than Burst Mode operation and maintains a higher frequency operation than Burst Mode operation. Forced Continuous Operation In applications where fixed frequency operation is more critical than low current efficiency, and where the lowest output ripple is desired, forced continuous operation should be used. Forced continuous operation can be enabled by tying the MODE pin to ground. In this mode, inductor current is allowed to reverse during low output loads, the COMP voltage is in control of the current comparator threshold throughout, and the top MOSFET always turns on with each oscillator pulse. During start-up, forced continuous mode is disabled and inductor current is prevented from reversing until the LTM4648’s output voltage is in regulation. Frequency Selection The LTM4648 device is internally programmed to 450kHz switching frequency to improve power conversion efficiency. It is recommended for all of the application. If desired, a resistor can be connected from the FREQ pin to INTVCC to adjust the FREQ pin DC voltage to increase the switching frequency between default 450kHz and maximum 650kHz. Figure 2 shows a graph of frequency setting verses FREQ pin DC voltage. Figure 18 shows an example of frequency programmed to 650kHz. Please be aware FREQ pin has an accurate 10µA current sourced from this pin when calculate the resistor value. 4648f For more information www.linear.com/LTM4648 11 LTM4648 Applications Information Multiphase Operation 900 800 For outputs that demand more than 10A of load current, multiple LTM4648 devices can be paralleled to provide more output current and reduced input and output voltage ripple. FREQUENCY (kHz) 700 600 500 400 The CLKOUT signal together with CLKIN pin can be used to cascade additional power stages to achieve the multiphase power supply solution. Tying the PHMODE pin to INTVCC, GND, or (floating) generates a phase difference (between MODE/PLLIN and CLKOUT) of 180°, 120°, or 90° respectively as shown in Table 2. A total of 4 phases can be cascaded to run simultaneously with respect to each other by programming the PHMODE pin of each LTM4648 channel to different levels. Figure 3 shows a 3-phase design and 4-phase design example for clock phasing with the PHASMD table. 300 200 100 0 0 0.5 1 1.5 2 FREQ PIN VOLTAGE (V) 2.5 4648 F02 Figure 2. Operating Frequency vs FREQ Pin Voltage PLL and Frequency Synchronization The LTM4648 device operates over a range of frequencies to improve power conversion efficiency. The nominal switching frequency is 450kHz. It can also be synchronized from 350kHz to 650kHz with an input clock that has a high level above 2V and a low level below 0.8V at the CLKIN pin. Once the LTM4648 is synchronizing to an external clock frequency, it will always running in Forced Continuous Operation. The 350kHz low end operation frequency limit is put in place to limit inductor ripple current. Table 2. PHASEMD and CLKOUT Signal Relationship PHASEMD GND FLOAT INTVCC CLKOUT 120° 90° 180° The LTM4648 device is an inherently current mode controlled device, so parallel modules will have good current sharing. This will balance the thermals in the design. Tie the COMP, VFB, TRACK/SS and RUN pins of each LTM4648 together to share the current evenly. Figures 20 and 21 show a schematic of the parallel design. 3-PHASE DESIGN 120 DEGREE 120 DEGREE CLKOUT 0 PHASE GND CLKOUT CLKIN 120 PHASE VOUT GND PHASMD CLKOUT CLKIN 240 PHASE VOUT GND PHASMD CLKIN VOUT PHASMD 4-PHASE DESIGN CLKOUT 0 PHASE FLOAT CLKIN VOUT PHASMD 90 DEGREE 90 PHASE FLOAT CLKOUT CLKIN VOUT PHASMD 90 DEGREE 180 PHASE FLOAT CLKOUT 90 DEGREE CLKIN VOUT PHASMD 270 PHASE FLOAT CLKOUT CLKIN VOUT PHASMD 4648 F03 Figure 3. Examples of 3-Phase, 4-Phase Operation with PHASMD Table 12 4648f For more information www.linear.com/LTM4648 LTM4648 Applications Information A multiphase power supply could significantly reduce the amount of ripple current in both the input and output capacitors. The RMS input ripple current is reduced by, and the effective ripple frequency is multiplied by, the number of phases used (assuming that the input voltage is greater than the number of phases used times the output voltage). The output ripple amplitude is also reduced by the number of phases used. Input RMS Ripple Current Cancellation Application Note 77 provides a detailed explanation of multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a graph is displayed representing the RMS ripple current reduction as a function of the number of interleaved phases (see Figure 4). 0.60 Minimum On-Time Minimum on-time tON is the smallest time duration that the LTM4648 is capable of turning on the top MOSFET. It is determined by internal timing delays, and the gate charge required turning on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit and care should be taken to ensure that: VOUT >t VIN • FREQ ON(MIN) If the duty cycle falls below what can be accommodated by the minimum on-time, the controller will begin to skip cycles. The output voltage will continue to be regulated, but the output ripple and current will increase. The minimum on-time can be increased by lowering the switching frequency. A good rule of thumb is to use an 110ns on-time. 1-PHASE 2-PHASE 3-PHASE 4-PHASE 6-PHASE 0.55 0.50 RMS INPUT RIPPLE CURRENT DC LOAD CURRENT 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 DUTY FACTOR (VO/VIN) 4648 F04 Figure 4. Input RMS Current Ratios to DC Load Current as a Function of Duty Cycle 4648f For more information www.linear.com/LTM4648 13 LTM4648 Applications Information Soft-Start The TRACK/SS pin of the master can be controlled by a capacitor placed on the master regulator TRACK/SS pin to ground. A 1.2µA current source will charge the TRACK/ SS pin up to the reference voltage and then proceed up to INTVCC. After the 0.6V ramp, the TRACK/SS pin will no longer be in control, and the internal voltage reference will control output regulation from the feedback divider. Foldback current limit is disabled during this sequence of turn-on during tracking or soft-starting. The TRACK/SS pins are pulled low when the RUN pin is below 1.2V. The total soft-start time can be calculated as: output, then the slave will coincident track with the master until it reaches its final value. The master will continue to its final value from the slave’s regulation point. Voltage tracking is disabled when VTRACK is more than 0.6V. RTA in Figure 5 will be equal to the RFB for coincident tracking. Figure 6 shows the coincident tracking waveforms. Ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the master’s TRACK/SS pin. As mentioned above, the TRACK/SS pin has a control range from 0V to 0.6V. The master’s TRACK/ SS pin slew rate is directly equal to the master’s output slew rate in Volts/Time. The equation: ⎛ C ⎞ tSS = ⎜ SS ⎟ • 0.6 ⎝ 1.2µA ⎠ MR • 10k = RTB SR Regardless of the mode selected by the MODE pin, the regulator channels will always start in pulse-skipping mode up to TRACK/SS = 0.5V. Between TRACK/SS = 0.5V and 0.54V, it will operate in forced continuous mode and revert to the selected mode once TRACK/SS > 0.54V. In order to track with another channel once in steady state operation, the LTM4648 is forced into continuous mode operation as soon as VFB is below 0.54V regardless of the setting on the MODE pin. where MR is the master’s output slew rate and SR is the slave’s output slew rate in Volts/Time. When coincident tracking is desired, then MR and SR are equal, thus RTB is equal the 10k. RTA is derived from equation: Output Voltage Tracking Output voltage tracking can be programmed externally using the TRACK/SS pins. The output can be tracked up and down with another regulator. The master regulator’s output is divided down with an external resistor divider that is the same as the slave regulator’s feedback divider to implement coincident tracking. The LTM4648 uses an accurate 60.4k resistor internally for the top feedback resistor for each channel. Figure 6 shows an example of coincident tracking. Equations: ⎛ 10k ⎞ • VTRACK VSLAVE = ⎜ 1+ ⎝ RTA ⎟⎠ VTRACK is the track ramp applied to the slave’s track pin. VTRACK has a control range of 0V to 0.6V, or the internal reference voltage. When the master’s output is divided down with the same resistor values used to set the slave’s 14 RTA = 0.6V VFB VFB VTRACK + − 10k RFB RTB where VFB is the feedback voltage reference of the regulator, and VTRACK is 0.6V. Since RTB is equal to the 10k top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then RTA is equal to RFB with VFB = VTRACK. Therefore RTB = 10k, and RTA = 10k in Figure 4. In ratiometric tracking, a different slew rate maybe desired for the slave regulator. RTB can be solved for when SR is slower than MR. Make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach it final value before the master output. Each of the TRACK/SS pins will have the 1.2µA current source on when a resistive divider is used to implement tracking on that specific channel. This will impose an offset on the TRACK/SS pin input. Smaller values resistors with the same ratios as the resistor values calculated from the above equation can be used. For example, where the 10k is used then a 1.0k can be used to reduce the TRACK/SS pin offset to a negligible value. 4648f For more information www.linear.com/LTM4648 LTM4648 Applications Information VIN C7 22µF 16V C10 22µF 16V R2 10k SOFT-START CAPACITOR CSS VIN INTVCC C3 22µF 16V C2 22µF 16V R1 10k C11 100µF 6.3V ×2 VOUT_LCL TRACK/SS LTM4648 DIFFOUT RUN FREQ DIFFP MODE DIFFN VFB GND VIN PGOOD VOUT COMP MASTER RAMP OR OUTPUT RTA 10k RTB 10k VIN INTVCC TRACK/SS RUN RFB1 6.65k PGOOD VOUT COMP LTM4648 DIFFOUT DIFFP MODE DIFFN GND C6 100µF 6.3V ×2 VOUT_LCL FREQ VFB VOUT2 1.5V 10A VOUT1 1.2V 10A 4628 F05 RFB 10k Figure 5. Dual Outputs (1.5V and 1.2V) with Tracking Power Good OUTPUT VOLTAGE (V) MASTER OUTPUT SLAVE OUTPUT The PGOOD pins are open-drain pins that can be used to monitor valid output voltage regulation. This pin monitors a ±7.5% window around the regulation point. A resistor can be pulled up to a particular supply voltage no greater than 6V maximum for monitoring. Stability Compensation TIME 4648 F06 Figure 6. Output Coincident Tracking Waveform The module has already been internally compensated for all output voltages. Table 3 is provided for most application requirements. The Linear Technology µModule Power Design Tool will be provided for other control loop optimization. 4648f For more information www.linear.com/LTM4648 15 LTM4648 Applications Information Run Enable The RUN pin has an enable threshold of 1.40V maximum, typically 1.25V with 150mV of hysteresis. It controls the turn-on of the µModule. The RUN pin can be pulled up to VIN for 5V operation, or a 5V Zener diode can be placed on the pin and a 10k to 100k resistor can be placed up to higher than 5V input for enabling the µModule. The RUN pin can also be used for output voltage sequencing. In parallel operation the RUN pins can be tied together and controlled from a single control. See the Typical Application circuits in Figures 20 and 21. The RUN pin can also be left floating. The RUN pin has a 1µA pull-up current source that increases to 4.5µA during ramp-up. Differential Remote Sense Amplifier An accurate differential remote sense amplifier is provided in the LTM4648 to sense low output voltages accurately at the remote load points. This is especially true for high current loads. It is very important that the DIFFP and DIFFN are connected properly at the output, and DIFFOUT is connected to VOUT_LCL. Review the parallel schematics in Figures 20 and 21. SW Pins The SW pin is generally for testing purposes by monitoring the pin. The SW pin can also be used to dampen out switch node ringing caused by LC parasitic in the switched current path. Usually a series R-C combination is used called a snubber circuit. The resistor will dampen the resonance and the capacitor is chosen to only affect the high frequency ringing across the resistor. If the stray inductance or capacitance can be measured or approximated then a somewhat analytical technique can be used to select the snubber values. The inductance is usually easier to predict. It combines the power path board inductance in combination with the MOSFET interconnect bond wire inductance. First the SW pin can be monitored with a wide bandwidth scope with a high frequency scope probe. The ring frequency can be measured for its value. The impedance Z can be calculated: ZL = 2π • f • L 16 where f is the resonant frequency of the ring, and L is the total parasitic inductance in the switch path. If a resistor is selected that is equal to Z, then the ringing should be dampened. The snubber capacitor value is chosen so that its impedance is equal to the resistor at the ring frequency. Calculated by: 1 Z = C 2π • f •C These values are a good place to start with. Modification to these components should be made to attenuate the ringing with the least amount the power loss. Temperature Monitoring Measuring the absolute temperature of a diode is possible due to the relationship between current, voltage and temperature described by the classic diode equation: ⎛ V ⎞ ID = IS • e ⎜ D ⎟ ⎝ η • VT ⎠ or I VD = η • VT • ln D IS where ID is the diode current, VD is the diode voltage, η is the ideality factor (typically close to 1.0) and IS (saturation current) is a process dependent parameter. VT can be broken out to: VT = k•T q where T is the diode junction temperature in Kelvin, q is the electron charge and k is Boltzmann’s constant. VT is approximately 26mV at room temperature (298K) and scales linearly with Kelvin temperature. It is this linear temperature relationship that makes diodes suitable temperature sensors. The IS term in the equation above is the extrapolated current through a diode junction when the diode has zero volts across the terminals. The IS term varies from process to process, varies with temperature, and by definition must always be less than ID. Combining all of the constants into one term: KD = η•k q For more information www.linear.com/LTM4648 4648f LTM4648 Applications Information where KD = 8.62−5, and knowing ln(ID/IS) is always positive because ID is always greater than IS, leaves us with the equation that: I VD = T(KELVIN) • KD • ln D IS where VD appears to increase with temperature. It is common knowledge that a silicon diode biased with a current source has an approximately –2mV/°C temperature relationship (Figure 7), which is at odds with the equation. In fact, the IS term increases with temperature, reducing the ln(ID/IS) absolute value yielding an approximately –2mV/°C composite diode voltage slope. DIODE VOLTAGE (V) 1.0 ID = 100µA 0.8 ∆VD 0.6 0.4 –173 –73 27 TEMPERATURE (°C) 127 4648 F07 Figure 7. Diode Voltage, VD, vs Temperature T (°C) for Different Bias Currents An external diode connected PNP transistor can be pulled up to VIN with a resistor to set the current to 100µA for using this diode connected transistor as a general temperature monitor by monitoring the diode voltage drop with temperature, or a specific temperature monitor can be used that injects two currents that are at a 10:1 ratio for very accurate temperature monitoring. See Figure 22 for an example. Thermal Considerations and Output Current Derating The thermal resistances reported in the Pin Configuration section of the data sheet are consistent with those parameters defined by JESD51-9 and are intended for use with finite element analysis (FEA) software modeling tools that leverage the outcome of thermal modeling, simulation, and correlation to hardware evaluation performed on a µModule package mounted to a hardware test board—also defined by JESD51-9 (“Test Boards for Area Array Surface Mount Package Thermal Measurements”). The motivation for providing these thermal coefficients in found in JESD51-12 (“Guidelines for Reporting and Using Electronic Package Thermal Information”). Many designers may opt to use laboratory equipment and a test vehicle such as the demo board to anticipate the µModule regulator’s thermal performance in their application at various electrical and environmental operating conditions to compliment any FEA activities. Without FEA software, the thermal resistances reported in the Pin Configuration section are in-and-of themselves not relevant to providing guidance of thermal performance; instead, the derating curves provided in the data sheet can be used in a manner that yields insight and guidance pertaining to one’s application usage, and can be adapted to correlate thermal performance to one’s own application. The Pin Configuration section typically gives four thermal coefficients explicitly defined in JESD51-12; these coefficients are quoted or paraphrased below: 1.θJA: the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as “still air” although natural convection causes the air to move. This value is determined with the part mounted to a JESD51-9 defined test board, which does not reflect an actual application or viable operating condition. 4648f For more information www.linear.com/LTM4648 17 LTM4648 Applications Information 2.θJCbottom: the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as “still air” although natural convection causes the air to move. This value is determined with the part mounted to a JESD51-9 defined test board, which does not reflect an actual application or viable operating condition. 3.θJCtop: the thermal resistance from junction to top of the product case, is determined with nearly all of the component power dissipation flowing through the top of the package. As the electrical connections of the typical µModule are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbottom, this value may be useful for comparing packages but the test conditions don’t generally match the user’s application. 4.θJB: the thermal resistance from junction to the printed circuit board, is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the µModule and into the board, and is really the sum of the θJCbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. The board temperature is measured a specified distance from the package, using a two sided, two layer board. This board is described in JESD51-9. A graphical representation of the aforementioned thermal resistances is given in Figure 8; blue resistances are contained within the μModule regulator, whereas green resistances are external to the µModule. As a practical matter, it should be clear to the reader that no individual or sub-group of the four thermal resistance parameters defined by JESD51-12 or provided in the Pin Configuration section replicates or conveys normal operating conditions of a μModule. For example, in normal board-mounted applications, never does 100% of the device’s total power loss (heat) thermally conduct exclusively through the top or exclusively through bottom of the µModule—as the standard defines for θJCtop and θJCbottom, respectively. In practice, power loss is thermally dissipated in both directions away from the package—granted, in the absence of a heat sink and airflow, a majority of the heat flow is into the board. Within a SIP (system-in-package) module, be aware there are multiple power devices and components dissipating power, with a consequence that the thermal resistances relative to different junctions of components or die are not exactly linear with respect to total package power loss. To reconcile this complication without sacrificing modeling simplicity—but also, not ignoring practical realities—an approach has been taken using FEA software modeling along with laboratory testing in a controlled-environment chamber to reasonably define and correlate the thermal JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD) JUNCTION-TO-CASE (TOP) RESISTANCE JUNCTION CASE (TOP)-TO-AMBIENT RESISTANCE JUNCTION-TO-BOARD RESISTANCE JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD (BOTTOM) RESISTANCE RESISTANCE AMBIENT BOARD-TO-AMBIENT RESISTANCE 4648 F08 µMODULE DEVICE Figure 8. Graphical Representation of JESD51-12 Thermal Coefficients 18 4648f For more information www.linear.com/LTM4648 LTM4648 Applications Information resistance values supplied in this data sheet: (1) Initially, FEA software is used to accurately build the mechanical geometry of the µModule and the specified PCB with all of the correct material coefficients along with accurate power loss source definitions; (2) this model simulates a software-defined JEDEC environment consistent with JESD51-9 to predict power loss heat flow and temperature readings at different interfaces that enable the calculation of the JEDEC-defined thermal resistance values; (3) the model and FEA software is used to evaluate the µModule with heat sink and airflow; (4) having solved for and analyzed these thermal resistance values and simulated various operating conditions in the software model, a thorough laboratory evaluation replicates the simulated conditions with thermocouples within a controlled-environment chamber while operating the device at the same power loss as that which was simulated. An outcome of this process and due-diligence yields a set of derating curves provided in other sections of this data sheet. After these laboratory test have been performed and correlated to the µModule model, then the θJB and θBA are summed together to correlate quite well with the µModule model with no airflow or heat sinking in a properly define chamber. This θJB + θBA value is shown in the Pin Configuration section and should accurately equal the θJA value because approximately 100% of power loss flows from the junction through the board into ambient with no airflow or top mounted heat sink. The 1.5V, 2.5V and 3.3V power loss curves in Figures 9 and 10 can be used in coordination with the load current derating curves in Figures 11 to 15 for calculating an approximate θJA thermal resistance for the LTM4648 with various heat sinking and airflow conditions. The power loss curves are taken at room temperature, and are increased with a multiplicative factor according to the ambient temperature. This approximate factor is: 1.4 for 120°C. The derating curves are plotted with the output current starting at 10A and the ambient temperature at 40°C. The output voltages are 1.5V, 2.5V and 3.3V. These are chosen to include the lower and higher output voltage ranges for correlating the thermal resistance. Thermal models are derived from several temperature measurements in a controlled temperature chamber along with thermal modeling analysis. The junction temperatures are monitored while ambient temperature is increased with and without airflow. The power loss increase with ambient temperature change is factored into the derating curves. The junctions 1.6 2.0 1.4 1.8 1.6 1.0 POWER LOSS (W) POWER LOSS (W) 1.2 1.5VOUT 0.8 2.5VOUT 0.6 0.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1.4 1.5VOUT 2.5VOUT 3.3VOUT 0.2 0 2 4 6 LOAD CURRENT (A) 8 10 0 0 4648 F09 Figure 9. 3.3VIN to 2.5VOUT and 1.5VOUT Power Loss 2 6 4 LOAD CURRENT (A) 8 10 4648 F10 Figure 10. 5VIN to 3.3VOUT, 2.5VOUT and 1.5VOUT Power Loss 4648f For more information www.linear.com/LTM4648 19 LTM4648 12 12 10 10 10 8 6 4 400LFM 200LFM 0LFM 2 0 0 LOAD CURRENT (A) 12 LOAD CURRENT (A) LOAD CURRENT (A) Applications Information 8 6 4 400LFM 200LFM 0LFM 2 40 60 80 100 20 AMBIENT TEMPERATURE (°C) 0 120 0 40 60 80 100 20 AMBIENT TEMPERATURE (°C) 12 10 10 8 6 4 400LFM 200LFM 0LFM 40 60 80 100 20 AMBIENT TEMPERATURE (°C) 0 400LFM 200LFM 0LFM 0 40 60 80 100 20 AMBIENT TEMPERATURE (°C) Figure 13. No Heat Sink with 3.3VIN to 2.5VOUT 8 6 4 400LFM 200LFM 0LFM 2 120 120 4648 F13 Figure 12. No Heat Sink with 5VIN to 1.5VOUT LOAD CURRENT (A) LOAD CURRENT (A) 120 12 0 4 4648 F12 Figure 11. No Heat Sink with 3.3VIN to 1.5VOUT 0 6 2 4648 F11 2 8 0 0 4648 F14 40 60 80 100 20 AMBIENT TEMPERATURE (°C) 120 4648 F15 Figure 14. No Heat Sink with 5VIN to 2.5VOUT Figure 15. No Heat Sink with 5VIN to 3.3VOUT are maintained at 120°C maximum while lowering output current or power with increasing ambient temperature. The decreased output current will decrease the internal module loss as ambient temperature is increased. The monitored junction temperature of 120°C minus the ambient operating temperature specifies how much module temperature rise can be allowed. As an example in Figure 12 the load current is derated to ~8A at ~95°C with no air or heat sink and the power loss for the 5V to 1.5V at 8A output is about 1.68W. The 1.68W loss is calculated with the ~1.2W room temperature loss from the 5V to 1.5V power loss curve at 8A, and the 1.4 multiplying factor at 120°C junction. If the 95°C ambient temperature is subtracted from the 120°C junction temperature, then the difference of 25°C divided by 1.68W equals a 15°C/W θJA thermal resistance. Table 4 specifies a 14°C/W value which is very close. Table 4, Table 5 and Table 6 provide equivalent thermal resistances for 1.5V, 2.5V and 3.3V outputs with and without airflow. The derived thermal resistances in Tables 4, 5 and 6 for the various conditions can be multiplied by the calculated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. Room temperature power loss can be derived from the efficiency curves in the Typical Performance 20 4648f For more information www.linear.com/LTM4648 LTM4648 Applications Information • Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. • Do not put vias directly on the pads, unless they are capped. Figure 16. Thermal Image 5VIN to 1.5VOUT at 10A (No Heat Sink, No Air Flow and Room Temperature) Characteristics section and adjusted with the above ambient temperature multiplicative factors. The printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and one ounce copper for the two inner layers. The PCB dimensions are 95mm × 76mm. • Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to GND underneath the unit. Figure 17 gives a good example of the recommended layout. VOUT GND COUT Safety Considerations The LTM4648 module does not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. Layout Checklist/Example The high integration of LTM4648 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. • Use large PCB copper areas for high current path, including VIN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. CIN GND VIN 4648 F17 Figure 17. Recommended PCB Layout 4648f For more information www.linear.com/LTM4648 21 LTM4648 Applications Information Table 3. Output Voltage Response vs Component Matrix (Refer to Figure 18) 0A to 5A Load Step Typical Measured Values CIN (BULK)* VENDORS CIN PART NUMBER (CERAMIC) 150µF, 16V SANYO OSCON 25HVH150MT 22µF, 16V VENDORS MURATA COUT (CERAMIC) VENDORS PART NUMBER GRM32ER71C226KE18L 100µF, 6.3V MURATA PART NUMBER GRM32ER60J107ME20L AVX VOUT VIN CIN (BULK)* CIN COUT (CERAMIC) (CERAMIC) 1V 2.375V, 3.3, 5V 120µF* 22µF × 3 1.2V 2.375V, 3.3V, 5V 120µF* RECOVERY LOAD STEP TIME SPEED 12106D107MAT CFF (pF) VDROOP VP-P 100µF × 3 None 65mV 130mV 25µs 22µF × 3 100µF × 3 None 70mV 140mv 25µs 22µF × 3 100µF × 3 None 80mV 160mV 30µs 5A/µs 6.65kΩ 450kHz 110mV 230mV 40µs 5A/µs 3.09kΩ 450kHz 140mV 290mV 40µs 5A/µs 2.21kΩ 450kHz 1.5V 3.3V, 5V 120µF* 2.5V 3.3V, 5V 120µF* 22µF × 3 100µF × 3 None 3.3V 5V 120µF* 22µF × 3 100µF × 3 None RFB FREQ 5A/µs 15kΩ 450kHz 5A/µs 10kΩ 450kHz *Bulk capacitor is optional if VIN has very low input impedance. Table 4. 1.5V Output DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK qJA (°C/W) Figures 11, 12 3.3, 5 Figures 11, 12 3.3, 5 Figures 9, 10 0 None 14 Figures 9, 10 200 None 12 Figures 11, 12 3.3, 5 Figures 9, 10 400 None 10 VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK qJA (°C/W) Table 5. 2.5V Output DERATING CURVE Figure 13, 14 3.3, 5 Figures 9, 10 0 None 14 Figure 13, 14 3.3, 5 Figures 9, 10 200 None 12 Figure 13, 14 3.3, 5 Figures 9, 10 400 None 10 DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK qJA (°C/W) Figure 15 5 Figure 10 0 None 14 Figure 15 5 Figure 10 200 None 12 Figure 15 5 Figure 10 400 None 10 Table 6. 3.3V Output 22 4648f For more information www.linear.com/LTM4648 LTM4648 Typical Applications FREQ VIN 2.375V TO 5.5V CIN 22µF 10V VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT RUN MODE LTM4648 DIFFP COUT2 100µF 6.3V DIFFN PHMODE VFB TRACK/SS C1 0.1µF COUT1 100µF 6.3V VOUT 1.2V 10A COMP TEMP GND PGOOD CLKOUT RFB 10k 4648 F18 Figure 18. 2.375V to 5.5VIN, 1.2V at 10A Design 1M VIN 3.3V TO 5.5V FREQ CIN 22µF 10V CIN 22µF 10V VIN CLKIN VOUT INTVCC VOUT_LCL SW RUN MODE LTM4648 PHMODE TRACK/SS C1 0.1µF TEMP GND 100µF 6.3V VOUT 2.5V 100µF 8A 6.3V DIFFP DIFFN VFB COMP PGOOD CLKOUT RFB 3.09k 4648 F19 Figure 19. 3.3V to 5V VIN, 2.5VOUT at 8A Design with Increased 650kHz Frequency 4648f For more information www.linear.com/LTM4648 23 LTM4648 Typical Applications VIN 2.375V TO 5.5V CIN1 22µF 10V RUN FREQ VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT RUN MODE LTM4648 PHMODE C1 0.1µF CIN2 22µF 10V PGOOD CLKOUT FREQ VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT LTM4648 PGOOD CLKOUT CLKIN VOUT SW DIFFOUT LTM4648 TRACK/SS TEMP GND COUT6 100µF 6.3V COMP VOUT_LCL PHMODE COUT5 100µF 6.3V DIFFP INTVCC MODE COUT4 100µF 6.3V DIFFN FREQ VIN RUN COUT3 100µF 6.3V VFB TRACK/SS TEMP GND RFB 6.65k COMP PHMODE CIN3 22µF 10V DIFFN TEMP GND MODE COUT2 100µF 6.3V DIFFP VOUT 1.5V 30A VFB TRACK/SS RUN COUT1 100µF 6.3V DIFFP DIFFN 4648 F20 VFB COMP PGOOD CLKOUT PGOOD Figure 20. Three LTM4648 in Parallel, 1.5V at 30A Design 24 4648f For more information www.linear.com/LTM4648 LTM4648 Typical Applications VIN 5V CIN1 22µF 10V FREQ VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT RUN MODE LTM4648 PHMODE CIN2 22µF 10V R3 10k FREQ VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT LTM4648 COUT3 100µF 6.3V VOUT2 2.5V 10A COUT4 100µF 6.3V DIFFP PGOOD CLKOUT DIFFOUT LTM4648 FREQ VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT LTM4648 R5 4.99k COUT7 100µF 6.3V DIFFP COUT8 100µF 6.3V VOUT4 1.5V 10A DIFFN VFB TRACK/SS TEMP GND COUT6 100µF 6.3V VOUT3 1.8V 10A VFB COMP PHMODE R10 6.65k DIFFP PGOOD CLKOUT MODE COUT5 100µF 6.3V DIFFN TEMP GND RUN VOUT1 R2 3.09k VOUT_LCL SW TRACK/SS R9 10k COMP INTVCC PHMODE CIN4 22µF 10V DIFFN CLKIN VOUT MODE R7 4.99k VFB TRACK/SS TEMP GND R1 2.21k FREQ VIN RUN VOUT1 R6 10k COMP PHMODE R4 3.09k DIFFP PGOOD CLKOUT MODE COUT2 100µF 6.3V DIFFN TEMP GND RUN VOUT1 CIN3 22µF 10V VFB TRACK/SS C1 0.1µF VOUT1 3.3V 8A COUT1 100µF 6.3V COMP R2 6.65k PGOOD CLKOUT 4648 F21 Figure 21. Quad Outputs 4-Phase LTM4648 Regulator with Tracking Function FREQ VIN 2.375V TO 5.5V CIN 22µF 10V 0.1µF VIN CLKIN VOUT INTVCC VOUT_LCL SW DIFFOUT RUN MODE LTM4648 C1 0.1µF TEMP GND COUT2 100µF 6.3V DIFFP VOUT 1.5V 10A DIFFN PHMODE TRACK/SS COUT1 100µF 6.3V VFB COMP PGOOD CLKOUT RT = RFB 6.65k VIN 100µA VIN 4648 F22 MC RT A/D Figure 22. Single LTM4648 10A Design with Temperature Monitoring VIN 5V CIN1 22µF 10V VOUT_LCL SW DIFFOUT MODE INTVCC VOUT INTVCC RUN MASTER SLOPE CLKIN VIN LTM4648 PHMODE TRACK/SS TEMP GND CLOCK VOUT 1.2V 10A COUT1 100µF 6.3V DIFFP CLKIN CIN2 22µF 10V COUT2 100µF 6.3V PGOOD CLKOUT VOUT_LCL SW DIFFOUT MODE R2 10k INTVCC VFB COMP INTVCC RUN DIFFN R1 10k R3 4.99k VOUT VIN LTM4648 PHMODE TRACK/SS TEMP GND COUT3 100µF 6.3V DIFFP VOUT 1.8V COUT4 10A 100µF 6.3V DIFFN VFB COMP PGOOD CLKOUT R4 4.99k 4648 F23 CLOCK Figure 23. Dual Outputs 2-Phase LTM4648 Regulator with Tracking Function 4648f For more information www.linear.com/LTM4648 25 0.630 ±0.025 Ø 68x SUGGESTED PCB LAYOUT TOP VIEW 2.540 PACKAGE TOP VIEW 1.270 4 0.3175 0.000 0.3175 PIN “A1” CORNER E 1.270 aaa Z 2.540 Y For more information www.linear.com/LTM4648 6.350 5.080 3.810 2.540 1.270 0.000 3.810 5.080 6.350 D X aaa Z NOM 4.92 0.60 4.32 0.75 0.63 15.00 9.00 1.27 12.70 7.62 0.32 4.00 DIMENSIONS b1 A2 MAX 5.12 0.70 4.42 0.90 0.66 NOTES DETAIL B PACKAGE SIDE VIEW 0.37 4.05 0.15 0.10 0.20 0.30 0.15 TOTAL NUMBER OF BALLS: 68 0.27 3.95 MIN 4.72 0.50 4.22 0.60 0.60 DETAIL A SYMBOL A A1 A2 b b1 D E e F G H1 H2 aaa bbb ccc ddd eee H1 SUBSTRATE ddd M Z X Y eee M Z DETAIL B H2 MOLD CAP ccc Z A1 A Z (Reference LTC DWG# 05-08-1892 Rev A) Øb (68 PLACES) // bbb Z 26 Z BGA Package 68-Lead (15.00mm × 9.00mm × 4.92mm) F e G E D C B A DETAIL A PACKAGE BOTTOM VIEW F G 11 10 9 8 7 6 5 4 3 2 1 PIN 1 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 4 TRAY PIN 1 BEVEL COMPONENT PIN “A1” 7 ! BGA 68 1212 REV A PACKAGE IN TRAY LOADING ORIENTATION LTMXXXXXX µModule PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY 6. SOLDER BALL COMPOSITION CAN BE 96.5% Sn/3.0% Ag/0.5% Cu OR Sn Pb EUTECTIC 5. PRIMARY DATUM -Z- IS SEATING PLANE BALL DESIGNATION PER JESD MS-028 AND JEP95 3 2. ALL DIMENSIONS ARE IN MILLIMETERS 7 SEE NOTES NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 b 3 SEE NOTES LTM4648 Package Description Please refer to http://www.linear.com/product/LTM4648#packaging for the most recent package drawings. 4648f 3.810 3.810 LTM4648 Package Description PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY. LTM4648 Component BGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION D1 VIN E1 GND F1 RUN G1 GND A1 GND B1 GND C1 VIN A2 GND B2 – C2 – D2 – E2 – F2 CLCKOUT G2 GND E3 FREQ F3 GND G3 GND A3 GND B3 CLKIN C3 NC D3 VIN E4 – F4 INTVCC G4 GND A4 GND B4 PHMODE C4 NC D4 VIN E5 TRACK/SS F5 GND G5 GND A5 GND B5 MODE C5 SW D5 VIN A6 TEMP B6 – C6 – D6 – E6 – F6 COMP G6 GND E7 FB F7 DIFFN G7 GND A7 GND B7 NC C7 PGOOD D7 VIN D8 VIN E8 VIN F8 DIFFP G8 DIFFOUT A8 GND B8 NC C8 VIN D9 VIN E9 VOUT F9 VOUT G9 VOUT_LCL A9 GND B9 GND C9 VIN A10 GND B10 GND C10 VOUT D10 VOUT E10 VOUT F10 VOUT G10 VOUT A11 GND B11 GND C11 VOUT D11 VOUT E11 VOUT F11 VOUT G11 VOUT 4648f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of itsinformation circuits as described herein will not infringe on existing patent rights. For more www.linear.com/LTM4648 27 LTM4648 Typical Application Design Resources SUBJECT DESCRIPTION µModule Design and Manufacturing Resources Design: • Selector Guides • Demo Boards and Gerber Files • Free Simulation Tools µModule Regulator Products Search 1. Sort table of products by parameters and download the result as a spread sheet. Manufacturing: • Quick Start Guide • PCB Design, Assembly and Manufacturing Guidelines • Package and Board Level Reliability 2. Search using the Quick Power Search parametric table. TechClip Videos Quick videos detailing how to bench test electrical and thermal performance of µModule products. Digital Power System Management Linear Technology’s family of digital power supply management ICs are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature EEPROM for storing user configurations and fault logging. Related Parts PART NUMBER DESCRIPTION LTM4627 20V, 15A Step-Down µModule Regulator LTM4620A LTM4608A Dual 16V, 13A or Single 26A Step-Down µModule Regulator 36VIN, 8A EN55022 Class B Certified DC/DC Step-Down µModule Regulator Low VIN, 8A Step-Down µModule LTM4649 16V, 10A Step-Down µModule Regulator LTC2974 Quad Digital Power Supply Manager with EEPROM LTM4613 28 Linear Technology Corporation COMMENTS 4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL input, Remote Sense Amplifier, VOUT Tracking, 15mm × 15mm × 4.3mm LGA and 15mm × 15mm × 4.9mm BGA 4.5V ≤ VIN ≤ 16V, 0.6V ≤ VOUT ≤ 5.3V, PLL Input, Remote Sense Amplifier, VOUT Tracking, 15mm × 15mm × 4.41mm LGA 5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, PLL Input, VOUT Tracking and Margining, 15mm × 15mm × 4.32mm LGA 2.7V ≤ VIN ≤ 5.5V, 0.6V ≤ VOUT ≤ 5V, VOUT Tracking, CLKIN 9mm × 15mm × 2.82mm LGA 4.5V ≤ VIN ≤ 16V, 0.6V ≤ VOUT ≤ 3.3V, PLL Input, Remote Sense Amplifier, VOUT Tracking, 9mm × 15mm × 4.92mm BGA I2C/PMBus Interface, Configuration EEPROM, Fault Logging, Per Channel Voltage, Current and Temperature Measurements 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTM4648 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTM4648 4648f LT 1115 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015