Infineon® L I T I X TM L i n e a r TLD1211SJ High Side Current Source 1 channel Typical 85mA load current, up to 2.5A load current using external transistors Data sheet Rev. 1.0, 2015-02-19 Automotive LITIX TM Linear TLD1211SJ 1 TLD1211SJ Overview Features • • • • • • • • • • • • Adjustable Constant Output Current up to 85 mA LED Current of 2.5 A possible by using external Power Transistors Voltage Drop across Sense Resistor typ. 0.15 V Internal Bandgap Voltage Reference enables High Output Current accuracy EN Input for PWM brightness control Overvoltage Protection Temperature dependent Output Current Reduction Very Low Standby Current Maximum Operating Voltage 28 V Small SMD Package Green Product (RoHS compliant) AEC Qualified PG-DSO-8-16 Applications • • • • • LED Controller for Automotive applications, Low- and High-Power LED Universal Constant Current Source Interior and Exterior Lighting Instrument backlighting Illumination Description The TLD1211SJ is an integrated adjustable constant current source realized in a bipolar IC technology. The IC is designed to supply LEDs under the severe conditions of automotive applications resulting in constant brightness and extended LED lifetime. The TLD1211SJ is capable to drive high current, high brightness LEDs up to 2.5 A by using additional external output stages as “booster“ transistors. For LED currents up to 85mA the IC can be used as a stand alone device and requires only one voltage sense resistor as an external component. Protection circuits prevent damage to the device in case of overload, short circuit, over voltage, and overtemperature. Furthermore, the temperature dependent current reduction is able to protect LEDs which are thermally coupled to the IC. The integrated EN input of the TLD1211SJ enables LED brightness control by pulse width modulation. Type Package Marking TLD1211SJ PG-DSO-8-16 TLD1211SJ Data sheet 2 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Block Diagram 2 Block Diagram NC 1 8 NC 7 OUT 6 EN 5 NC TLD1211SJ VS 2 Vref VSENSE 3 Bandgap based voltage reference GND Output stage OP 4 TLD1211_Block diagram.vsd Figure 1 Block Diagram 2.1 Closed Loop Test Setup Vs Vsense - Vout OUT + = R1 Vref EN R2 GND TLD1211 _Test circuit.vsd Figure 2 Data sheet Closed loop Test setup 3 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Pin Configuration 3 Pin Configuration 3.1 Pin Assignment NC 1 8 NC VS 2 7 OUT VSENSE 3 6 EN GND 4 5 NC PG-DSO- 8-16.vsd Figure 3 Pin Configuration 3.2 Pin Definition and Functions Pin Symbol Function 1 NC Not Connected 2 Supply voltage 3 Vs Vsense 4 GND IC ground, connect with pin 2 on PCB 5 NC Not Connected 6 EN Enable (PWM input) 7 OUT Output 8 NC Not Connected Data sheet Sense input 4 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Electrical Characteristics 4 Electrical Characteristics 4.1 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings1) 40 °C < TJ < 150 °C; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Pos. Parameter Symbol 4.1.1 Supply voltage 4.1.2 Sense Voltage 4.1.3 EN Voltage 4.1.4 Output current 4.1.5 Power Dissipation 4.1.6 Junction temperature 4.1.7 Storage temperature range 4.1.8 ESD resistivity Vs Vsense VEN Iout Ptot TJ TSTG VESD_HBM Limit values Unit Min. Max. -0.3 45 V -0.3 7 V -0.3 7 V – – mA 0 500 mW -40 150 °C -55 150 °C -4000 4000 V Remark internally limited HBM2) 1) Not subject to production test, specified by design 2) ESD susceptibility HBM according to EIA/JESD 22-A 114B 4.2 Thermal Resistance Table 2 Thermal Resistance Pos. 4.2.1 Parameter Junction to Ambient Symbol 1) 2) RthJA Limit Values Unit Conditions Min. Typ. Max. – 155 – K/W Footprint only – 96 – K/W 300 mm2 PCB heatsink area – 86 – K/W 600 mm2 PCB heatsink area 1) Not subject to production test, specified by design 2) Package was simulated on a FR4 PCB, 80 x 80 x 1.5 mm; 35 µm Cu Data sheet 5 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Electrical Characteristics 4.3 Electrical Characteristics 4.3 Table 3 Pos. Electrical Characteristics 8 V < VS < 28 V; - 40 °C < TJ < 150 °C, EN = 5 V; R1, R2 = open; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition Vout = 0 V; Vs = 42 V; Vsense = 0 mV Vout = open; Vsense = 0 mV 4.3.1 Operating current during over voltage IsOV – – 600 μA 4.3.2 Operating current during open load Isopen load 0.5 1.4 1.7 mA 4.3.3 Standby current Isstandby – – 300 nA EN = 0 V; Vsense = 0 mV; Tj < 85°C1) 4.3.4 Standby current Isstandby,HOT – – 30 µA EN = 0 V; Vsense = 0 mV 4.3.51 Output current Iout,ONCOLD 40 – – mA VS-Vout = 3 V; Vsense = 0 mV; Tj = -40°C 4.3.52 Output current Iout,ON 65 85 110 mA VS-Vout = 3 V; Vsense = 0 mV; Tj > 0°C1); Tj < 135°C1) 4.3.6 Output current Iout,ONHOT 60 – – mA VS-Vout = 3 V; Vsense = 0 mV; Tj = 150°C – – 400 nA EN = 0 V; Vout = 0 V Current of Sense input Iout,OFF Isense -5 – 0.5 µA Vout = 0 V, Vsense = 200 mV 4.3.9 Voltage of Sense input Vsense 135 150 165 mV R1 = 390 Ω; R2 = 10 Ω See Figure 2; Tj < 115°C1) 4.3.10 Over voltage Protection 28 33 – V – 4.3.11 Drop Voltage Vs, OV Vs - Vout – – 1.3 V Iout < 15 mA Vsense = 0 mV; Vs = 8 V 60 90 130 μA VEN = 5 V 1 – 5.5 V Use resistors at pin to be CMOS/TTL compatible; See Figure 16 -0.3 – 0.3 V Use resistors at pin to be CMOS/TTL compatible; See Figure 16 4.3.7 Output Leakage current 4.3.8 EN Input 4.3.12 Current of enable input 4.3.13 High Level voltage range IEN VEN,ON 4.3.14 Low Level voltage range VEN,OFF Data sheet 6 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Electrical Characteristics Table 3 Electrical Characteristics (cont’d) 8 V < VS < 28 V; - 40 °C < TJ < 150 °C, EN = 5 V; R1, R2 = open; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Pos. Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. 4.3.15 Turn on time2) tEN,ON – – 65 μs Iout100% = 15mA, See Figure 4; R1 = 390 Ω; R2 = 10 Ω, See Figure 2 4.3.16 Turn off time2) tEN,OFF – – 60 μs Iout100% = 15mA; See Figure 4; R1 = 390 Ω; R2 = 10 Ω, See Figure 2 1) Not subject to production test, based on temperature characterization 2) When using an external Boost transistor this time is reduced (See also Figure 16) EN tEN, ON tEN ,OFF Iout t 80% 20% t TLD1211_Power_stage.emf Figure 4 Data sheet Timing Diagram 7 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Characterization Data 5 Characterization Data Characterization data based on typical device. TLD1211SJ has been measured in a setup with undefined high thermal resistance. 5.1 Setup 1 Setup according to Figure 2. R1 = 390 Ω , R2 = 10 Ω, VEN = 5 V Iout v s. Tj =f(Vs) 16 15 14 Iout [mA] 13 12 Vs = 8V 11 Vs = 14V 10 Vs = 24 V 9 8 7 6 -50 -25 0 25 50 75 100 125 150 175 Tj [°C] Figure 5 Iout vs TJ =f(Vs) Iout v s. Vs = f(Tj) 16 Iout [mA] 15 tem p= -40°C 14 tem p= -25°C 13 tem p= 0°C 12 tem p= 25°C tem p= 45°C 11 tem p= 65°C 10 tem p= 85°C 9 tem p= 105°C 8 tem p= 125°C tem p= 150°C 7 6 0 5 10 15 20 25 30 35 40 45 Vs [V] Figure 6 Data sheet Iout vs Vs =f(TJ) 8 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Characterization Data 5.2 Setup 2 Setup according to Figure 2. R1 = 0 Ω , R2 = 0 Ω, Vout = 0 V, Vsense = 0 V, VEN = 5 V Iout v s. Tj = f(Vs) Vse nse =0V 96 86 76 Iout [mA] 66 V s= 8V 56 V s= 14V 46 V s= 24 V 36 26 16 6 -50 -25 0 25 50 75 100 125 150 175 Tj [°C] Figure 7 Iout vs TJ =f(Vs) Iout v s. Vs = f(Tj) Vse nse =0V 96 86 temp= -40°C temp= -25°C 76 temp= 0°C Iout [mA] 66 temp= 25°C 56 temp= 45°C 46 temp= 65°C temp= 85°C 36 temp= 105°C 26 temp= 125°C temp= 150°C 16 6 0 5 10 15 20 25 30 35 40 45 V s [V ] Figure 8 Data sheet Iout vs Vs =f(TJ) 9 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Characterization Data 5.3 Setup 3 Vout = 0 V, Vsense = variable, VEN = 5 V Iout v s. Vse nse = f(Tj) Vs=8V 100 Iout [mA] 90 temp= -40°C 80 temp= -25°C 70 temp= 0°C 60 temp= 25°C temp= 45°C 50 temp= 65°C 40 temp= 85°C 30 temp= 105°C 20 temp= 125°C temp= 150°C 10 0 100 110 120 130 140 150 160 170 180 V sense [V ] Figure 9 Iout vs Vsense =f(TJ) at Vs = 8 V Iout v s. Vse nse = f(Tj) Vs=14V 100 Iout [mA] 90 temp= -40°C 80 temp= -25°C 70 temp= 0°C 60 temp= 25°C temp= 45°C 50 temp= 65°C 40 temp= 85°C 30 temp= 105°C 20 temp= 125°C temp= 150°C 10 0 100 110 120 130 140 150 160 170 180 V sense [V ] Figure 10 Data sheet Iout vs Vsense =f(TJ) at Vs = 14 V 10 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Characterization Data Iout v s. Vse nse = f(Tj) Vs=24V 100 Iout [mA] 90 temp= -40°C 80 temp= -25°C 70 temp= 0°C 60 temp= 25°C temp= 45°C 50 temp= 65°C 40 temp= 85°C 30 temp= 105°C 20 temp= 125°C temp= 150°C 10 0 100 110 120 130 140 150 160 170 180 V sense [V ] Figure 11 Iout vs Vsense =f(TJ) at Vs = 24 V 5.4 Setup 4 Vs = 14 V, Vout = 6 V, Vsense = 20 mV, VEN = variable Iout vs. VEN = f(Tj) Vs=14V Iout [mA] 100 90 temp= -40°C 80 temp= -25°C 70 temp= 0°C temp= 25°C 60 temp= 45°C 50 temp= 65°C 40 temp= 85°C 30 temp= 105°C 20 temp= 125°C 10 temp= 150°C 0 0 0,5 1 1,5 2 2,5 VEN [V] Figure 12 Data sheet Iout vs VEBN =f(TJ) at Vs = 14 V 11 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Characterization Data 5.5 Setup 5 Vout = 0 V, Vsense = 0 V, VEN = 0 V Is vs. Tj = f(Vs) 14 12 Is [µA] 10 Vs= 8V 8 Vs= 14V 6 Vs= 24 V 4 2 0 -50 -25 0 25 50 75 100 125 150 Tj [°C] Figure 13 Is vs TJ =f(Vs) Is vs. Tj = f(Vs) Tj < 125°C 1 0,9 0,8 Is [µA] 0,7 0,6 Vs= 8V 0,5 Vs= 14V 0,4 Vs= 24 V 0,3 0,2 0,1 0 -50 -25 0 25 50 75 100 125 Tj [°C] Figure 14 Data sheet Is vs TJ =f(Vs), TJ < 125 °C 12 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Characterization Data Is vs. Vs = f(Tj) 50 temp= -40°C 45 temp= -25°C 40 temp= 0°C 35 temp= 25°C Is [µA] 30 temp= 45°C 25 temp= 65°C 20 temp= 85°C 15 temp= 105°C 10 temp= 125°C 5 temp= 150°C 0 0 5 10 15 20 25 30 35 40 45 Vs [V] Figure 15 Data sheet Is vs Vs =f(TJ) 13 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Application Information 6 Application Information VBAT BAS3010A-03W 5V VQ VI 10µF VREG TLE4264 µC OUT/ PWM GND GND 1,8kΩ 1kΩ 1 NC 8 NC TLD1211SJ 2 VS OUT 7 47nF EN Vref 3 VSENSE Bandgap based voltage reference 4 6 R1 = 820Ω BCX55-16 Output stage OP NC GND 5 R2 = 100Ω Rsense = 0,42Ω TLD1211 Application diagram 2 .vsd Figure 16 Application Information with External Output Stage Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Data sheet 14 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Application Information VBAT BAS 3010A-03W 5V VQ VI 10µF VREG TLE4264 µC OUT/ PWM GND GND 1.8kΩ 1kΩ 1 NC 8 NC TLD1211SJ 2 VS OUT 7 47nF EN Vref 3 VSENSE OP Bandgap based voltage reference 4 Figure 17 6 Output stage NC GND 5 Application Information with Integrated Output Stage Usage Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Data sheet 15 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Package Outlines 7 Package Outlines Dimensions in mm Figure 18 Package Outline; PG-DSO-8-16 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data sheet 16 Rev. 1.0, 2015-02-19 TLD1211SJ LITIX TM Linear Revision History 8 Revision History Revision Date Changes 1.0 Initial revision Data sheet 2010-03-26 17 Rev. 1.0, 2015-02-19 Edition 2015-02-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2015 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. 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