2N6394 Series Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supplies. Features http://onsemi.com • Glass Passivated Junctions with Center Gate Geometry for Greater • • • Parameter Uniformity and Stability Small, Rugged, Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability Blocking Voltage to 800 V These are Pb−Free Devices SCRs 12 AMPERES RMS 50 thru 800 VOLTS G MAXIMUM RATINGS † (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) 2N6394 2N6395 2N6397 2N6399 VDRM, VRRM On-State RMS Current (180° Conduction Angles; TC = 90°C) IT(RMS) 12 A ITSM 100 A I2t 40 A2s PGM 20 W Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, TJ = 90°C) Circuit Fusing (t = 8.3 ms) Forward Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 90°C) Forward Average Gate Power (t = 8.3 ms, TC = 90°C) Value A Unit V MARKING DIAGRAM 50 100 400 800 PG(AV) 0.5 W Forward Peak Gate Current (Pulse Width ≤ 1.0 ms, TC = 90°C) IGM 2.0 A Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C 4 TO−220AB CASE 221A STYLE 3 1 2 Thermal Resistance, Junction−to−Case Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds Symbol Max Unit RqJC 2.0 °C/W TL 260 °C †Indicates JEDEC Registered Data Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. © Semiconductor Components Industries, LLC, 2012 September, 2012 − Rev. 9 1 2N639xG AYWW 3 2N639x = Device Code x = 4, 5, 7, or 9 G = Pb−Free Package A = Assembly Location Y = Year WW = Work Week MAXIMUM RATINGS † (TJ = 25°C unless otherwise noted) Rating K PIN ASSIGNMENT 1 Cathode 2 Anode 3 Gate 4 Anode ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. Publication Order Number: 2N6394/D 2N6394 Series ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.) Symbol Characteristic Min Typ Max Unit − − − − 10 2.0 mA mA OFF CHARACTERISTICS †Peak Repetitive Forward or Reverse Blocking Current (VAK = Rated VDRM or VRRM, Gate Open) TJ = 25°C TJ = 125°C IDRM, IRRM ON CHARACTERISTICS †Peak Forward On−State Voltage (Note 2) (ITM = 24 A Peak) VTM − 1.7 2.2 V †Gate Trigger Current (Continuous dc) (VD = 12 Vdc, RL = 100 Ohms) IGT − 5.0 30 mA † Gate Trigger Voltage (Continuous dc) (VD = 12 Vdc, RL = 100 Ohms) VGT − 0.7 1.5 V Gate Non−Trigger Voltage (VD = 12 Vdc, RL = 100 Ohms, TJ = 125°C) VGD 0.2 − − V † Holding Current (VD = 12 Vdc, Initiating Current = 200 mA, Gate Open) IH − 6.0 50 mA Turn-On Time (ITM = 12 A, IGT = 40 mAdc, VD = Rated VDRM) tgt − 1.0 2.0 ms Turn-Off Time (VD = Rated VDRM) tq − − 15 35 − − ms dv/dt − 50 − V/ms (ITM = 12 A, IR = 12 A) (ITM = 12 A, IR = 12 A, TJ = 125°C) DYNAMIC CHARACTERISTICS Critical Rate−of−Rise of Off-State Voltage Exponential (VD = Rated VDRM, TJ = 125°C) †Indicates JEDEC Registered Data 2. Pulse Test: Pulse Width ≤ 300 msec, Duty Cycle ≤ 2%. Voltage Current Characteristic of SCR Symbol Parameter + Current Anode + VTM VDRM Peak Repetitive Off State Forward Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Off State Reverse Voltage IRRM Peak Reverse Blocking Current VTM Peak On State Voltage IH Holding Current on state IH IRRM at VRRM Reverse Blocking Region (off state) Reverse Avalanche Region + Voltage IDRM at VDRM Forward Blocking Region (off state) 130 P(AV) , AVERAGE POWER (WATTS) TC, MAXIMUM ALLOWABLE CASE TEMPERATURE (° C) Anode − 125 α 120 α = CONDUCTION ANGLE 115 110 105 dc 100 α = 30° 95 60° 90° 90 0 16 α α = CONDUCTION ANGLE 14 12 α = 30° 10 180° dc 90° 60° 8.0 6.0 TJ ≈ 125°C 4.0 2.0 0 180° 7.0 4.0 5.0 1.0 2.0 3.0 6.0 IT(AV), AVERAGE ON‐STATE FORWARD CURRENT (AMPS) 20 18 8.0 Figure 1. Current Derating 0 1.0 2.0 3.0 7.0 4.0 5.0 6.0 IT(AV), AVERAGE ON‐STATE CURRENT (AMPS) 8.0 Figure 2. Maximum On−State Power Dissipation http://onsemi.com 2 2N6394 Series 100 TJ = 25°C 70 125°C 50 30 10 7.0 5.0 3.0 2.0 100 I TSM , PEAK SURGE CURRENT (AMP) iTM , INSTANTANEOUS ON-STATE CURRENT (AMPS) 20 1.0 0.7 0.5 0.3 0.2 0.1 0.4 1.2 2.0 2.8 3.6 4.4 5.2 vTH, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) 6.0 Figure 3. On−State Characteristics 1 CYCLE 95 90 85 80 75 70 TJ = 125°C f = 60 Hz 65 60 SURGE IS PRECEDED AND FOLLOWED BY RATED CURRENT 55 50 2.0 1.0 3.0 4.0 NUMBER OF CYCLES 6.0 8.0 10 Figure 4. Maximum Non−Repetitive Surge Current 1.0 0.7 0.5 0.3 0.2 ZqJC(t) = RqJC • r(t) 0.1 0.07 0.05 0.03 0.02 0.01 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 t, TIME (ms) 100 Figure 5. Thermal Response http://onsemi.com 3 200 300 500 1.0 k 2.0 k 3.0 k 5.0 k 10 2N6394 Series IGTM , PEAK GATE CURRENT (mA) 300 200 I GT, GATE TRIGGER CURRENT (NORMALIZED) TYPICAL CHARACTERISTICS OFF‐STATE VOLTAGE = 12 V 100 70 50 30 20 TJ = -40°C 25°C 10 7.0 5.0 100°C 3.0 0.2 0.5 1.0 2.0 5.0 10 20 PULSE WIDTH (ms) 50 100 200 3.0 OFF‐STATE VOLTAGE = 12 V 2.0 1.0 0.7 0.5 0.3 -40 -20 Figure 6. Typical Gate Trigger Current versus Pulse Width 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) 140 160 Figure 7. Typical Gate Trigger Current versus Temperature 1.1 30 OFF‐STATE VOLTAGE = 12 V OFF‐STATE VOLTAGE = 12 V 1.0 IH , HOLDING CURRENT (mA) VGT, GATE TRIGGER VOLTAGE (VOLTS) 0 0.9 0.8 0.7 0.6 20 10 7.0 5.0 0.5 0.4 -60 -40 3.0 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 8. Typical Gate Trigger Voltage versus Temperature Figure 9. Typical Holding Current versus Temperature 120 140 ORDERING INFORMATION Device Package 2N6394G 500 Units / Bulk 2N6394TG 50 Units / Rail 2N6395G 2N6397G Shipping** 500 Units / Bulk TO−220AB (Pb−Free) 2N6397TG 500 Units / Bulk 50 Units / Rail 2N6399G 500 Units / Bulk 2N6399TG 50 Units / Rail **For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 2N6394 Series PACKAGE DIMENSIONS TO−220AB CASE 221A−07 ISSUE AA −T− B F 4 Q T SEATING PLANE C S A U 1 2 3 H K Z R L V J G D N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.014 0.022 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 3: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.36 0.55 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 CATHODE ANODE GATE ANODE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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