INTERSIL ACS157DMSR-02

ACS157MS
Radiation Hardened
Quad 2-Input Non-Inverting Multiplexer
December 1997
Features
Description
• QML Qualified Per MIL-PRF-38535 Requirements
The Radiation Hardened ACS157MS is a Quad 2-Channel
Non-Inverting Multiplexer which selects four bits of data from
one of two sources under the control of a single Select pin.
The Output Enable input is active LOW and controls all outputs. When E is set HIGH, all outputs are forced LOW,
regardless of all other input conditions. All inputs are buffered and the outputs are designed for balanced propagation
delay and transition times.
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
The ACS157MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single
Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer
significant power reduction and faster performance when
compared to ALSTTL types.
• Input Logic Levels . . . VIL = (0.3)(Vcc), VIH = (0.7)(Vcc)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA
• Quiescent Supply Current. . . . . . . . . . . . . . . . . . . .20µA
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . . 14ns
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Applications
• 4-Bit Source Selection
• Data Routing
Detailed Electrical Specifications for the ACS157 are
contained in SMD 5962-98536. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm
• High Frequency Switching
Ordering Information
SMD PART NUMBER
TEMP. RANGE (oC)
INTERSIL PART NUMBER
5962F9853601VEC
ACS157DMSR-02
N/A
ACS157D/Sample-02
5962F9853601VXC
ACS157KMSR-02
N/A
N/A
-55 to 125
25
PACKAGE
16 Ld SBDIP
CASE OUTLINE
CDIP2-T16
16 Ld SBDIP
CDIP2-T16
-55 to 125
16 Ld Flatpack
CDFP4-F16
ACS157K/Sample-02
25
16 Ld Flatpack
CDFP4-F16
ACS157HMSR-02
25
Die
N/A
Pinouts
ACS157 (SBDIP)
TOP VIEW
S 1
ACS157 (FLATPACK)
TOP VIEW
16 VCC
S
1
16
VCC
1I0 2
15 E
1I0
2
15
E
1I1 3
14 4I0
1I1
3
14
4I0
1Y 4
13 4I1
1Y
4
13
4I1
12 4Y
2I0
5
12
4Y
2I1 6
11 3I0
2I1
6
11
3I0
2Y 7
10 3I1
2Y
7
10
3I1
GND
8
9
3Y
2I0 5
GND 8
9 3Y
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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File Number
4462
ACS157MS
Die Characteristics
PASSIVATION
DIE DIMENSIONS:
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)
SPECIAL INSTRUCTIONS:
METALLIZATION: Al
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
Bond VCC First
ADDITIONAL INFORMATION:
Worst Case Density: <2.0 x 105 A/cm2
Transistor Count: 150
SUBSTRATE POTENTIAL:
Unbiased Insulator
Metallization Mask Layout
ACS157MS
1I0
S
VCC
OE
1I1
4I 0
1Y
4I 1
2I 0
4Y
2I 1
3I 0
2Y
GND
3Y
3I 1
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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