Post-Silicon Debug: Technologies, Methodologies, and Best-Practices Moderator: Harry Foster - Mentor Graphics Corp., Plano, TX Organizer: Amir Nahir - IBM Haifa Research Lab., Haifa, Israel Speakers: Wisam Kadry - IBM Haifa Research Lab., Haifa, Israel Alan Hu - Univ. of British Columbia, Vancouver, BC, Canada Subhasish Mitra - Stanford Univ., Stanford, CA Valeria Bertacco - Univ. of Michigan, Ann Arbor, MI Sharad Kumar - Freescale Semiconductor, Inc., Noida, India Bradley Quinton - Tektronix, Inc., Vancouver, BC, Canada David Erikson - Advanced Micro Devices, Inc., Fort Collins, CO Keshavan Tiruvallur - Intel Corp., Portland, OR Nagib Hakim - Intel Corp., Santa Clara, CA Kevin Reick - IBM Corp., Austin, TX HF, DAC 2012, Post-Silicon Debug Workshop Panel Effort spent on pre-silicon verification Mean peak number of designers vs. verification engineers 4% increase in designers vs. 58% increase in verification engineers 18.0 Median peak number of engineers 16.0 7.6 14.0 12.0 10.0 4.8 Verification Engineers 8.0 6.0 7.8 8.1 2007-World 2010-World Design Engineers 4.0 2.0 0.0 Wilson Research Group and Mentor Graphics 2010 Functional Verification Study, Used with permission © 2011 Mentor Graphics Corp. Company 2 HF, DAC 2012, Post-Silicon Debug Workshop Panel www.mentor.com How many engineers will be required in 50 years at the current rate of growth? 4% increase in designers vs. 58% increase in verification engineers 18.0 Median peak number of engineers 16.0 7.6 14.0 12.0 10.0 4.8 Verification Engineers 8.0 6.0 58% 7.8 8.1 2007-World 2010-World Design Engineers 4.0 2.0 0.0 Wilson Research Group and Mentor Graphics 2010 Functional Verification Study, Used with permission © 2011 Mentor Graphics Corp. Company 3 HF, DAC 2012, Post-Silicon Debug Workshop Panel www.mentor.com Entire Population of India Becomes Verification Engineers in 50 Years? © 2011 Mentor Graphics Corp. Company 4 HF, DAC 2012, Post-Silicon Debug Workshop Panel www.mentor.com Results Actual completion compared to original schedule trend 40% 35% 2007 : 67% behind schedule 30% 2010 : 66% behind schedule 25% 2007 20% 2010 15% 10% 5% 0% Wilson Research Group and Mentor Graphics 2010 Functional Verification Study, Used with permission © 2011 Mentor Graphics Corp. Company 5 HF, DAC 2012, Post-Silicon Debug Workshop Panel www.mentor.com But what about post-silicon validation effort? n Design/Verification to Post-Silicon Validation Effort 2002 2005 17% 2009 25% 50% 83% 75% § Design/Verification Effort 50% § Validation Effort John Barton, Intel: Invited talk at GSRC 6 HF, DAC 2012, Post-Silicon Debug Workshop Panel © 2010 Mentor Graphics Corp. Company Confidential www.mentor.com Results Number of required spins 27% of the industry requires three or more spins! 50% 2004 2007 2010 45% Responses 40% 35% 30% 25% 20% 15% 10% 5% 0% 1 (FIRST SILICON SUCCESS) 2 3 4 5 6 7 SPINS or MORE Wilson Research Group and Mentor Graphics 2010 Functional Verification Study, Used with permission © 2011 Mentor Graphics Corp. Company 7 HF, DAC 2012, Post-Silicon Debug Workshop Panel www.mentor.com Results Types of flaws trends 60% 50% 2004 2007 Responses 40% 2010 30% 20% 10% 0% Wilson Research Group and Mentor Graphics 2010 Functional Verification Study, Used with permission © 2011 Mentor Graphics Corp. Company 8 HF, DAC 2012, Post-Silicon Debug Workshop Panel www.mentor.com Post-Silicon Debug: Technologies, Methodologies, and Best-Practices Moderator: Harry Foster - Mentor Graphics Corp., Plano, TX Organizer: Amir Nahir - IBM Haifa Research Lab., Haifa, Israel Speakers: Wisam Kadry - IBM Haifa Research Lab., Haifa, Israel Alan Hu - Univ. of British Columbia, Vancouver, BC, Canada Subhasish Mitra - Stanford Univ., Stanford, CA Valeria Bertacco - Univ. of Michigan, Ann Arbor, MI Sharad Kumar - Freescale Semiconductor, Inc., Noida, India Bradley Quinton - Tektronix, Inc., Vancouver, BC, Canada David Erikson - Advanced Micro Devices, Inc., Fort Collins, CO Keshavan Tiruvallur - Intel Corp., Portland, OR Nagib Hakim - Intel Corp., Santa Clara, CA Kevin Reick - IBM Corp., Austin, TX HF, DAC 2012, Post-Silicon Debug Workshop Panel