A3211 and A3212 Micropower, Ultrasensitive Hall-Effect Switches FEATURES AND BENEFITS DESCRIPTION • • • • • The A3211 and A3212 integrated circuits are ultrasensitive, pole independent Hall-effect switches with latched digital output. These devices are especially suited for operation in batteryoperated, hand-held equipment such as cellular and cordless telephones, pagers, and palmtop computers. A 2.5 to 3.5 V operation and a unique clocking scheme reduce the average operating power requirements to less than 15 μW with a 2.75 V supply. • • • • AEC-Q100 automotive qualified Micropower operation Operation with north or south pole 2.5 to 3.5 V battery operation Chopper stabilized □□ Superior temperature stability □□ Extremely low switchpoint drift □□ Insensitive to physical stress High ESD protection Solid-state reliability Small size Easily manufacturable with magnet pole independence Packages: Unlike other Hall-effect switches, either a north or south pole of sufficient strength will turn the output on in the A3212, and in the absence of a magnetic field, the output is off. The A3211 provides an inverted output. The polarity independence and minimal power requirements allow these devices to easily replace reed switches for superior reliability and ease of manufacturing, while eliminating the requirement for signal conditioning. DFN (EL) Improved stability is made possible through chopper stabilization (dynamic offset cancellation), which reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. DFN (EH) This device includes on a single silicon chip a Hall-voltage generator, small-signal amplifier, chopper stabilization, a latch, and a MOSFET output. Advanced CMOS processing is used to take advantage of low-voltage and low-power SIP (UA) SOT23W (LH) Continued on next page.... Not to scale SUPPLY SWITCH LATCH OUTPUT SAMPLE & HOLD X DYNAMIC OFFSET CANCELLATION TIMING LOGIC GROUND Dwg. FH-020-5 Functional Block Diagram 3211-DS, Rev. 22 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 Description (continued) requirements, component matching, very low input-offset errors, and small component geometries. Four package styles provide magnetically optimized solutions for most applications. Miniature low-profile surface-mount package types EH and EL (0.75 and 0.50 mm nominal height) are leadless, LH is a 3-pin low-profile SMD, and UA is a three-pin SIP for throughhole mounting. Packages are lead (Pb) free (suffix, –T) with 100% matte-tin-plated leadframes. SPECIFICATIONS Selection Guide Part Number Packing1 Package A3211EEHLT–T2,3,4 3000 pieces per reel 2 mm x 3 mm, 0.75 mm nominal height DFN A3211EELLT–T2,4,5 3000 pieces per reel 2 mm x 2 mm, 0.50 mm nominal height DFN A3211ELHLT–T4 3000 pieces per reel 3-pin surface mount SOT23W A3211ELHLX–T4 10000 pieces per 13-in. reel 3-pin surface mount SOT23W A3212EEHLT–T2,3 3000 pieces per reel 2 mm x 3 mm, 0.75 mm nominal height DFN A3212EELLT–T2,5 3000 pieces per reel 2 mm x 2 mm, 0.50 mm nominal height DFN A3212ELHLT–T 3000 pieces per reel 3-pin surface mount SOT23W A3212ELHLX–T 10000 pieces per 13-in. reel 3-pin surface mount SOT23W A3212EUA–T 500 pieces per bulk bag SIP-3 through hole A3212LLHLT–T 3000 pieces per reel 3-pin surface mount SOT23W A3212LLHLX–T 10000 pieces per 13-in. reel 3-pin surface mount SOT23W A3212LUA–T 500 pieces per bulk bag SIP-3 through hole Ambient Temperature TA (°C) State in Magnetic Field –40 to 85 Off –40 to 85 On –40 to 150 1 Contact Allegro for additional packaging and handling options. 2 Allegro products sold in DFN package types are not intended for automotive applications. 3 Variant is no longer in production. The device should not be purchased for new design applications. Samples are no longer available. Date of status change: June 1, 2015 (A3212EEHLT-T), December 1, 2015 (A3211EEHLT-T). 4 For automotive sales, please contact the field applications engineer. 5 Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: March 2, 2015. Absolute Maximum Ratings Characteristic Supply Voltage Symbol Notes Rating Units VDD 5 V B Unlimited G Output Off Voltage VOUT 5 V Output Current IOUT 1 mA Range E –40 to 85 ºC Range L Magnetic Flux Density Operating Ambient Temperature TA –40 to 150 ºC Maximum Junction Temperature TJ(max) 165 ºC Tstg –65 to 170 ºC Storage Temperature Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 Pinout Drawings NO CONNECTION GROUND 6 5 4 Package Suffix ‘EL’ Pinning (Leadless Chip Carrier) Dwg. PH-016-2 SUPPLY Package Suffix ‘EH’ Pinning (Leadless Chip Carrier) 3 X VDD V DD GROUND n Package Suffix ‘LH’ Pinning (SOT23W) OUTPUT NO CONNECTION 2 GROUND 3 SUPPLY 2 OUTPUT 1 1 Dwg. PH-016-1 Package Suffix ‘UA’ Pinning (SIP) X 3 V OUTPUT 2 GROUND SUPPLY 1 Dwg. PH-016-1 1 2 3 OUTPUT DD GROUND V SUPPLY DD Dwg. PH-016 Pinning is shown viewed from branded side. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 ELECTRICAL CHARACTERISTICS: over operating voltage and temperature range (unless otherwise specified). Characteristic Symbol Test Conditions Supply Voltage Range VDD Operating Output Leakage Current IOFF VOUT = 3.5 V, Output off Output On Voltage VOUT IOUT = 1 mA, VDD = 2.75 V Awake Time tawake Period tperiod d.c. Duty Cycle Chopping Frequency Supply Current fC Limits Min. Typ.* Max. Units 2.5 2.75 3.5 V – <1.0 1.0 µA – 100 300 mV – 45 90 µs – 45 90 ms – 0.1 – % – 340 – kHz – – 2.0 mA IDD(EN) Chip awake (enabled) IDD(DIS) Chip asleep (disabled) – – 8.0 µA VDD = 2.75 V – 5.1 10 µA VDD = 3.5 V – 6.7 10 µA IDD(AVG) * Typical data is at TA = 25°C and VDD = 2.75 V, and is for design information only. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 A3211 MAGNETIC CHARACTERISTICS over operating voltage range (unless otherwise specified) Characteristic Symbol Test Conditions Limits Min. Typ. Max. Units Over Temperature Range E: TA = –40°C to 85°C Operate Points Release Points Hysteresis NOTES: BOPS South pole to branded side; B > BOP, VOUT = High (Output Off) – 37 55 G BOPN North pole to branded side; B > BOP, VOUT = High (Output Off) –55 –40 – G BRPS South pole to branded side; B < BRP, VOUT = Low (Output On) 10 31 – G BRPN North pole to branded side; B < BRP, VOUT = Low (Output On) – –34 –10 G BHYS |BOPx - BRPx| – 5.9 – G Typ. Max. Units 1. Negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G. 2. BOPx = operate point (output turns off); BRPx = release point (output turns on). 3. Typical Data is at TA = +25°C and VDD = 2.75 V and is for design information only. 4. 1 gauss (G) is exactly equal to 0.1 millitesla (mT). A3212 MAGNETIC CHARACTERISTICS over operating voltage range (unless otherwise specified) Characteristic Symbol Test Conditions Limits Min. Over Temperature Range E: TA = –40°C to 85°C Operate Points Release Points Hysteresis BOPS South pole to branded side; B > BOP, VOUT = Low (Output On) – 37 55 G BOPN North pole to branded side; B > BOP, VOUT = Low (Output On) –55 –40 – G BRPS South pole to branded side; B < BRP, VOUT = High (Output Off) 10 31 – G BRPN North pole to branded side; B < BRP, VOUT = High (Output Off) – –34 –10 G BHYS |BOPx - BRPx| – 5.9 – G Over Temperature Range L: TA = –40°C to 150°C Operate Points Release Points Hysteresis NOTES: BOPS South pole to branded side; B > BOP, VOUT = Low (Output On) – 37 65 G BOPN North pole to branded side; B > BOP, VOUT = Low (Output On) –65 –40 – G BRPS South pole to branded side; B < BRP, VOUT = High (Output Off) 10 31 – G BRPN North pole to branded side; B < BRP, VOUT = High (Output Off) – –34 –10 G BHYS |BOPx - BRPx| – 5.9 – G 1. Negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G. 2. BOPx = operate point (output turns on); BRPx = release point (output turns off). 3. Typical Data is at TA = +25°C and VDD = 2.75 V and is for design information only. 4. 1 gauss (G) is exactly equal to 0.1 millitesla (mT). Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 TYPICAL OPERATING CHARACTERISTICS Switch Points 60 60 BOPS BRPS 20 VDD = 2.75 V 0 -20 BRPN -40 -60 -25 0 25 BRPS 20 TA = 25°C 0 -20 BRPN -40 BOPN -50 BOPS 40 SWITCH POINTS IN GAUSS SWITCH POINTS IN GAUSS 40 50 75 100 AMBIENT TEMPERATURE IN °C 125 -60 2.4 150 BOPN 2.6 2.8 3.0 3.2 3.4 SUPPLY VOLTAGE IN VOLTS Dwg. GH-027-3 3.6 Dwg. GH-057-2 Supply Current 7.0 AVERAGE SUPPLY CURRENT IN µA AVERAGE SUPPLY CURRENT IN µA 7.0 6.0 VDD =3.5 V VDD =2.75 V 5.0 VDD =2.5 V 4.0 3.0 -50 -25 0 25 50 75 AMBIENT TEMPERATURE IN ° C 100 125 150 Dwg. GH-028-11 6.0 5.0 4.0 3.0 2.4 TA = 25°C 2.6 2.8 3.0 3.2 3.4 SUPPLY VOLTAGE IN VOLTS Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3.6 Dwg. GH-058-7 6 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 FUNCTIONAL DESCRIPTION Low Average Power Internal timing circuitry activates the IC for 45 µs and deactivates it for the remainder of the period (45 ms). A short "awake" time allows for stabilization prior to the sampling and data latching on the falling edge of the timing pulse. The output during the "sleep" time is latched in the last sampled state. The supply current is not affected by the output state. B +V — PERIOD IDD(EN) "AWAKE" "SLEEP" HALL VOLTAGE SAMPLE & OUTPUT LATCHED IDD(DIS) + 0 Dwg. AH-011-2 Dwg. WH-017-2 Chopper-Stabilized Technique More detailed descriptions of the circuit operation can be found in: Technical Paper STP 97-10, Monolithic Magnetic Hall Sensing Using Dynamic Quadrature Offset Cancellation and Technical Paper STP 99-1, Chopper-Stabilized Amplifiers With A Track-andHold Signal Demodulator. +V SAMPLE & HOLD The Hall element can be considered as a resistor array similar to a Wheatstone bridge. A large portion of the offset is a result of the mismatching of these resistors. These devices use a proprietary dynamic offset cancellation technique, with an internal high-frequency clock to reduce the residual offset voltage of the Hall element that is normally caused by device overmolding, temperature dependencies, and thermal stress. The chopper-stabilizing technique cancels the mismatching of the resistor circuit by changing the direction of the current flowing through the Hall plate using CMOS switches and Hall voltage measurement taps, while maintaing the Hall-voltage signal that is induced by the external magnetic flux. The signal is then captured by a sample-and-hold circuit and further processed using low-offset bipolar circuitry. This technique produces devices that have an extremely stable quiescent Hall output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. A relatively high sampling frequency is used for faster signal processing capability can be processed. X Dwg. EH-012-1 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 A3211 and A3212 Micropower, Ultrasensitive Hall-Effect Switches Operation A3211 OUTPUT VOLTAGE 0 -B +B MAGNETIC FLUX A3212 OUTPUT OFF 5V MAX B OPS OUTPUT VOLTAGE B OPN OUTPUT ON BRPS BRPN OUTPUT ON 0 0 -B +B MAGNETIC FLUX 50 k 2 OUT P UT 1 DD V www.allegromicro.com B OPS OUTPUT ON 3 The simplest form of magnet that will operate these devices is a bar magnet with either pole near the branded surface of the device. Many other methods of operation are possible. Extensive applications information for Hall-effect devices is available in: • Hall-Effect IC Applications Guide, Application Note 27701; • Hall-Effect Devices: Guidelines for Designing Subassemblies Using Hall-Effect Devices, Application Note 27703.1; • Soldering Methods for Allegro’s Products — SMD and ThroughHole, Application Note 26009. All are provided at RPS 0 Applications It is strongly recommended that an external bypass capacitor be connected (in close proximity to the Hall element) between the supply and ground of the device to reduce both external noise and noise generated by the chopper-stabilization technique. This is especially true due to the relatively high impedance of battery supplies. B BRPN B OPN As used here, negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G. Allegro's pole-independent processing technique allows for operation with either a north pole or south pole magnet orientation, enhancing the manufacturability of the device. The state-of-theart technology provides the same output polarity for either pole face. OUTPUT OFF OUTPUT OFF 5V MAX X The output of the A3212 switches low (turns on) when a magnetic field perpendicular to the Hall element exceeds the operate point BOPS (or is less than BOPN). After turn-on, the output is capable of sinking up to 1 mA and the output voltage is VOUT(ON). When the magnetic field is reduced below the release point BRPS (or increased above BRPN), the device output switches high (turns off). The difference in the magnetic operate and release points is the hysteresis (Bhys) of the device. This built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. The A3211 functions in the same manner, except the output voltage is reversed from the A3212, as shown in the figures to the right. 0.1 ∝F S UP P LY (3 V B AT T E R Y ) Dwg. E H-013-2 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 PACKAGE OUTLINE DRAWINGS For Reference Only – Not for Tooling Use (Reference DWG-2861 and JEDEC MO-229WCED, Type 1) Dimensions in millimeters – NOT TO SCALE Exact case and lead configuration at supplier discretion within limits shown 0.30 2.00 ±0.15 E 0.88 0.50 F 6 6 1.00 1.57 E 3.70 3.00 ±0.15 A 1 1.25 E 2 1 7X D 0.95 C 0.75 ±0.05 0.08 C C SEATING PLANE PCB Layout Reference View 0.25 ±0.05 0.5 BSC 1 2 YWW LLL NN 0.55 ±0.10 1.224 ±0.050 1 B G Standard Branding Reference View Y = Last two digits of year of manufacture W = Week of manufacture L = Lot number N = Last two digits of device part number 6 1.042 +0.100 –0.150 A Terminal #1 mark area D Coplanarity includes exposed thermal pad and terminals B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) E Hall Element (not to scale); U.S. customary dimensions controlling C Reference land pattern layout; all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) F Active Area Depth, 0.32 mm NOM G Branding scale and appearance at supplier discretion Package EH, 6-Pin DFN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 For Reference Only – Not for Tooling Use (Reference DWG-2861 and JEDEC MO-229UCCD) All dimension nominal – Dimensions in millimeters – NOT TO SCALE Exact case and lead configuration at supplier discretion within limits shown 2.00 1.250 E 1.03 0.325 0.30 F 3 3 E 0.74 E 0.925 2.00 0.138 2.40 A 0.65 1 2 1 0.30 9X 1.00 C D 0.50 0.08 C C SEATING PLANE PCB Layout Reference View 0.25 1.00 1 2 A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) D Coplanarity includes exposed thermal pad and terminals E Hall element (not to scale); U.S. customary dimensions controlling F Active area depth = 0.18 0.40 0.138 0.925 B 3 1.250 0.325 Package EL, 3-Pin DFN Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 For Reference Only – Not for Tooling Use (Reference DWG-2840) Dimensions in millimeters – NOT TO SCALE Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown +0.12 2.98 –0.08 D 1.49 4° ±4° A 3 +0.020 0.180 –0.053 0.96 D +0.19 1.91 –0.06 +0.10 2.90 –0.20 2.40 0.70 D 0.25 MIN 1.00 2 1 0.55 REF 0.25 BSC 0.95 Seating Plane Branded Face Gauge Plane B PCB Layout Reference View 8X 10° REF 1.00 ±0.13 NNN +0.10 0.05 –0.05 0.95 BSC 0.40 ±0.10 C Standard Branding Reference View N = Last three digits of device part number A Active Area Depth, 0.28 mm B Reference land pattern layout; all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances C Branding scale and appearance at supplier discretion D Hall elements, not to scale Package LH, 3-Pin SOT-23W Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 For Reference Only – Not for Tooling Use (Reference DWG-9065) Dimensions in millimeters – NOT TO SCALE Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 2 X 45° B 4.09 +0.08 –0.05 1.52 ±0.05 E 2.04 C 3 X 10° 1.44 E 3.02 E Mold Ejector Pin Indent +0.08 –0.05 45° Branded Face 1.02 MAX 1.02 MAX A 0.79 REF 1 2 3 0.43 +0.05 –0.07 0.41 +0.03 –0.06 1.27 NOM NNN 14.99 ±0.25 1 D Standard Branding Reference View = Supplier emblem N = Last three digits of device part number A Dambar removal protrusion (6X) B Gate and tie bar burr area C Active Area Depth, 0.50 mm REF D Branding scale and appearance at supplier discretion E Hall element, not to scale Package UA, 3-Pin SIP Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 Micropower, Ultrasensitive Hall-Effect Switches A3211 and A3212 Revision History Revision Revision Date 18 December 11, 2013 Description of Revision 19 August 1, 2014 Revised footnote on Selection Guide 20 January 1, 2015 Added LX option to Selection Guide 21 September 22, 2015 22 December 1, 2015 Update application note references Corrected LH package Active Area Depth value; added AEC-Q100 qualification under Features and Benefits Updated product status in Selection Guide and footnotes Copyright ©2015, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13