10-bit ADC (Interrupt-driven)

ADCInt Library Module (Interrupt-driven)
1.
Introduction ...................................................................................................................... 2
2.
Module Features............................................................................................................... 2
3.
List of Component Modules............................................................................................ 3
4.
Using the Library Module in a Project............................................................................ 3
5.
List of Shared Parameters............................................................................................... 4
Shared Data Bytes ............................................................................................................. 4
Shared Functions ............................................................................................................... 4
Shared Macros ................................................................................................................... 4
6.
Functions .......................................................................................................................... 6
7.
Macros............................................................................................................................... 8
8.
Port and ADC Reference Voltage Configuration Tables ............................................. 11
9.
Error and Status Flags................................................................................................... 13
ADCInt Library Module (Interrupt-driven)
Page 1
1. Introduction
ADCInt is a general-purpose library module for processors of PIC18 family (except PIC18F1220 &
18F1320). It configures ADC module for interrupt mode and provides a descriptive interface in the
form of macros and functions.
2. Module Features
•
•
•
User selectable acquisition time to allow for settling of analog signal, before start of AD
conversion.
Provides First In First Out (FIFO) buffer to write ADC results.
Provides simple functions to read and write the buffers.
ADCInt Library Module (Interrupt-driven)
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3. List of Component Modules
ADCInt.P18.ex.txt
ADCInt.asm
ADCInt.inc
P18xxx.inc
This file demonstrates the usage of the ADCInt library module.
This file contains the functions of the ADCInt library module. User
needs to include this file in their project.
This file contains the macros of the ADCInt library module. User
needs to include this in their ‘.asm’ file, where the library module
macros & functions are utilized.
General purpose processor definition file for the PIC18xxx family
4. Using the Library Module in a Project
Please follow the steps below to use the ADCInt library module in your project.
1.
2.
3.
4.
5.
6.
7.
8.
Use Application Maestro to configure the module as required.
At the ‘Generate Files’ step, save the output to the directory where your project code
resides.
Launch MPLAB, and open the project’s workspace.
Verify that the Microchip language tool suite is selected (Project>Select Language Toolsuite).
In the Workspace view, right-click on the “Source Files” node. Select the “Add Files”
option. Select ADCInt.asm and click OK.
Now right-click on the “Linker Scripts” node and select “Add Files”. Add the appropriate
linker file (.lkr) for the project’s target microcontroller.
Add any other files that the project may require. Save and close the project.
Include ‘ADCInt.inc’ in your ‘.asm’ file, where the ADCInt library functions & macros are
utilized.
ADCInt Library Module (Interrupt-driven)
Page 3
5. List of Shared Parameters
Shared Data Bytes
vADCIntChannelNumber_A
vADCIntStatus
vADCIntBufWrPtr
vADCIntBufRdPtr
vADCIntResultHigh
vADCIntResultLow
vADCIntResultsCount
VADCIntBuffer
The content of this gives the ADC channel that is
being sensed
This holds the error and status flags. Please refer Section 9 for
more information.
This points to the relative location where the ADC result is written
to the buffer.
This points to the relative location where the ADC result is read
from the buffer.
The ADC result is read to this location if selected resolution is 8
bits.
The ADC high-byte result is read to this location, if selected
resolution is 10 bits.
The ADC result low-byte is read to this location, if selected
resolution is 10 bits.
This keeps track of the number of ADC results yet to be read
from the buffer.
Starting location of the FIFO buffer.
Shared Functions
ADCIntAcquisitionTime
ADCIntISR
ADCIntRead
ADCIntBufInit
This provides acquisition time delay before the start of
AD conversion. The required acquisition time is
entered by the user in the Application Maestro.
This is an Interrupt service routine for the ADC Interrupt. Call it
from the Interrupt service routine at proper Interrupt vector(High
or Low priority Vector).
This function reads the ADC result from FIFO buffer, into the
locations vADCIntResultHigh & vADCIntResultLow, if
selected resolution is 10 bits, vADCIntResultHigh if selected
resolution is 8 bits.
This function clears ADCIntBufFull, ADCIntBufOverFlow
flags,sets ADCIntBufEmpty flag, clears vADCIntBufWrPtr,
vADCIntBufRdPtr, vADCIntResultsCount.
ADCInt Library Module (Interrupt-driven)
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Shared Macros
mADCIntInit
mADCIntChannelSelect
mADCIntStart
mADCIntIsBusy
mADCIntReadHigh
mADCIntReadLow
mADCIntDisable
mSetADCIntHighPriority
mSetADCIntLowPriority
Configures the ADC as per the user options. This sets
channel 0 as the default ADC channel. If the user wants to use a
different channel, he can select the required channel by invoking
the macro mADCIntChannelSelect.
Selects the ADC channel. This macro calls a function.
The purpose of having this macro is to pass
parameter for channel number. This macro gives the
warning message "WARNING: The processor does
not have the selected ADC channel”, if the user selects a
channel not available for the processor. The channel selection is
ignored in the above case and the previous channel will be used
for the next conversion.
Starts the AD conversion.
Checks whether the AD conversion is over or not.
This reads the high-byte of the ADC result register (ADRESH)
into WREG.
This reads the low-byte of the ADC result register (ADRESL) into
WREG.
Switches off the ADC.
This macro sets high-priority for ADC interrupt.
This macro sets low-priority for ADC interrupt.
ADCInt Library Module (Interrupt-driven)
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6. Functions
Function
Pre-conditions
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
Function
Pre-conditions
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
ADCIntAcquisitionTime
To be used after invoking the macro mADCIntInit &
mADCIntChannelSelect
Provides acquisition time delay before start of AD conversion. The
required acquisition time is entered by the user in the Application Maestro.
None
None
WREG changes
1 level deep
Processor clock freq.* Acquisition time(u sec)/4000000
ADCIntISR
To be used after invoking the macro mADCIntInit.
This function checks the AD interrupt flag. If flag is not set, control
returns. Otherwise the ADC result is written/ not written depending upon
the ADCIntBufOverFlow flag & user option overwrite/no-overwrite
buffer. When the buffer is written, ADCIntBufEmpty flag is cleared. The
flag ADCIntBufFull is set, if all the locations of the buffer are written
with ADC result but none is read using ADCIntRead.
ADCIntBufOverFlow flag is set when new ADC result becomes
available after ADCIntBufFull is set.
None
Buffer starting at vADCIntBuffer, vADCIntStatus,
vADCIntBufWrPtr, vADCIntResultsCount.
WREG, STATUS, BSR changes.
1 level deep
49
ADCInt Library Module (Interrupt-driven)
Page 6
Function
Pre-conditions
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
Function
Pre-conditions
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
ADCIntRead
To be used after invoking the macro mADCIntInit.
This function reads the ADC results from the buffer. In case of 10-bit ADC
resolution, the result is read into the locations vADCIntResultHigh &
vADCIntResultLow. In case of 8-bits resolution, the result is read into
vADCIntResultHigh only. It sets ADCIntBufEmpty flag when there is
no new result to be read from the buffer.
None
vADCIntResultHigh & vADCIntResultLow (10-bits resolution)
vADCIntResultHigh (8-bits resolution)
ADCIntBufEmpty flag.
WREG, STATUS, BSR changes.
1 level deep
27
ADCIntBufInit
None
This function clears ADCIntBufFull, ADCIntBufOverFlow
flags,sets ADCIntBufEmpty flag, clears vADCIntBufWrPtr,
vADCIntBufRdPtr, vADCIntResultsCount.
None
vADCIntStatus, vADCIntBufWrPtr, vADCIntBufRdPtr,
vADCIntResultsCount.
BSR, STATUS changes
1 level deep
10
ADCInt Library Module (Interrupt-driven)
Page 7
7. Macros
Macro
Overview
Input
mADCIntInit
Configures the ADC as per the user options. Enables the ADC interrupt.
This macro sets channel 0 as the default ADC channel. If user wants to
use a different channel, he can select the required channel by invoking the
macro mADCIntChannelSelect.
This macro takes one or two arguments depending upon the processor
used. For processors not having ADCON2 register, ADC port configuration name is the only argument required. Chose the appropriate port configuration name from Table 1. For processors having ADCON2 register,
this macro requires two arguments. The first argument is the port configuration name & the second argument is the ADC reference voltage configuration name. Chose these arguments from Table 2 & 3 respectively.
Example1: Single Argument
; AN0-AN4 analog ports, VREF+ is V DD, VREF- is VSS
mADCIntInit ADCPORTCONFIG2
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
Example 2: Two arguments
; AN0-12 analog ports, External VREF+ at AN3, VREF- is AVss
mADCIntInit ADCPORTCONFIG2,ADCREFERENCECONFIG1
None
WREG, STATUS, BSR changes
1 level deep
20
mADCIntChannelSelect
Selects the ADC channel. This macro calls a function. The purpose
of having this macro is to pass parameter for channel number. This
macro gives the warning message "WARNING: The processor
does not have the selected ADC channel”, if user selects a channel
not available for the processor. The channel selection is ignored in
the above case and the previous channel will be used for next con-version.
Example: To select the ADC channel 11, write
mADCIntChannelSelect D’11’ or mADCIntChannelSelect .11
ADC channel number as the macro argument.
Stores the selected channel number in the location
ADCIntChannelNumber_A
WREG, STATUS changes
1 level deep
12
ADCInt Library Module (Interrupt-driven)
Page 8
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mADCIntStart
Starts the AD conversion.
None
None
None
None
1
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mADCIntIsBusy
Checks whether the AD conversion is over or not.
None
WREG contains 0x0 if the AD conversion is over, else 0x1.
None
None
3
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mADCIntReadHigh
This reads the high-byte of the ADC result register (ADRESH) into WREG.
None
WREG
Status changes
None
1
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mADCIntReadLow
This reads the low-byte of the ADC result register (ADRESL) into WREG
None
WREG
Status changes
None
1
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mADCIntDisable
Switches off the ADC.
None
None
None
None
2
ADCInt Library Module (Interrupt-driven)
Page 9
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mSetADCIntHighPriority
This macro sets high priority for ADC interrupt
None
None
None
None
2
Macro
Overview
Input
Output
Side Effects
Stack Requirement
Maximum instruction
cycles
mSetADCIntLowPriority
This macro sets low priority for ADC interrupt
None
None
None
None
2
ADCInt Library Module (Interrupt-driven)
Page 10
8. Port and ADC Reference Voltage Configuration Tables
Table1: Port Configuration
A: Analog port, B: Digital port
PORT
CONFIGURATION
NAME
PORT
AN7
PORT
AN6
PORT
AN5
PORT
AN4
PORT
AN3
PORT
AN2
PORT
AN1
PORT
AN0
ADC
VREF+
ADC
VREF-
ADCPORTCONFIG0
A
A
A
A
A
A
A
A
VDD
VSS
ADCPORTCONFIG1
A
A
A
A
VREF+
A
A
A
AN3
VSS
ADCPORTCONFIG2
D
D
D
A
A
A
A
A
VDD
VSS
ADCPORTCONFIG3
D
D
D
A
VREF+
A
A
A
AN3
VSS
ADCPORTCONFIG4
D
D
D
D
A
D
A
A
VDD
VSS
ADCPORTCONFIG5
D
D
D
D
VREF+
D
A
A
AN3
VSS
ADCPORTCONFIG6
A
A
A
A
VREF+
VREF-
A
A
AN3
AN2
ADCPORTCONFIG7
D
D
A
A
A
A
A
A
VDD
VSS
ADCPORTCONFIG8
D
D
A
A
VREF+
A
A
A
AN3
VSS
ADCPORTCONFIG9
D
D
A
A
VREF+
VREF-
A
A
AN3
AN2
ADCPORTCONFIG10
D
D
D
A
VREF+
VREF-
A
A
AN3
AN2
ADCPORTCONFIG11
D
D
D
D
VREF+
VREF-
A
A
AN3
AN2
ADCPORTCONFIG12
D
D
D
D
D
D
D
A
VDD
VSS
ADCPORTCONFIG13
D
D
D
D
VREF+
VREF-
D
A
AN3
AN2
ADCInt Library Module (Interrupt-driven)
Page 11
Table 2: Port Configuration
A: Analog port, B: Digital port
PORT
CONFIGURATION
NAME
A
N
1
5
A
N
1
4
A
N
1
3
A
N
1
2
A
N
1
1
A
N
1
0
A
N
9
A
N
8
A
N
7
A
N
6
A
N
5
A
N
4
A
N
3
A
N
2
A
N
1
A
N
0
ADCPORTCONFIG0
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG1
D
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG2
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG3
D
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG4
D
D
D
D
D
A
A
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG5
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG6
D
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
ADCPORTCONFIG7
D
D
D
D
D
D
D
D
A
A
A
A
A
A
A
A
ADCPORTCONFIG8
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
A
ADCPORTCONFIG9
D
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
ADCPORTCONFIG10
D
D
D
D
D
D
D
D
D
D
D
A
A
A
A
A
ADCPORTCONFIG11
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
A
ADCPORTCONFIG12
D
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
ADCPORTCONFIG13
D
D
D
D
D
D
D
D
D
D
D
D
D
D
A
A
ADCPORTCONFIG14
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
A
Table 3: ADC Reference Voltage Configuration
CONFIGURATION NAME
ADC VREF+
ADC VREF-
ADCREFERENCECONFIG0
AVDD
AVSS
ADCREFERENCECONFIG1
External VREF+ at AN3
AVSS
ADCREFERENCECONFIG2
AVDD
External VREF- at AN2
ADCREFERENCECONFIG3
External VREF+ at AN3
External VREF- at AN2
ADCInt Library Module (Interrupt-driven)
Page 12
9. Error and Status Flags
ADCIntBufFull
ADCIntBufEmpty
ADCIntBufOverFlow
This bit is set when the buffer is full. It gets reset when data is read from
the buffer by the function ADCIntRead.
This bit is set when there is no new data to be read from the buffer. It
gets reset, when a new data is written to the buffer by the function
ADCIntISR
This bit is set when buffer is full & a new data is ready to be written into
the buffer. User needs to clear this bit in their firmware . User can make
use of the function ADCIntBufInit to clear ADCIntBufOverFlow
flag and to initialize the buffer.
ADCInt Library Module (Interrupt-driven)
Page 13