DG401B, DG403B, DG405B Vishay Siliconix Low-Power, High-Speed CMOS Analog Switches DESCRIPTION FEATURES The DG401B, DG403B, DG405B monolithic analog switches are replacements for the popular DG401/403/405 analog switches and provide improved performance, combining high speed (tON: 100 ns, typ) with low power consumption make the DG401B series ideal for portable and battery powered applications. Built on the Vishay Siliconix proprietary high-voltage silicongate process to achieve high voltage rating and superior switch on/off performance, break-before-make is guaranteed for the SPDT configurations. Each switch conducts equally well in both directions when on, and blocks up to 30 V peak-to-peak when off. On-resistance is very flat over the full ± 15 V analog range. The DG401B has two independent SPST switches. The DG403B has four SPST switches in NO/NC combinations. The DG405B has four switches in two SPST pairs (see Functional Block Diagrams and Pin Configurations on pages 1 and 2.) The DG401B, DG403B, DG405B is available in both 16-pin plastic dip and 16-pin SOIC packages. As a committed partner to the community and the environment, Vishay Siliconix manufactures this product with the lead (Pb)-free device terminations. For analog switching products manufactured with 100 % matte tin device terminations, the lead (Pb)-free “-E3” suffix is being used as a designator. • • • • • • • • 44 V supply max rating ± 15 V analog signal range On-resistance - RDS(on): 23 Low leakage - ID(on): 40 pA Fast switching - tON: 100 ns Upgrade to DG401B, DG403B, DG405B TTL, CMOS compatible Single supply capability BENEFITS • Wide dynamic range • Break-before-make switching action (DG403B only) • Simple interfacing APPLICATIONS • • • • Audio and video switching Sample-and-hold circuits Test equipment PBX, PABX FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG401B Dual-In-Line and SOIC D1 NC NC NC NC NC NC D2 1 16 S1 2 15 IN1 3 14 4 13 5 12 VGND Two SPST Switches per Package TRUTH TABLE Logic Switch 0 OFF 1 ON NC V+ 6 11 7 10 IN2 8 9 S2 Logic “0” 0.8 V Logic “1” 2.4 V Top View Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 www.vishay.com 1 DG401B, DG403B, DG405B Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG403B Dual-In-Line and SOIC D1 1 16 S1 2 15 D3 3 14 S3 4 13 S4 5 12 D4 6 11 NC NC D2 IN1 VGND NC V+ 7 10 IN2 8 9 S2 Four SPST Switches in Two Pairs per Package TRUTH TABLE Logic SW1, SW2 0 OFF SW3, SW4 ON 1 ON OFF Logic “0” 0.8 V Logic “1” 2.4 V Top View DG405B Dual-In-Line and SOIC D1 1 16 S1 2 15 D3 3 14 S3 4 13 NC S4 5 12 D4 6 11 NC D2 IN1 V- Four SPST Switches in Two Pairs per Package TRUTH TABLE Logic Switch 0 OFF 1 ON GND NC V+ 7 10 IN2 8 9 S2 Logic “0” 0.8 V Logic “1” 2.4 V Top View ORDERING INFORMATION Standard Commercial Part Number Lead (Pb)-free Commercial Part Number DG401BDJ DG401BDJ-E3 DG403BDJ DG403BDJ-E3 DG405BDJ DG405BDJ-E3 DG401BDY DG401BDY-E3 DG403BDY DG403BDY-E3 DG405BDY DG405BDY-E3 DG401BDY-T1 DG401BDY-T1-E3 DG403BDY-T1 DG403BDY-T1-E3 DG405BDY-T1 DG405BDY-T1-E3 www.vishay.com 2 Package Temperature Range 16-Pin Plastic Dip 16-Pin Narrow SOIC - 40 to 85 °C 16-Pin Narrow SOIC With Tape and Reel Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 DG401B, DG403B, DG405B Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Symbol Limit V+ to VGND to V- 25 Current (Any Terminal) Continuous 30 Current, S or D (Pulsed 1 ms 10 % duty) 100 Power Dissipation (Package)b V (V-) - 0.3 V to (V+) + 0.3 V or 30 mA, whichever occurs first Digital Inputsa, VS, VD Storage Temperature Unit 44 (DJ, DY Suffix) mA - 65 to 125 16-Pin Plastic DIPc 450 16-Pin SOICd 600 °C mW Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 6 mW/°C above 75 °C. d. Derate 7.6 mW/°C above 75 °C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. SPECIFICATIONSa Parameter Symbol Test Conditions Unless Specified V+ = 15 V, V- = - 15 V VIN = 2.4 V, 0.8 Vf Limits - 40 °C to 85 °C Temp.b Min.d Full -15 Typ.c Unit Max.d Analog Switch Analog Signal Rangee Drain-Source On-Resistance Drain-Source On-Resistance VANALOG 15 RDS(on) IS = - 10 mA, VD = ± 10 V V+ = 13.5 V, V- = - 13.5 V Room Full 23 45 55 RDS(on) IS = - 10 mA, VD = ± 5 V, 0 V V+ = 16.5 V, V- = - 16.5 V Room Full 0.72 3 5 IS(off) Switch Off Leakage Current ID(off) V+ = 16.5, V- = - 16.5 V VD = ± 15.5 V, VS = ± 15.5 V Room Hot - 0.5 -5 - 0.01 0.5 5 Room Hot - 0.5 -5 - 0.01 0.5 5 ID(on) V+ = 16.5 V, V- = - 16.5 V VS = VD = ± 15.5 V Room Hot -1 - 10 - 0.04 1 10 Input Current VIN Low IIL VIN under test = 0.8 V, all other = 2.4 V Full -1 0.005 1 Input Current VIN High IIH VIN under test = 2.4 V, all other = 0.8 V Full -1 0.005 1 Turn-On Time tON 100 150 tOFF RL = 300 , CL = 35 pF see figure 2 Room Turn-Off Time Room 60 100 tD RL = 300 , CL = 35 pF Room Q CL = 10 000 pF, Vgen = 0 V, Rgen = 0 Room 60 RL = 100 , CL = 5 pF, f =1 MHz Room - 81.7 Room - 94.8 Room 12 Room 12 Room 39 Channel On Leakage Current V nA Digital Control µA Dynamic Characteristics Break-Before-Make Time Delay (DG403B) Charge Injection Off Isolation Reject Ratio OIRR Channel-to-Channel Crosstalk XTALK Source Off Capacitance CS(off) Drain Off Capacitance CD(off) Channel On Capacitance Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 CD, CS(on) f = 1 MHz, VS = 0 V 5 ns 12 pC dB pF www.vishay.com 3 DG401B, DG403B, DG405B Vishay Siliconix SPECIFICATIONSa Parameter Limits - 40 °C to 85 °C Test Conditions Unless Specified V+ = 15 V, V- = - 15 V VIN = 2.4 V, 0.8 Vf Symbol Temp. b Min.d Unit Typ.c Max.d 0.250 0.5 1 Power Supplies Positive Supply Current I+ Negative Supply Current I- Ground Current Room Full V+ = 16.5 V, V- = - 16.5 V VIN = 0 or 5 V IGND Room Full - 0.5 -1 0.25 Room Full - 0.5 -1 0.25 mA Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 000 60 50 10 000 Supply Current (mA) ICC - Supply Current (pA) V+ = 15 V V- = - 15 V 1000 I+ I- 100 10 20 0 - 25 5 35 65 95 Temperature (°C) Supply Current vs. Temperature www.vishay.com 4 30 10 1 - 55 40 125 0 2000 4000 6000 8000 10000 12000 Frequency (kHz) Supply Current vs. Switching Frequency Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 DG401B, DG403B, DG405B Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 90 60 VCC = VCC = VCC = VCC = VCC = VCC = 50 45 40 VCC = 7.5 V VCC = 10 V VCC = 12 V VCC = 15 V VCC = 20 V VCC = 22 V 80 ±6V ± 10 V ± 12 V ± 15 V ± 20 V ± 22 V RON - On-Resistance (Ω) R ON - On-Resistance (Ω) 55 35 30 25 70 60 50 40 30 20 20 15 10 10 - 25 - 20 - 15 - 10 -5 0 5 10 15 20 0 25 10 20 25 RON vs. Analog Voltage and Supply Voltage RON vs. Analog Voltage and Single Supply Voltage 100 VCC = ± 15 V IS = 10 mA 125 °C 85 °C 25 °C 0 °C - 40 °C - 55 °C 50 45 60 40 35 30 40 20 0 - 20 25 - 40 20 - 60 15 - 80 10 - 15 - 10 -5 0 5 10 V+ = 15 V V- = - 15 V For ID(off), VS = 0 V For IS(off), V D = 0 V 80 Leakage Current (pA) 55 ID(on) ID(off) IS(off) - 100 - 15 15 -5 5 VD - Analog Voltage (V) Leakage Current vs. Analog Voltage 10 000 150 t(on), VS = + 5 V t(on), VS = - 5 V t(off), VS = - 5 V t(off), VS = + 5 V 125 Switching Time (nS) 1000 100 IS(off) ID(on) ID(off) 10 100 75 50 25 1 - 55 15 VD - Analog Voltage (V) RON vs. Analog Voltage and Temperature Leakage Current (pA) 15 VD - Analog Voltage (V) 60 R ON - On-Resistance (Ω) 5 VD - Analog Voltage (V) 0 - 25 5 35 65 95 Temperature (°C) Leakage Current vs. Temperature Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 125 0 ±5 ± 10 ± 15 ± 20 ± 25 Supply Voltage (V) Switching Time vs. Supply Voltage www.vishay.com 5 DG401B, DG403B, DG405B Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 250 80 t(on), VS = + 5 V t(off), VS = + 5 V 225 Switching Time (nS) 200 Switching Time (nS) t(on), V S = + 10 V t(on), V S = - 10 V t(off), V S = + 10 V t(off), V S = - 10 V 70 175 150 125 100 75 50 60 50 40 30 V+ = 15 V V- = - 15 V 25 0 0 5 10 15 20 20 - 55 25 - 25 5 Supply Voltage (V) Switching Time vs. Single Supply Voltage 65 95 125 Switching Time vs. Temperature 3.0 - 10 2.8 10 2.6 2.4 Loss, OIRR, X TALK (dB) VTH - Input Threshold Voltage (V) 35 Temperature (°C) 2.2 2.0 1.8 1.6 1.4 1.2 1.0 Insertion Loss 30 50 Off Isolation 70 Cross Talk 90 110 0.8 0.6 130 5 10 15 20 25 30 0.01 Supply Voltage (V) Input Switching Threshold vs. Supply Voltage 0.1 10 1 Frequency (MHz) 100 1000 Insertion Loss, Off -Isolation Crosstalk vs. Frequency SCHEMATIC DIAGRAM (Typical Channel) V+ S VVIN Level Shift/ Drive V+ GND D V- Figure 1. www.vishay.com 6 Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 DG401B, DG403B, DG405B Vishay Siliconix TEST CIRCUITS VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform. tr < 20 ns tf < 20 ns 3V Logic Input + 15 V V+ ± 10 V S D 50 % 0V tOFF Switch Input* VO VS VO 90 % IN RL 1 kΩ V- GND CL 35 pF 0V Switch Output tON - 15 V - VS * VS = 10 V for tON, VS = - 10 V for t OFF CL (includes fixture and stray capacitance) RL VO = VS 90 % VO Switch Input* Note: RL + R DS(on) Logic input waveform is inverted for switches that have the opposite logic sense control Figure 2. Switching Time + 15 V 3V Logic Input 50 % V+ VS1 VS2 S1 D1 S2 0V VS1 VO1 VO1 D2 Switch Output IN RL1 V- GND 90 % VO2 RL2 0V VS2 VO2 CL1 CL2 90 % 0V Switch Output tD tD - 15 V C L (includes fixture and stray capacitance) Figure 3. Break-Before-Make + 15 V Rg V+ S IN Vg VO CL 10 nF 3V GND ΔVO D VO IN On Off On VQ = ΔVO x CL - 15 V Figure 4. Charge Injection Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 www.vishay.com 7 DG401B, DG403B, DG405B Vishay Siliconix TEST CIRCUITS + 15 V C + 15 V V+ VS C D S VO Rg = 50 Ω RL 100 Ω IN 0 V, 2.4 V V+ S VS VO D Rg = 50 Ω GND V- C RL 100 Ω IN 0 V, 2.4 V GND - 15 V V- VS Off Isolation = 20 log - 15 V VO C = RF bypass C = RF bypass Figure 6. Insertion Loss Figure 5. Off Isolation + 15 V C V+ S1 VS C + 15 V D Rg = 50 Ω C 50 Ω VO V+ S2 S Meter RL IN IN 0.8 V GND C V- HP4192A Impedance Analyzer or Equivalent 0 V, 2.4 V D GND - 15 V XTALK Isolation = 20 log C = RF bypass C f = 1 MHz VS VO Figure 7. Crosstalk www.vishay.com 8 V- - 15 V Figure 8. Capacitances Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 DG401B, DG403B, DG405B Vishay Siliconix APPLICATIONS + 15 V + 15 V V+ Left Source 1 Right Left S1 D1 S3 D3 ein Left D1 S3 D3 IN1 eout C1 S2 D2 S4 D4 Right Integrate/ Reset TTL S2 D2 S4 D4 C2 IN2 IN2 TTL Channel Select + - IN1 Source 2 Right V+ S1 DG403B DG403B GND Slope Select V- GND V- - 15 V - 15 V Figure 9. Stereo Source Selector Figure 10. Dual Slope Integrator Dual Slope Integrators The DG403B is well suited to configure a selectable slope integrator. One control signal selects the timing capacitor C1 or C2. Another one selects ein or discharges the capacitor in preparation for the next integration cycle. + 15 V V+ Band-Pass Switched Capacitor Filter Single-pole double-throw switches are a common element for switched capacitor networks and filters. The fast switching times and low leakage of the DG403B allow for higher clock rates and consequently higher filter operating frequencies. S1 D1 S3 D3 IN1 ein S2 D2 S4 D4 IN2 Clock DG403B GND V- - 15 V + - eout Figure 11. Band-Pass Switched Capacitor Filter Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 www.vishay.com 9 DG401B, DG403B, DG405B Vishay Siliconix APPLICATIONS Peak Detector the analog input voltage. When ein goes below eout A3 goes negative, turning SW1 off. The system will therefore store the most positive analog input experienced. A3 acting as a comparator provides the logic drive for operating SW1. The output of A2 is fed back to A3 and compared to the analog input ein. If ein > eout the output of A3 is high keeping SW1 closed. This allows C1 to charge up to Reset SW2 ein – A1 + + A3 – SW1 R1 + A2 – DG401B eout C1 Figure 12. Positive Peak Detector Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73069. www.vishay.com 10 Document Number: 73069 S11-0179-Rev. B, 07-Feb-11 Package Information Vishay Siliconix SOIC (NARROW): 16ĆLEAD JEDEC Part Number: MS-012 MILLIMETERS 16 15 14 13 12 11 10 Dim A A1 B C D E e H L Ĭ 9 E 1 2 3 4 5 6 7 8 INCHES Min Max Min Max 1.35 1.75 0.053 0.069 0.10 0.20 0.004 0.008 0.38 0.51 0.015 0.020 0.18 0.23 0.007 0.009 9.80 10.00 0.385 0.393 3.80 4.00 0.149 0.157 1.27 BSC 0.050 BSC 5.80 6.20 0.228 0.244 0.50 0.93 0.020 0.037 0_ 8_ 0_ 8_ ECN: S-03946—Rev. F, 09-Jul-01 DWG: 5300 H D C All Leads e Document Number: 71194 02-Jul-01 B A1 L Ĭ 0.101 mm 0.004 IN www.vishay.com 1 Package Information Vishay Siliconix PDIP: 16ĆLEAD 16 15 14 13 12 11 10 9 E E1 1 2 3 4 5 6 7 8 D S Q1 A A1 L 15° MAX C B1 e1 Dim A A1 B B1 C D E E1 e1 eA L Q1 S B eA MILLIMETERS Min Max INCHES Min Max 3.81 5.08 0.150 0.200 0.38 1.27 0.015 0.050 0.38 0.51 0.015 0.020 0.89 1.65 0.035 0.065 0.20 0.30 0.008 0.012 18.93 21.33 0.745 0.840 7.62 8.26 0.300 0.325 5.59 7.11 0.220 0.280 2.29 2.79 0.090 0.110 7.37 7.87 0.290 0.310 2.79 3.81 0.110 0.150 1.27 2.03 0.050 0.080 0.38 1.52 .015 0.060 ECN: S-03946—Rev. D, 09-Jul-01 DWG: 5482 Document Number: 71261 06-Jul-01 www.vishay.com 1 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-16 RECOMMENDED MINIMUM PADS FOR SO-16 0.372 (9.449) 0.152 0.022 0.050 0.028 (0.559) (1.270) (0.711) (3.861) 0.246 (6.248) 0.047 (1.194) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 24 Document Number: 72608 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000