INTERSIL LMH0074

LMH0074
SMPTE 259M / 344M Adaptive Cable Equalizer
General Description
Features
The LMH0074 SMPTE 259M / 344M Adaptive Cable Equalizer is designed to equalize data transmitted over cable (or
any media with similar dispersive loss characteristics). The
equalizer operates over a wide range of data rates from 143
Mbps to 540 Mbps and supports SMPTE 259M and SMPTE
344M.
The LMH0074 implements DC restoration to correctly handle
pathological data conditions. The equalizer may be driven in
either a single ended or differential configuration.
Additional features include separate carrier detect and output
mute pins which may be tied together to mute the output when
no signal is present. A programmable mute reference is provided to mute the output at a selectable level of signal degradation.
■
■
■
■
■
SMPTE 259M and SMPTE 344M compliant
Supports DVB-ASI at 270 Mbps
High data rates: 143 Mbps to 540 Mbps
Equalizes up to 400 meters of Belden 1694A at 270 Mbps
Manual bypass and output mute with a programmable
threshold
■ Single-ended or differential input
■ 50Ω differential outputs
■ Single 3.3V supply operation
■ Industrial temperature range: −40°C to +85°C
■ 208mW typical power consumption with 3.3V supply
■ Footprint compatible with the LMH0044 and the GS9074A
Applications
■ SMPTE 259M and SMPTE 344M serial digital interfaces
■ Serial digital data equalization and reception
■ Data recovery equalization
Typical Application
30027501
© 2007 National Semiconductor Corporation
300275
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LMH0074 SMPTE 259M / 344M Adaptive Cable Equalizer
December 5, 2007
LMH0074
Absolute Maximum Ratings (Note 1)
Supply Voltage
Input Voltage (all inputs)
Storage Temperature Range
Junction Temperature
Lead Temperature
(Soldering 4 Sec)
Package Thermal Resistance
θJA 16-pin LLP
θJC 16-pin LLP
ESD Rating (HBM)
ESD Rating (MM)
Recommended Operating
Conditions
−0.5V to 3.6V
−0.3V to VCC+0.3V
−65°C to +150°C
+150°C
Supply Voltage (VCC – VEE)
Input Coupling Capacitance
AEC Capacitor (Connected between
AEC+ and AEC-)
Operating Free Air Temperature (TA)
+260°C
3.3V ±5%
1.0 µF
1.0 µF
−40°C to +85°C
+43°C/W
+9°C/W
8kV
250V
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Notes 2, 3).
Symbol Parameter
VCMIN
Input Common Mode Voltage
VSDI
Input Voltage Swing
VCMOUT
Output Common Mode Voltage
VSDO
Output Voltage Swing
Conditions
Reference
Min
SDI, SDI
At LMH0074 input, (Notes 4, 6)
720
50Ω load, differential
MUTEREF
MUTEREF Range
CD Output Voltage
Carrier not present
CD
2.6
MUTE
3.0
800
Supply Current
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950
(Note 7)
750
mVP-P
1.3
V
0.7
V
V
V
V
63
2
mVP−P
V
Max to force outputs active
ICC
V
0.4
Min to mute outputs
Units
VCC –
VSDO/2
Carrier present
MUTE Input Voltage
Max
1.9
SDO, SDO
MUTEREF DC Voltage (floating)
Typ
0.8
V
77
mA
LMH0074
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3).
Symbol Parameter
BRSDI
Jitter for various Cable Lengths
(with equalizer pathological)
tr,tf
Conditions
Input Data Rate
Reference
Min
SDI, SDI
143
Typ
Max
Units
540
Mbps
270 Mbps, Belden 1694A,
400 meters (Note 4)
0.2
UI
270 Mbps, Belden 8281,
280 meters (Note 4)
0.2
UI
Output Rise Time, Fall Time
20% – 80%, (Note 4)
SDO, SDO
100
220
ps
Mismatch in Rise/Fall Time
(Note 4)
2
15
ps
tOS
Output Overshoot
(Note 4)
1
5
%
ROUT
Output Resistance
single-ended, (Note 5)
50
Ω
RLIN
Input Return Loss
(Note 8)
18-20
dB
RIN
Input Resistance
single-ended
1.3
kΩ
CIN
Input Capacitance
single-ended, (Note 5)
1
pF
SDI, SDI
15
Note 1: "Absolute Maximum Ratings" are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of
these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of "Electrical Characteristics"
specifies acceptable device operating conditions.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0
Volts.
Note 3: Typical values are stated for VCC = +3.3V and TA = +25°C.
Note 4: Specification is guaranteed by characterization.
Note 5: Specification is guaranteed by design.
Note 6: The maximum input voltage swing assumes a nonstressing, DC-balance signal; specifically, the SMPTE-recommended color bar test signal. Pathological
or other stressing signals may not be used. This specification is for 0m cable only.
Note 7: Supply current depends on the amount of cable being equalized. The current is highest for short cable and decreases as the cable length is increased.
Refer to Figure 1.
Note 8: Input return loss is dependent on board design. The LMH0074 meets this specification on the SD074 evaluation board from 5MHz to 1.5GHz.
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LMH0074
Connection Diagram
30027503
16-Pin LLP
Order Number LMH0074SQ
See NS Package Number SQB16A
Pin Descriptions
Pin #
Name
Description
1
VEE
Negative power supply (ground).
2
SDI
Serial data true input.
3
SDI
Serial data complement input.
4
VEE
Negative power supply (ground).
5
AEC+
AEC loop filter external capacitor (1µF) positive connection.
6
AEC-
AEC loop filter external capacitor (1µF) negative connection.
7
BYPASS
Bypasses equalization and DC restoration when high. No equalization occurs in this mode.
8
MUTEREF
Mute reference. Sets the threshold for CD and (with CD tied to MUTE) determines the maximum
cable to be equalized before muting. MUTEREF may be unconnected for maximum equalization.
9
VEE
Negative power supply (ground).
10
SDO
Serial data complement output.
11
SDO
Serial data true output.
12
VEE
Negative power supply (ground).
13
VCC
Positive power supply (+3.3V).
14
MUTE
Output mute. To disable the mute function and enable the output, MUTE must be tied to GND or
a low level signal. To force the outputs to a muted state, tie to VCC. CD may be tied to this pin to
inhibit the output when no input signal is present. MUTE has no function in BYPASS mode.
15
CD
Carrier detect. CD is high when no signal is present. CD has no function in BYPASS mode.
16
VCC
Positive power supply (+3.3V).
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4
LMH0074
Block Diagram
30027502
de-asserted and the outputs are muted is decreased.
MUTEREF may be left unconnected for maximum equalization
before muting.
Device Operation
BLOCK DESCRIPTION
The Equalizer Filter block is a multi-stage adaptive filter. If
Bypass is high, the equalizer filter is disabled.
The DC Restoration / Level Control block receives the differential signals from the equalizer filter block. This block
incorporates a self-biasing DC restoration circuit to fully DC
restore the signals. If Bypass is high, this function is disabled.
The signals before and after the DC Restoration / Level Control block are used to generate the Automatic Equalization
Control (AEC) signal. This control signal sets the gain and
bandwidth of the equalizer filter. The loop response in the
AEC block is controlled by an external 1µF capacitor placed
across the AEC+ and AEC- pins.
The Carrier Detect / Mute block generates the carrier detect
signal and controls the mute function of the output. This block
utilizes the CD and MUTE signals along with Mute Reference
(MUTEREF).
The Output Driver produces SDO and SDO.
CARRIER DETECT (CD) AND MUTE
Carrier detect CD indicates if a valid signal is present at the
LMH0074 input. If MUTEREF is used, the carrier detect threshold will be altered accordingly. CD provides a high voltage
when no signal is present at the LMH0074 input. CD is low
when a valid input signal is detected.
MUTE can be used to manually mute or enable SDO and
SDO. Applying a high input to MUTE will mute the LMH0074
outputs. Applying a low input will force the outputs to be active.
CD and MUTE may be tied together to automatically mute the
output when no input signal is present.
INPUT INTERFACING
The LMH0074 accepts either differential or single-ended input. The input must be AC coupled. Transformer coupling is
not supported.
The LMH0074 correctly handles equalizer pathological signals for standard definition serial digital video, as described
in SMPTE RP 178.
MUTE REFERENCE (MUTEREF)
The mute reference sets the threshold for CD and (with CD
tied to MUTE) determines the amount of cable to equalize
before automatically muting the outputs. This is set by applying a voltage inversely proportional to the length of cable to
equalize. As the applied MUTEREF voltage is increased, the
amount of cable that can be equalized before carrier detect is
OUTPUT INTERFACING
The SDO and SDO outputs are internally loaded with 50Ω.
They produce a 750 mVP-P differential output, or a
375 mVP-P single-ended output.
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LMH0074
Application Information
PCB LAYOUT RECOMMENDATIONS
Please refer to the following Application Note on National's
website: AN-1372, “LMH0034 PCB Layout Techniques.”
The PCB layout techniques in the application note apply to
the LMH0074 as well.
SUPPLY CURRENT VS. CABLE LENGTH
The supply current (ICC) depends on the amount of cable being equalized. The current is highest for short cable and
decreases as the cable length is increased. Figure 1 shows
supply current vs. Belden 1694A cable length for 270 Mbps
data.
30027515
FIGURE 1. Supply Current vs. Belden 1694A Cable
Length, 270 Mbps
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6
LMH0074
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin LLP
Order Number LMH0074SQ
NS Package Number SQB16A
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LMH0074 SMPTE 259M / 344M Adaptive Cable Equalizer
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